STB50N65DM6
Datasheet
N-channel 650 V, 74 mΩ typ., 33 A, MDmesh DM6 Power MOSFET in a D²PAK package
TAB
G(1)
2
1
3
D²PAK
D(2, TAB)
S(3)
AM01476v1_tab
Product status link
STB50N65DM6
Product summary
Order code
Marking
Package
Packing
STB50N65DM6
50N65DM6
D²PAK
Tape and reel
Features
Order code
STB50N65DM6
V
DS
650 V
R
DS(on)
max.
91 mΩ
• Fast-recovery body diode
• Lower R
DS(on)
per area vs previous generation
• Low gate charge, input capacitance and resistance
• 100% avalanche tested
• Extremely high dv/dt ruggedness
• Zener-protected
I
D
33 A
Applications
• Switching applications
Description
This high-voltage N-channel Power MOSFET is part of the MDmesh DM6 fastrecovery diode series. Compared with the previous MDmesh fast generation, DM6 combines very low recovery charge (Q rr
), recovery time (t rr
) and excellent improvement in R
DS(on)
per area with one of the most effective switching behaviors available in the market for the most demanding high-efficiency bridge topologies and
ZVS phase-shift converters.
DS13187 - Rev 2 - July 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
STB50N65DM6
Electrical ratings
1
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM
(1)
P
TOT dv/dt
(2) di/dt (2) dv/dt (3)
T stg
T
J
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Parameter
Total power dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
Peak diode recovery current slope
MOSFET dv/dt ruggedness
Storage temperature range
Operating junction temperature range
1. Pulse width limited by safe operating area
2. I
SD
≤ 33 A, V
DS
(peak) < V
(BR)DSS
, V
DD
= 400V
3. V
DS
≤ 520 V
Table 2. Thermal data
Symbol
R thj-case
R thj-pcb
(1)
Parameter
Thermal resistance junction-case
Thermal resistance junction-pcb
1. When mounted on an 1-inch² FR-4, 2 Oz copper board.
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by T jmax
)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
33
21
120
250
100
1000
100
-55 to 150
Unit
V
A
A
A
W
V/ns
A/µs
V/ns
°C
Value
0.5
30
Unit
°C/W
°C/W
Value
9
560
Unit
A mJ
DS13187 - Rev 2 page 2/14
2
STB50N65DM6
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 4. On/off-state
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
= 0 V, I
Test conditions
D
= 1 mA
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate body leakage current
Gate threshold voltage
Static drain-source onresistance
1. Defined by design, not subject to production test.
V
GS
= 0 V, V
DS
= 650 V
V
GS
= 0 V, V
DS
= 650 V
T
C
= 125 °C
(1)
V
DS
V
DS
= 0 V, V
= V
GS
GS
, I
D
= ±25 V
= 250 µA
V
GS
= 10 V, I
D
= 16.5 A
Min.
Typ.
Max.
Unit
650 V
5 µA
3.25
4
74
100
±5
4.75
91
µA
µA
V mΩ
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
(1)
R g
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
V
DS
Test conditions
= 100 V, f = 1 MHz, V
GS
Equivalent output capacitance V
DS
= 0 to 520 V, V
GS
= 0 V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
Total gate charge
Gate-source charge
Gate-drain charge
= 0 V
V
DD
= 520 V, I
D
= 33 A
V
GS
= 0 to 10 V (see
Figure 14. Test circuit for gate charge behavior
)
Min.
-
-
-
-
-
-
-
Typ.
2300
165
3
414
1.7
52.5
14.5
22.5
Max.
-
-
-
-
-
-
-
Unit pF pF pF pF
Ω nC nC nC
1. C oss eq
. is defined as a constant equivalent capacitance giving the same charging time as C
OSS
when VDS increases from 0 to 80% V
DSS
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 325 V, I
D
= 16.5 A, R
G
= 4.7 Ω
V
GS
= 10 V (see
Figure 13. Test circuit for resistive load switching times and
Figure 18. Switching time waveform )
Min.
Typ.
Max.
Unit
-
19.2
12
-
ns ns
-
59.6
9.6
-
ns ns
DS13187 - Rev 2 page 3/14
STB50N65DM6
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
(1)
V
SD
(2)
t rr
Q rr
I
RRM t rr
Q rr
I
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Test conditions
V
GS
= 0 V, I
SD
= 33 A
I
SD
= 33 A, di/dt = 100 A/µs,V
DD
= 60 V
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
I
SD
= 33 A, di/dt = 100 A/µs V
DD
= 60 V,
T j
= 150 °C (see
Figure 15. Test circuit for inductive load switching and diode recovery times )
-
-
-
-
-
-
-
Min.
Typ.
Max.
Unit
33 A
120 A
1.6
130
0.65
10
226
2.32
20.6
V ns
µC
A ns
µC
A
DS13187 - Rev 2 page 4/14
STB50N65DM6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GADG261120190945SOA
I
DM
10 2 t p
=1 µs
10 1
10 0
10 -1
10 -2
10 -1
in this area
by
R
DS(on)
R
DS(on)
max.
t p
=10 µs
T
C
T
J
= 25 °C
≤ 150 °C single pulse
10 0 10 1 t p
=10 ms
10 2 t p
=100 µs
V
(BR)DSS t p
=1 ms
V
DS
(V)
Figure 2. Maximum transient thermal impedance
Z thj-c
(°C/W)
GADG211120191320ZTH
0.4
0.3
duty = 0.5
10 -1
0.2
0.1
0.5
10 -2
Single pulse R thJ-C
= 0.5°C/W
10 -3
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
Figure 3. Typical output characteristics
I
D
(A)
100
V
GADG090720191225OCH
GS
= 9, 10 V
V
GS
= 8 V
80
V
GS
= 7 V
60
40
20
0
0 4 8
V
GS
= 6 V
V
GS
= 5 V
12 16 V
DS
(V)
Figure 5. Typical gate charge characteristics
V
DS
(V)
600
500
V
DD
GADG090720191225QVG
= 520 V, I
D
= 33 A
V
GS
(V)
Q g
12
10
400
Q gs
300
200
100
0
0
Q gd
8
6
10 20 30 40 50 60
4
2
Q
0 g
(nC)
60
40
20
0
4
Figure 4. Typical transfer characteristics
I
D
(A)
100
GADG090720191225TCH
V
DS
= 20 V
80
5 6 7 8 9 V
GS
(V)
Figure 6. Typical drain-source on-resistance
R
DS(on)
(mΩ)
80
GADG090720191226RID
74
72
78
76
70
68
0 5
V
GS
= 10 V
10 15 20 25 30 I
D
(A)
DS13187 - Rev 2 page 5/14
STB50N65DM6
Electrical characteristics (curves)
Figure 7. Typical capacitance characteristics
C
(pF)
GADG090720191226CVR
10 4
C
ISS
10 3
10 2
10 1
10 0
10 -1 f = 1 MHz
10 0 10 1 10 2
C
OSS
C
RSS
V
DS
(V)
Figure 8. Typical output capacitance stored energy
E
OSS
(µJ)
24
GADG090720191228EOS
12
8
20
16
4
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 9. Normalized gate threshold vs temperature
V
GS(th)
(norm.)
GADG090720191229VTH
1.1
1.0
ID = 250 µA
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T j
(°C)
Figure 10. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
GADG090720191229RON
2.5
2.0
V
GS
= 10 V
1.5
1.0
0.5
0.0
-75 -25 25 75 125 T j
(°C)
Figure 11. Normalized breakdown voltage vs temperature
V
(BR)DSS
(norm.)
GADG090720191230VTH
1.10
I
D
= 1 mA
1.05
1.00
0.95
0.90
0.85
-75 -25 25 75 125 T j
(°C)
Figure 12. Typical reverse diode forward characteristics
V
SD
(V)
1.1
GADG090720191230SDF
Tj = -50 °C
1.0
0.9
0.8
0.7
0.6
0.5
0 5
Tj = 25°C
Tj = 150°C
10 15 20 25 30 I
SD
(A)
DS13187 - Rev 2 page 6/14
STB50N65DM6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
Figure 14. Test circuit for gate charge behavior
V
DD
RL
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
100 Ω D.U.T.
V
G
AM01469v10
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
A A fast diode
B
B
G
+
_
R
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS13187 - Rev 2 page 7/14
4
STB50N65DM6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DS13187 - Rev 2 page 8/14
4.1
STB50N65DM6
D²PAK (TO-263) type A2 package information
D²PAK (TO-263) type A2 package information
Figure 19. D²PAK (TO-263) type A2 package outline
DS13187 - Rev 2
0079457_A2_26 page 9/14
DS13187 - Rev 2
STB50N65DM6
D²PAK (TO-263) type A2 package information
Dim.
e1
H
J1
L
L1
L2
R
V2
D
D1
D2
E
E1
E2 e
A
A1 b b2 c c2
Table 8. D²PAK (TO-263) type A2 package mechanical data mm
Typ.
1.14
0.45
1.23
8.95
7.50
Min.
4.40
0.03
0.70
1.10
10.00
8.70
7.30
7.75
1.30
8.90
7.50
2.54
4.88
15.00
2.49
2.29
1.27
1.30
0.40
0°
5.28
15.85
2.69
2.79
1.40
1.75
8°
1.70
0.60
1.36
9.35
8.00
Max.
4.60
0.23
0.93
1.50
10.40
9.10
7.70
Figure 20. D²PAK (TO-263) recommended footprint (dimensions are in mm)
Footprint_26 page 10/14
4.2
D²PAK packing information
Figure 21. D²PAK tape outline
STB50N65DM6
D²PAK packing information
DS13187 - Rev 2 page 11/14
DS13187 - Rev 2
A
STB50N65DM6
D²PAK packing information
D
B
Full radius
Figure 22. D²PAK reel outline
T
40mm min. access hole at slot location
Tape slot in core for tape start
2.5mm min.width
C
N
G measured at hub
Dim.
E
F
K0
P0
P1
P2
R
T
W
A0
B0
D
D1
Min.
1.65
11.4
4.8
3.9
11.9
1.9
50
0.25
23.7
10.5
15.7
1.5
1.59
Tape
Table 9. D²PAK tape and reel mechanical data
Reel mm
Dim.
Max.
10.7
15.9
1.6
1.61
1.85
11.6
5.0
4.1
12.1
2.1
C
D
A
B
G
N
T
Base quantity
Bulk quantity
Min.
1.5
12.8
20.2
24.4
100
0.35
24.3
mm
AM06038v1
Max.
330
13.2
26.4
30.4
1000
1000 page 12/14
Revision history
Date
04-Dec-2019
28-Jul-2020
Table 10. Document revision history
Version
1
2
Changes
First release.
Updated Table 1. Absolute maximum ratings
.
STB50N65DM6
DS13187 - Rev 2 page 13/14
STB50N65DM6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2020 STMicroelectronics – All rights reserved
DS13187 - Rev 2 page 14/14
