STMicroelectronics SMP100LC Datasheet
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SMP100LC
Trisil™ for telecom equipment protection
Features
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Bidirectional crowbar protection
Voltage range from 8 V to 400 V
Low capacitance from 20 pF to 45 pF @ 2 V
Low leakage current: I
R
= 2 µA max
Holding current: I
H
= 150 mA min.
Repetitive peak pulse current:
I
PP
= 100 A (10/1000 µs)
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Benefits
■
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Trisils are not subject to ageing and provide a fail safe mode in short circuit for better protection.
Helps equipment meet main standards such as
UL60950, IEC 950 / CSA C22.2 and UL1459.
Epoxy meets UL94, V0.
Package is JEDEC registered (DO-214AA).
Complies with the following standards
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GR-1089 Core
ITU-T-K20/K21
IEC 61000-4-5
IEC 61000-4-2 level 4
TIA/EIA IS-968
UL497B recognized, UL file E136224
Applications
Any sensitive equipment requiring protection against lightning strikes and AC power faults.
These devices are dedicated to central office protection as they comply with the most stressful standards. Their low capacitances make them suitable for xDSL.
SMB
(JEDEC DO-214AA)
Description
The SMP100LC is a series of low capacitance transient surge arrestors designed for the protection of high data rate communication equipment. The low capacitance of the devices avoids any distortion of the signal and is compatible with digital transmission line cards
(xDSL, ISDN...).
SMP100LC series tested and confirmed compatible with Cooper Bussmann Telecom
Circuit Protector TCP 1.25A.
The SMP100LC-xxx with the fuse TCP1.25A or
TCP2A is compliant with Telcordia GR1089
(lightning and AC power fault tests),
ITU-T K20/K21 (lightning and AC power fault tests), TIA/EIA-IS-968 (formerly FCC Part 68 lightning tests), and UL60950 (AC power fault tests). The use of the TCP1.25A allows the
SMP100LC-xxx to be safe for the 2nd level (B criteria) AC power fault tests.
TM: Trisil is a trademark of STMicroelectronics
February 2012 Doc ID 7050 Rev 14 1/13 www.st.com
13
Characteristics
1 Characteristics
SMP100LC
Table 1.
In compliance with the following standards
Standard
Peak surge voltage
(V)
Waveform voltage
Required peak current
(A)
Current waveform
Minimum serial resistor to meet standard ( Ω )
GR-1089 Core
First level
2500
1000
2/10 µs
10/1000 µs
500
100
2/10 µs
10/1000 µs
0
0
GR-1089 Core
Second level
GR-1089 Core
Intra-building
5000
1500
2/10 µs
2/10 µs
500
100
2/10 µs
2/10 µs
0
0
ITU-T-K20/K21
ITU-T-K20
(IEC61000-4-2)
IEC61000-4-5
TIA/EIA IS-968, lightning surge type A
6000
1500
8000
15000
4000
4000
1500
800
10/700 µs
1/60 ns
10/700 µs
1.2/50 µs
10/160 µs
10/560 µs
150
37.5
5/310 µs
ESD contact discharge
ESD air discharge
100
100
200
100
5/310 µs
8/20 µs
10/160 µs
10/560 µs
0
0
0
0
0
0
0
0
TIA/EIA IS-968, lightning surge type B
1000 9/720 µs 25 5/320 µs 0
2/13 Doc ID 7050 Rev 14
SMP100LC Characteristics
Table 2.
Symbol
I
I
I
I
PP
FS
TSM
2 t I
Repetitive peak pulse current (see
Fail-safe mode: maximum current
Non repetitive surge peak on-state current
(sinusoidal)
2 t value for fusing
(1)
T stg
T j
T
L
Storage temperature range
Operating junction temperature range
Maximum lead temperature for soldering during 10 s.
1.
In fail safe mode, the device acts as a short circuit.
10/1000 µs
8/20 µs
10/560 µs
5/310 µs
10/160 µs
1/20 µs
2/10 µs
8/20 µs t = 0.2 s t = 1 s t = 2 s t = 15 mn t = 16.6 ms t = 20 ms
Table 3.
Symbol
Thermal resistances
Parameter
R th(j-a)
R th(j-l)
Absolute ratings (T amb
= 25 °C)
Parameter
Junction to ambient (with recommended footprint)
Junction to leads
Value
100
20
Figure 1.
Electrical characteristics - definitions (T amb
= 25 °C)
Symbol Parameter
V
V
RM
BO
I
I
RM
PP
I
I
BO
H
V
R
I
R
C
Stand-off voltage
Breakover voltage
Leakage current
Peak pulse current
Breakover current
Holding current
Continuous reverse voltage
Leakage current at V
Capacitance
R
I
PP
I
I
BO
I
H
I
RM
V
RM
V
R
V
V
BO
Value
5
24
15
12
4
20
21
100
400
140
150
200
400
500
-55 to 150
-40 to 150
260
Unit
A kA
A
A
2 s
°C
°C
Unit
°C/W
°C/W
Doc ID 7050 Rev 14 3/13
Characteristics SMP100LC
Table 4.
Electrical characteristics - values (T amb
= 25 °C)
I
RM
@ V
RM
I
R
@ V
R
Dynamic
V
BO
(1)
Static
V
BO
@ I
BO
(2)
Order code max.
max.
max.
I
H
(3)
C
(4)
C
(5) max.
max.
min.
typ.
typ.
µA V µA V V V mA pF pF
SMP100LC-8 6 8 25 15 mA
50
(typ.)
NA 75
SMP100LC-25
SMP100LC-35
SMP100LC-65
SMP100LC-90
SMP100LC-120
SMP100LC-140
SMP100LC-160
SMP100LC-200
SMP100LC-230
SMP100LC-270
SMP100LC-320
SMP100LC-360
SMP100LC-400
2
22
32
55
81
108
126
144
180
207
243
290
325
360
5
25
35
65
90
120
140
160
200
230
270
320
360
400
1.
See
Figure 16: Test circuit 1 for Dynamic I
2.
See
Figure 17: Test circuit 2 for I
3.
See
Figure 18: Test circuit 3 for dynamic I
4.
V
R
= 50 V bias, V
RMS
=1 V, F = 1 MHz
5.
V
R
= 2V bias, V
RMS
=1 V, F = 1 MHz
295
345
400
460
540
155
180
205
255
40
55
85
120
285
335
390
450
530
150
175
200
250
35
55
85
125
800
150
30
30
25
25
20
35
30
30
30
NA 65
NA 55
45
40
90
80
75
65
65
60
60
60
50
50
45
4/13 Doc ID 7050 Rev 14
SMP100LC Characteristics
Figure 2.
50
0
%I
100
PP
Pulse waveform t r t p
Repetitive peak pulse current tr = rise time (µs) tp = pulse duration time (µs) t
Figure 3.
Non repetitive surge peak on-state current versus overload duration
70
I
TSM
(A)
60
50
40
30
20
10
0
1E-2 1E-1 1E+0 t(s)
1E+1 1E+2
F=50Hz
1E+3
Figure 4.
On-state voltage versus on-state current (typical values)
Figure 5.
Relative variation of holding current versus junction temperature
100
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
10
0 1 2 3 4 5 6 7
Figure 6.
Relative variation of breakover voltage versus junction temperature
8
1.08
V
BO
[ ] / V
BO
[ =25°C]
1.06
1.04
1.02
1.00
0.98
0.96
-25 0 25 50 75 100 125
2000
1000
100
10
1
25
-25 0
50
25
75
50 75
100
100
Figure 7.
Relative variation of leakage current versus junction temperature (typical values)
125
125
Doc ID 7050 Rev 14 5/13
Application information SMP100LC
Figure 8.
Variation of thermal impedance junction to ambient versus pulse duration
Z th(j-a)
/R th(j-a)
1
Printed circuit board - FR4, copper thickness = 35µm, recommended pad layout
0.1
0.01
1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2
Figure 9.
Relative variation of junction capacitance versus reverse voltage applied (typical values)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1 2 5 10 20 50 100
F =1MHz
V
RMS
= 1V
300
In wire line applications, analog or digital, both central office and subscriber sides have to be protected. This function is assumed by a combined series / parallel protection stage.
Figure 10.
Examples of protection stages for line cards
Ring relay
Line Line
6/13
Ex. Analog line card Ex. xDSL line card or terminal
In such a stage, parallel function is assumed by one or several Trisil, and is used to protect against short duration surge (lightning). During this kind of surges the Trisil limits the voltage across the device to be protected at its break over value and then fires. The fuse assumes the series function, and is used to protect the module against long duration or very high current mains disturbances (50/60Hz). It acts by safe circuit opening. Lightning surge and mains disturbance surges are defined by standards like GR1089, TIA/EIA IS-968,
ITU-T K20.
Figure 11.
Typical circuits
Tip L
Fuse TCP 1.25A
Fuse TCP 1.25A
T1
SMP100LC-xxx
T2
Gnd
Ring L
Fuse TCP 1.25A
Tip S
SMP100LC-xxx
Gnd
SMP100LC-xxx
Ring S
Typical circuit for subscriber side Typical circuit for central office side
Doc ID 7050 Rev 14
SMP100LC Application information
Figure 12.
Test method of the board with fuse and Trisil
Surge
Generator
I surge
Line side
Test board
Device to be protected
V
Oscilloscope
Current probe Voltage probe
These topologies, using SMP100LC from ST and TCP1.25A from Cooper Bussmann, have been functionally validated with a Trisil glued on the PCB. Following example was performed with SMP100LC-270 Trisil. For more information, see Application Note AN2064.
Figure 13.
Trisil turns on during lightning strike
I surge (100A/div)
V (50V/div)
Test conditions:
2/10 µs + and - 2.5 and 5 kV, 500 A (10 pulses of each polarity), T amb
= 25 °C
Test result:
Fuse and Trisil OK after test in accordance with GR1089 requirements.
Doc ID 7050 Rev 14 7/13
Application information
Figure 14.
Trisil action while fuse remains operational
SMP100LC
I surge (2A/div)
V (100V/div)
Test conditions:
600 V, 3 A, 1.1 s (first level), T amb
= 25 °C
Test result:
Fuse and Trisil OK after test in accordance with GR1089 requirements.
Figure 15.
High current AC power test: the fuse acts like a switch by opening the circuit
I surge (10A/div)
V (100V/div)
8/13
Test conditions:
277 V, 25 A (second level), T amb
= 25 °C
Test result:
Fuse safely opened and Trisil OK after test in accordance with GR1089 requirements.
Doc ID 7050 Rev 14
SMP100LC
Figure 16.
Test circuit 1 for Dynamic I
BO
and V
BO
parameters
100 V / µs, di /dt < 10 A / µs, Ipp = 100 A
Application information
10 µF
2 Ω
45
Ω
83
Ω
0.36 nF
46 µH
U 66
Ω
470
Ω
U
KeyTek 'System 2' generator with PN246I module
1 kV / µs, di /dt < 10 A / µs, Ipp = 10 A
26 µH
60 µF
12
Ω
250
Ω
47
Ω 46 µH
KeyTek 'System 2' generator with PN246I module
Figure 17.
Test circuit 2 for I
BO
and V
BO
parameters
K ton = 20ms
R1 = 140 Ω
R2 = 240
Ω
220V 50Hz
Vout
DUT
1/4
IBO measurement
●
●
TEST PROCEDURE
Pulse test duration (tp = 20ms): for Bidirectional devices = Switch K is closed for Unidirectional devices = Switch K is open
V
OUT
●
● selection:
Device with V
BO
< 200V ➔ V
OUT
Device with V
BO
≥ 200V ➔ V
OUT
= 250 V
RMS
, R1 = 140 Ω
= 480 V
RMS
, R2 = 240 Ω
VBO measurement
Doc ID 7050 Rev 14 9/13
Ordering information scheme
Figure 18.
Test circuit 3 for dynamic I
H
parameter
R
V
BAT
= - 48 V D.U.T
Surge generator
SMP100LC functional test circuit.
TEST PROCEDURE
2/ Fire the D.U.T. with a surge current ➔ I
PP
= 10A, 10/1000µs.
3/ The D.U.T. will come back off-state within 50ms maximum.
3 Ordering information scheme
Figure 19.
Ordering information scheme
SMP 100 LC - xxx
Trisil surface mount
Repetitive peak pulse current
100 = 100 A
Capacitance
LC = Low capacitance
Voltage
65 = 65 V
10/13 Doc ID 7050 Rev 14
SMP100LC Package information
●
●
Epoxy meets UL94, V0
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
Table 5.
SMB dimensions
C
E1
E
L
D
A1
A2 b
Ref.
A1
A2 b c
E
E1
D
L
Dimensions
Millimeters
Min.
1.90
0.05
1.95
0.15
5.10
4.05
3.30
0.75
Max.
2.45
0.20
2.20
0.40
5.60
4.60
3.95
1.50
Inches
Min.
0.075
0.002
0.077
0.006
0.201
0.159
0.130
0.030
Max.
0.096
0.008
0.087
0.016
0.220
0.181
0.156
0.059
Figure 20. Footprint dimensions in mm (inches)
Figure 21. Marking layout
(1)
1.62
2.60
(0.064) (0.102)
1.62
(0.064)
2.18
(0.086)
Cathode bar ( unidirectional devices only ) x x x z e y w w e: ECOPACK compliance
XXX: Marking
Z: Manufacturing location
Y: Year
WW: week
5.84
(0.23)
1.
Marking layout can vary according to assembly location.
Doc ID 7050 Rev 14 11/13
Ordering information SMP100LC
Table 6.
Ordering information
Order code Marking
SMP100LC-8
SMP100LC-25
SMP100LC-35
SMP100LC-65
SMP100LC-90
SMP100LC-120
SMP100LC-140
SMP100LC-160
SMP100LC-200
SMP100LC-230
SMP100LC-270
SMP100LC-320
SMP100LC-360
SMP100LC-400
L16
L20
L23
L27
L32
L36
L40
PL8
L25
L35
L06
L09
L12
L14
Package Weight Base qty Delivery mode
SMB 98 mg 2500 Tape and reel
Table 7.
Date
Document revision history
09-Nov-2004
07-Dec-2004
20-Jun-2005
05-Mar-2007
05-Jan-2010
09-Feb-2012
Revision
9
10
11
12
13
14
Changes
Absolute ratings values, table 3 on page 2, updated.
SMP100LC-320, SMP100LC-360 and SMP100LC-400 addition.
Telecom Circuit Protector added in Description .
Reformatted to current standards. SMB Package information
updated. Standards compliance paragraphs added to Description .
Corrected vertical axis labelling in
.
Added UL statement in Complies with the following standards .
12/13 Doc ID 7050 Rev 14
SMP100LC
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Doc ID 7050 Rev 14 13/13
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