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STH180N15F7-2,
STH180N15F7-6
Nchannel 150 V, 4.5 mΩ typ., 180 A STripFET™ F7
Power MOSFETs in H²PAK-2 and H²PAK-6 packages
Datasheet - preliminary data
Features
Order code V
DS
R
DS(on)
max. I
D
STH180N15F7-2
150 V
5.3 mΩ
180 A
STH180N15F7-6
Among the lowest R
DS(on)
on the market
Excellent FoM (figure of merit)
Low C rss
/C iss
ratio for EMI immunity
High avalanche ruggedness
G(1)
Figure 1: Internal schematic diagram
D(TAB)
S(2, 3)
H2PAK-2
Order code
STH180N15F7-2
STH180N15F7-6
G(1)
Applications
Switching applications
D(TAB)
Description
These N-channel Power MOSFETs utilize
STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
S(2, 3, 4, 5, 6, 7)
H2PAK-6
Table 1: Device summary
Marking Package
180N15F7
H²PAK-2
H²PAK-6
Packing
Tape and reel
May 2016 DocID028520 Rev 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/17 www.st.com
Contents
Contents
STH180N15F7-2, STH180N15F7-6
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
4 Package information ....................................................................... 7
H²PAK-2 package information ........................................................... 8
H²PAK-6 package information ......................................................... 11
Packing information ......................................................................... 14
5 Revision history ............................................................................ 16
2/17 DocID028520 Rev 2
STH180N15F7-2, STH180N15F7-6
1 Electrical ratings
Symbol
V
DS
V
GS
I
I
P
TOT
T
J
T stg
Table 2: Absolute maximum ratings
Parameter
Drain-source voltage
Gate source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Operating junction temperature range
Storage temperature range
Notes:
(1)
Current limited by package.
(2)
Pulse width limited by safe operating area.
Symbol
Table 3: Thermal data
Parameter
R thj-case
R
Thermal resistance junction-case
Thermal resistance junction-pcb
Notes:
(1)
When mounted on 1 inch2 FR-4 board, 2 oz of Cu.
Electrical ratings
Value
150
±20
180
130
720
357
- 55 to 175
Unit
V
V
A
A
A
W
°C
Value
0.42
35
Unit
°C/W
°C/W
DocID028520 Rev 2 3/17
Electrical characteristics
2 Electrical characteristics
STH180N15F7-2, STH180N15F7-6
(T
C
= 25 °C unless otherwise specified)
Symbol Parameter
Table 4: On /off-states
Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 1mA
I
DSS
Zero-gate voltage drain current
V
GS
= 0 V, V
DS
=120 V
V
GS
= 0 V, V
DS
=120 V,
T
C
I
GSS
Gate-body leakage current
V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source onresistance
V
DS
= 0 V, V
GS
= 20 V
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= 10 V, I
D
= 90 A
Min. Typ. Max. Unit
150 V
1 µA
100 µA
100 nA
4.5 V
4.5 5.3 mΩ
2.5
Notes:
(1)
Defined by design, not subject to production test.
Symbol Parameter
Table 5: Dynamic
Test conditions
C iss
C oss
C rss
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 25 V, f = 1 MHz,V
GS
= 0 V
V
DD
= 75 V, I
D
= 180 A,
V
GS
= 10 V
(see Figure 3: "Test circuit for gate charge behavior" )
Table 6: Switching times
Test conditions Symbol Parameter t t d(on) t t r f d(off)
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 75 V, I
D
= 90 A,
R
G
= 4.7 Ω, V
GS
= 10 V
Min. Typ. Max. Unit
-
-
8450
4000
-
- pF pF
-
-
-
-
220
125
TBD
TBD
- TBD
- TBD
- TBD
- TBD
-
-
-
- pF nC nC nC
Min. Typ. Max. Unit
-
-
-
- ns ns ns ns
4/17 DocID028520 Rev 2
STH180N15F7-2, STH180N15F7-6
Symbol
V
I
t
Q rr
rr
RRM
Parameter
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 7: Source-drain diode
Test conditions
I
SD
= 180 A, V
GS
= 0 V
I
SD
= 180 A, di/dt = 100 A/µs
V
DD
= 120 V
(see Figure 4: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
-
- TBD
- TBD
- TBD
1.2 V ns nC
A
Notes:
(1)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
DocID028520 Rev 2 5/17
Test circuits
3 Test circuits
Figure 2: Test circuit for resistive load switching times
STH180N15F7-2, STH180N15F7-6
Figure 3: Test circuit for gate charge behavior
Figure 4: Test circuit for inductive load switching and diode recovery times
Figure 5: Unclamped inductive load test circuit
6/17
Figure 6: Unclamped inductive waveform
Figure 7: Switching time waveform
DocID028520 Rev 2
STH180N15F7-2, STH180N15F7-6
4 Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
DocID028520 Rev 2 7/17
Package information
4.1 H²PAK-2 package information
STH180N15F7-2, STH180N15F7-6
Figure 8: H²PAK-2 package outline
8/17 DocID028520 Rev 2
8159712_D
STH180N15F7-2, STH180N15F7-6
Dim.
L
L1
L2
L3
L4
M
R
V
E
F
H
H1
A
A1
C e
Table 8: H²PAK-2 package mechanical data mm
Min. Typ.
15.30
1.27
4.93
6.85
1.5
2.6
0.20
0°
4.30
0.03
1.17
4.98
0.50
0.78
10.00
7.40
-
Package information
Max.
15.80
1.40
5.23
7.25
1.7
2.9
0.60
8°
4.80
0.20
1.37
5.18
0.90
0.85
10.40
7.80
DocID028520 Rev 2 9/17
Package information STH180N15F7-2, STH180N15F7-6
Figure 9: H²PAK-2 recommended footprint
8159712_D
10/17 DocID028520 Rev 2
STH180N15F7-2, STH180N15F7-6
4.2 H²PAK-6 package information
Figure 10: H²PAK-6 package outline
Package information
DocID028520 Rev 2 11/17
Package information
Dim.
H
H1
L
L1
L2
L3
L4 e1 e2
E
F
A
A1
C e
M
R
V
STH180N15F7-2, STH180N15F7-6
Table 9: H²PAK-6 package mechanical data mm
Min. Typ. Max.
10.00
7.40
14.75
1.27
4.35
6.85
1.5
4.30
0.03
1.17
2.34
4.88
7.42
0.45
0.50
1.90
0.20
0°
-
10.40
7.80
15.25
1.40
4.95
7.25
1.75
4.80
0.20
1.37
2.74
5.28
7.82
0.60
0.70
2.50
0.60
8°
12/17 DocID028520 Rev 2
STH180N15F7-2, STH180N15F7-6
Figure 11: H²PAK-6 recommended footprint
Package information
Dimensions are in mm.
DocID028520 Rev 2 13/17
Package information
4.3 Packing information
STH180N15F7-2, STH180N15F7-6
Figure 12: Tape outline
14/17
A
REE L DIMENS IONS
D
Figure 13: Reel outline
40 mm min.
Acc ess ho le
At slot location
B
C
Full rad ius
Tape slot
In core for
Tape start
DocID028520 Rev 2
T
N
G mea sured
At hu b
STH180N15F7-2, STH180N15F7-6
Tape
Package information
Table 10: Tape and reel mechanical data
Reel mm mm
Dim. Dim.
Min. Max. Min. Max.
P1
P2
R
T
W
A0
B0
D
D1
E
F
K0
P0
11.9
1.9
50
0.25
23.7
10.5
15.7
1.5
1.59
1.65
11.4
4.8
3.9
10.7
15.9
1.6
1.61
1.85
11.6
5.0
4.1
12.1
2.1
0.35
24.3
A
B
C
D
G
1.5
12.8
20.2
24.4
N
T
100
Base quantity
Bulk quantity
330
13.2
26.4
30.4
1000
1000
DocID028520 Rev 2 15/17
Revision history
5
STH180N15F7-2, STH180N15F7-6
Revision history
Date Revision
Table 11: Document revision history
Changes
16-Oct-2015
10-May-2016
1
2
First release.
Updated title and silhouette.
Updated Table 2: "Absolute maximum ratings"
and Table 4: "On /offstates" .
Added Section 7.2: "H²PAK-6 package information" .
Minor text changes.
16/17 DocID028520 Rev 2
STH180N15F7-2, STH180N15F7-6
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics
– All rights reserved
DocID028520 Rev 2 17/17
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