STP110N15F7
Nchannel 150 V, 9.4 mΩ typ., 110 A STripFET™ F7
Power MOSFET in a TO-220 package
Datasheet - preliminary data
Features
Order code V
DS
R
DS(on)
max. I
D
STP110N15F7 150 V 11 mΩ 110 A
Among the lowest R
DS(on) on the market
Excellent FoM (figure of merit )
Low C rss
/C iss
ratio for EMI immunity
High avalanche ruggedness
Applications
Switching applications
Figure 1: Internal schematic diagram
G(1)
D(2, TAB)
Order code
STP110N15F7
S(3)
Description
This N-channel Power MOSFET utilizes
STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
AM01475v1_Tab
Table 1: Device summary
Marking
110N15F7
Package
TO-220
Packing
Tube
April 2016 DocID029154 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/11 www.st.com
Contents
Contents
STP110N15F7
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
3 Test circuits ..................................................................................... 6
4 Package information ....................................................................... 7
4.1
TO-220 type A package information .................................................. 8
5 Revision history ............................................................................ 10
2/11 DocID029154 Rev 1
STP110N15F7
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT
T
J
T stg
Drain-source voltage
Gate source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Operating junction temperature range
Storage temperature range
Notes:
(1)
Pulse width limited by safe operating area.
Symbol
Table 3: Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case
Thermal resistance junction-ambient
Electrical ratings
Value
150
± 20
110
80
440
258
-55 to 175
Unit
V
V
A
A
A
W
°C
Value
0.58
62.5
Unit
°C/W
°C/W
DocID029154 Rev 1 3/11
Electrical characteristics
2 Electrical characteristics
STP110N15F7
(T
C
= 25 °C unless otherwise specified)
Symbol Parameter
Table 4: On /off states
Test conditions
V
(BR)DSS
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
Static drain-source on-resistance
V
GS
= 0 V, V
DS
=120 V
V
GS
= 0 V, V
DS
T
C
= 125 °C (1)
=120 V,
V
DS
= 0 V, V
GS
= 20 V
Min. Typ. Max. Unit
150 V
1 µA
100 µA
V
DS
= V
GS
, I
D
= 250 μA
2.5
V
GS
= 10 V, I
D
= 55 A 9.4
100 nA
4.5 V
11 mΩ
Notes:
(1)
Defined by design, not subject to production test.
Symbol Parameter
Table 5: Dynamic
Test conditions Min. Typ. Max. Unit
C iss
C oss
C rss
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Symbol t t d(on) t t r f d(off)
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DS
= 25 V, f = 1 MHz
V
GS
= 0 V
V
DD
= 75 V, I
D
= 110 A,
V
GS
= 10 V
(see Figure 3: "Test circuit for gate charge behavior" )
Table 6: Switching times
Test conditions
V
DD
= 75 V, I
D
= 55 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 2: "Test circuit for resistive load switching times" )
-
-
-
-
-
-
4500
2110
118
70
TBD
TBD
-
-
-
-
-
- pF pF pF nC nC nC
Min. Typ. Max. Unit
- TBD
- TBD
- TBD
- TBD
-
-
-
- ns ns ns ns
4/11 DocID029154 Rev 1
STP110N15F7
Symbol
V
I
SD
t
Q rr
(1)
rr
RRM
Parameter
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 7: Source-drain diode
Test conditions
I
SD
= 110 A, V
GS
= 0 V
I
SD
= 110 A, di/dt = 100 A/µs
V
DD
= 120 V ( Figure 4: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
-
- TBD
1.2
- TBD
- TBD
V ns nC
A
Notes:
(1) Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
DocID029154 Rev 1 5/11
Test circuits
3 Test circuits
Figure 2: Test circuit for resistive load switching times
STP110N15F7
Figure 3: Test circuit for gate charge behavior
Figure 4: Test circuit for inductive load switching and diode recovery times
Figure 5: Unclamped inductive load test circuit
Figure 6: Unclamped inductive waveform Figure 7: Switching time waveform
6/11 DocID029154 Rev 1
STP110N15F7
4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
DocID029154 Rev 1 7/11
Package information
4.1 TO-220 type A package information
Figure 8: TO-220 type A package outline
STP110N15F7
8/11 DocID029154 Rev 1
STP110N15F7
Dim. e1
F
H1
J1
L
L1
L20
D
D1
E e
A b b1 c
L30
øP
Q
Table 8: TO-220 type A mechanical data mm
Min. Typ.
4.40
0.61
1.14
0.48
15.25
1.27
10
2.40
4.95
1.23
6.20
2.40
13
3.50
16.40
28.90
3.75
2.65
Package information
10.40
2.70
5.15
1.32
6.60
2.72
14
3.93
3.85
2.95
Max.
4.60
0.88
1.70
0.70
15.75
DocID029154 Rev 1 9/11
Revision history
5
STP110N15F7
Revision history
Date
15-Apr-2016
Table 9: Document revision history
Revision
1
Changes
First release.
10/11 DocID029154 Rev 1
STP110N15F7
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