ESDL031-1BF4
Datasheet
3.3 V ultra-low clamping single line bidirectional ESD protection
ST0201 package
Product status link
ESDL031-1BF4
Features
• Ultra-low clamping voltage: 6.3 V TLP at 16 A I pp
• Bidirectional protection diode
• Very low dynamic resistance: 85 mΩ
• Low leakage current: 100 nA max at 3.3 V V
RM
• ST0201 package
• ECOPACK2 compliant component
• Exceeds IEC 61000-4-2 level 4:
– ±25 kV (contact discharge)
– ±30 kV (air discharge)
Application
Where transient over voltage protection in ESD sensitive equipment is required, such as:
• Smartphones, mobile phones and accessories
• Tablets and notebooks
• Portable multimedia devices and accessories
• Wearable, home automation, healthcare
• Highly integrated systems
Description
The ESDL031-1BF4 is a bidirectional single line TVS diode designed to protect the power line against EOS and ESD transients.
The device is ideal for applications where board space saving is required.
DS13106 - Rev 1 - September 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1
ESDL031-1BF4
Characteristics
Characteristics
Symbol
V pp
P pp
I pp
T j
T stg
T
L
Table 1. Absolute maximum ratings (T amb
= 25 °C)
Peak pulse voltage
Parameter
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
Peak pulse power (8/20 μs)
Peak pulse current (8/20 μs)
Operating junction temperature range
Storage junction temperature range
Maximum lead temperature for soldering during 10 s
Figure 1. Electrical characteristics (definitions)
Value
±25
±30
45
7
-55 to 150
-65 to 150
260
Unit kV
W
A
°C
Ipp
Symbol
V
BR
I
R
V
CL
I
RM
V
RM
I
PP
R
D
=
=
=
=
=
=
=
Parameter
Breakdown voltage
Breakdown current
Clamping voltage
Leakage current at V
RM
Stand-off voltage
Peak pulse current
Dynamic resistance
I
V
DS13106 - Rev 1 page 2/11
ESDL031-1BF4
Characteristics
Table 2. Electrical characteristics (values) (T amb
= 25° C)
Symbol
V
RM
V
BR
I
RM
V
CL
V
CL
C
V
R
CL
D
LINE
Parameter Test condition
Reverse working voltage
Breakdown voltage
Leakage current
I
R
= 1 mA
V
RM
= 3.3 V
Reverse clamping voltage I pp
= 7 A - 8/20µs
Reverse clamping voltage 8 kV contact discharge after 30 ns, IEC 61000-4-2
Reverse clamping voltage TLP measurement (pulse duration 100 ns)
I
PP
= 4 A
I
PP
= 16 A
Dynamic resistance, TLP pulse duration 100 ns (from 4 A to 16 A I pp
)
Line capacitance V
LINE
= 0 V, F = 1 MHz, V
OSC
= 30 mV
Min. Typ. Max. Unit
3.3
5.0
5.5
6.6
V
V
6.6
5.2
6.3
30 100 nA
7 V
V
V
85
10 12 mΩ pF
DS13106 - Rev 1 page 3/11
ESDL031-1BF4
Characteristics (curves)
1.1
Characteristics (curves)
150
100
50
0
0
Figure 2. Leakage current versus junction temperature
(typical values)
300
Ir(nA)
V
R
= V
RM
250
V
RM
= 3.3 V
200
25 50 75 100 125
T j
(°C)
150
Figure 3. Junction capacitance versus applied voltage
(typical values)
Figure 4. ESD response to IEC 61000-4-2 (+8 kV contact discharge)
5 V/div
20.6 V
1
3
4
1
2
Peak clamping voltage
Clamping voltage at 30 ns
Clamping voltage at 60 ns
Clamping voltage at 100 ns
Figure 5. ESD response to IEC 61000-4-2 (-8 kV contact discharge)
5 V/div
2
-5.8 V
3
-5.3 V
4
-4.7 V
6.6 V
2
5.8 V
3
5.2 V
4
1
-21.3 V
3
4
1
2
Peak clamping voltage
Clamping voltage at 30 ns
Clamping voltage at 60 ns
Clamping voltage at 100 ns
20 ns/div
20 ns/div
Figure 6. TLP characteristic
TLP current (A)
-8 -7 -6 -5 -4 -3 -2
25
20
15
10
5
0
-1
-5
0
-10
-15
-20
-25
1 2 3 4 5 6 7
TLP current (V)
8
Figure 7. S21 attenuation measurement result
S21(dB)
F(Hz)
DS13106 - Rev 1 page 4/11
2
2.1
ESDL031-1BF4
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
ST0201 package information
Figure 8. ST0201 package outline
Note: The marking codes can be rotated by 90° or 180° to differentiate assembly location. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose.
Ref.
D
D1
A b
E
E1 fD fE
Min.
0.130
0.1675
0.560
0.260
0.205
0.0175
0.0175
Table 3. 0201 package mechanical data
Dimensions
Millimeters
Typ.
0.150
0.1875
0.580
0.3375
0.280
0.225
0.0275
0.0275
Max.
0.170
0.2075
0.600
0.300
0.245
0.0375
0.0375
DS13106 - Rev 1 page 5/11
ESDL031-1BF4
ST0201 package information
Figure 9. Marking
Pin 1 Pin 2
Note: The marking codes can be rotated by 90° or 180° to differentiate assembly location. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose.
Figure 10. Tape and reel specification (in mm)
2.0 ±0.05 4.0 ±0.10
Ø 1.5 ±0.10
0.2 ±0.02
0.20 ±0.03
All dimensions are typical values in mm
0.34 ±0.03 2.0 ±0.05
0.3 raised cross-bar
User direction of unreeling
Ø 0.17 ±0.05
DS13106 - Rev 1 page 6/11
3
3.1
Recommendation on PCB assembly
Footprint
1.
SMD footprint design is recommended
Figure 11. Footprint in mm
0.187 0.150
ESDL031-1BF4
Recommendation on PCB assembly
3.2
Solder mask opening
Stencil opening design
1.
Recommended design reference a.
Stencil opening dimensions: 75 µm / 3 mils b.
Stencil aperture ratio : 100%
Figure 12. Stencil opening recommendations
0.170 0.167
Stencil apertures
DS13106 - Rev 1 page 7/11
3.3
3.4
3.5
3.6
ESDL031-1BF4
Solder paste
Solder paste
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste is recommended.
3.
Offers a high tack force to resist component movement during high speed.
4.
Use solder paste with fine particles: powder particle size 20-38 µm.
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
3.
Standard tolerance of ±0.05 mm is recommended.
4.
1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open vias.
2.
The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
Reflow profile
Figure 13. ST ECOPACK ® recommended soldering reflow profile for PCB mounting
250
Temperature (°C)
200
150
100
50
0.9 °C/s
0 30 60
2 - 3 °C/s
240-245 °C
60 sec
(90 max)
-2 °C/s
-3 °C/s
-6 °C/s
90 120 150 180
Time (s)
210 240 270 300
Note: Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020.
DS13106 - Rev 1 page 8/11
4
ESDL031-1BF4
Ordering information
Ordering information
Figure 14. Ordering information scheme
ESD L 03 1 - 1 B F4
ESD protection
Low capacitance
V
RM
03 = 3.3 Vmax.
Version
Number of lines
B = Birectional
Package
F4 = ST0201
Order code
ESDL031-1BF4
Marking
H
Table 4. Ordering information
Package
ST0201
Weight
0.116 mg
Base qty.
15000
Delivery mode
Tape and reel
DS13106 - Rev 1 page 9/11
Revision history
Date
24-Sep-2019
Revision
1
Table 5. Document revision history
Changes
First issue.
ESDL031-1BF4
DS13106 - Rev 1 page 10/11
ESDL031-1BF4
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© 2019 STMicroelectronics – All rights reserved
DS13106 - Rev 1 page 11/11
