STMicroelectronics SPC572LADPT100S User Manual

UM3063

User manual

SPC572LADPT100S evaluation board

Introduction

The SPC572LADPT100S mini module is an evaluation board supporting STMicroelectronics SPC572L64E3 device in

LQFP100-EP package.

Figure 1. SPC572LADPT100S

Note: picture not contractual.

UM3063 - Rev 1 - August 2022

For further information contact your local STMicroelectronics sales office.

www.st.com

1

UM3063

Overview

Overview

The SPC572LADPT100S mini module is an evaluation board supporting the STMicroelectronics SPC572L64E3 device in LQFP100-EP package.

The SPC572LADPT100S mini module can be connected onto the SPC58XXMB motherboard. It offers a mechanism for easy customer evaluation of the SPC572Lxx family of device and to facilitate hardware and software development. High density connectors provide the interface between the EVB and MCU daughter cards and help the developers evaluate all device peripherals.

This user manual provides information on using the SPC572LADPT100S mini module board and its hardware features.

The mini module may be used as a standalone unit allows access to the CPU, but no access to the I/O pins as any motherboard peripherals.

Figure 2. Overview of SPC572LADPT100S mini module - top

UM3063 - Rev 1 page 2/29

Figure 3. Overview of SPC572LADPT100S mini module - bottom

UM3063

Supported devices

1.1

Supported devices

The SPC572LADPT100S evaluation board supports the following STMicroelectronics family of microcontrollers in

LQFP100-EP:

• SPC572L64E3

UM3063 - Rev 1 page 3/29

UM3063

License agreement

2

License agreement

The packaging of this evaluation board was sealed with a seal stating, by breaking this seal, you agree to the terms and conditions of the evaluation board license agreement, the terms and conditions of which are available at https://www.st.com/resource/en/evaluation_board_terms_of_use/evaluationproductlicenseagreement.pdf.

Upon breaking the seal, you and STMicroelectronics entered into the evaluation board license agreement, a copy of which is also enclosed with the evaluation board for convenience.

Attention: This evaluation board only offers limited features for evaluating ST products. It has not been tested for use with other products and is not suitable for any safety or other commercial or consumer application. This evaluation board is otherwise provided “AS IS” and STMicroelectronics disclaims all warranties, express or implied, including the implied warranties of merchantability and fitness for a particular purpose.

UM3063 - Rev 1 page 4/29

3

UM3063

Handling precautions

Handling precautions

Please take care to handle the package content in order to prevent electrostatic discharge.

Before the EVB is used or the power is applied, please fully read the following sections on how to correctly configure the board. Failure to correctly configure the board may cause irreparable component, MCU or EVB damage.

UM3063 - Rev 1 page 5/29

UM3063

Hardware description

4

Hardware description

4.1

4.2

4.3

•

•

•

•

•

•

•

Hardware features

The SPC572LADPT100S mini module board has the following features:

• Can be used as a stand-alone board by providing external power supplies input (5 V, 3.3 V, 1.25 V)

Reset button with driver and led indicator

SPC572LADPT100S has socket for device in LQFP100-EP package

Debug ports:

– 34-pin SAMTEC connector for Nexus 2

– 14-pin header connector for JTAG port

– 12-pin header connector for SIPI interface

40 MHz crystal main oscillator with jumpers to optionally disconnect it

8 MHz oscillator with jumpers to optionally disconnect it

Clock input through SMA connector to optionally disconnection

2 X SAMTEC QSH series, 240 way connector to connect mini module to motherboard

•

•

•

Hardware dimensions

The evaluation board has the following dimensions:

• PCB area: 127 mm x 114.3 mm

Top components height: 18.8 mm

Bottom components height: 3.5 mm

PCB thickness 1.6 mm

Pin numbering for jumpers

3-pin jumpers for the mini module have rectangular pad to indicate the position of pin 1 and there is the PCB silk-screen with the numbers of all the pins. See the example below for the numbering convention used in this manual for jumpers settings:

Figure 4. Overview of 3-pin jumpers numbering convention

6-pin jumpers for the mini module have the PCB serigraphy with the numbers of all pins. See the example below for the numbering convention used in this manual for jumpers settings:

Figure 5. Overview of 6-pin jumpers numbering convention

UM3063 - Rev 1 page 6/29

5

5.1

UM3063

Power and system configuration

Power and system configuration

Power supplies

When the mini module is plugged onto the motherboard, power is supplied directly by the motherboard. In this setup, the external power supply input available on the mini module should NOT be used.

When the SPC572LADPT100S mini module is used as a stand-alone board external power supplies must be used (5 V, 3.3 V, 1.25 V).

The following jumpers are used to configure the power supply:

Table 1. Power supplies configuration jumpers

Jumper

J1

J3

J5

J6

J7

J8

J25

J26

Description

•

•

VDD_HV_ADV voltage configuration:

1-2: 5V_LR (linear)

2-3: 5V_SW (switching)

•

•

VDD_HV_ADR voltage configuration:

1-2: 5V_LR (linear)

2-3: 5V_SW (switching)

•

•

VDD_HV_IO_JTAG/VDD_HV_OSC0 voltage configuration:

1-2: 5V_SR

2-3: 3.3V_SR

•

•

VDD_HV_IO_MAIN voltage configuration:

1-2: 5V_SR

2-3: 3.3V_SR

•

•

VDD_HV_IO_ETH voltage configuration:

1-2: 5V_SR

2-3: 3.3V_SR

•

•

VDD_LV1 configuration for external 1.25 V use:

Open: VDD_LV1 not connected to 1.25 V

Closed: VDD_LV1 connected to 1.25 V

•

•

VDD_LV2 configuration for external 1.25V use:

Open: VDD_LV2 not connected to 1.25 V

Closed: VDD_LV2 connected to 1.25 V

•

•

VDD_LV3 configuration for external 1.25 V use:

Open: VDD_LV3 not connected to 1.25 V

Closed: VDD_LV3 connected to 1.25 V

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

.

Default

1-2 (5V_LR)

1-2 (5V_LR)

1-2 (5V_SR)

1-2 (5V_SR)

1-2 (5V_SR)

Open

Open

Open

Position

B2 (1)

B2 (1)

B2 (1)

B2 (1)

B2 (1)

C2

(1)

B2 (1)

B2 (1)

UM3063 - Rev 1 page 7/29

5.2

UM3063

Port configuration

Port configuration

The following jumpers need to configure the ports:

Table 2. Ports related jumpers

Jumper

J9

J10

J11

J27

JP1

JP2

JP3

JP4

JP5

JP7

JP8

JP9

JP10

JP11

Description

•

•

PD[6] connection to QSH connectors configuration:

Open: PD[6] not connected to QSH connectors (motherboard)

Closed: PD[6] connected to QSH connectors (motherboard)

•

•

PD[6] c connection to EVTI configuration:

Open: PD[6] not connected to EVTI

Closed: PD[6] connected to EVTI

•

•

TESTMODE connection configuration:

Open: TESTMODE not connected

Closed: TESTMODE connected to:

– R6 mounted: pulldown (default)

– R3 mounted: pullup

•

•

PD[6] connection to EVTO configuration:

Open: PD[6] not connected to EVTO

Closed: PD[6] connected to EVTO

•

•

PD[6] connection to VDD_LV3

Open: PD[6] not connected to VDD_LV3

Closed: PD[6] connected to VDD_LV3

•

•

PA[6] connection configuration:

1-2: PA[6] connected to TCK

2-3: PA[6] connected to DRCLK

•

•

PA[9] connection to QSH connectors configuration:

Open: PA[9] not connected to QSH connectors (motherboard)

Closed: PA[9] connected to QSH

•

•

PA[2] connection configuration

1-2: PA[2] connected to QSH

2-3: PA[2] connected to VDD_HV_IO_MAIN

•

•

PA[8] connection configuration:

1-2: PA[8] connected to TDI

2-3: PA[8] connected to SIPI_TXP

•

•

PF[13] connection to QSH connectors configuration:

Open: PF[13] not connected to QSH connectors (motherboard)

Closed: PF[13] connected to QSH

•

•

PD[6] c connection to SIPI_TXN configuration:

Open: PD[6] not connected to SIPI_TXN

Closed: PD[6] connected to SIPI_TXN

•

•

PD[7] connection to QSH connectors configuration:

Open: PD[7] not connected to QSH connectors (motherboard)

Closed: PD[7] connected to QSH

•

•

PA[6] connection to QSH connectors configuration:

Open: PA[6] not connected to QSH connectors (motherboard)

Closed: PA[6] connected to QSH

•

PA[7] connection to QSH connectors configuration:

Open: PA[7] not connected to QSH connectors (motherboard)

Default

Closed

Open

Open

Open

1-2 (TCK)

Open

1-2

1-2 (TDI)

Closed

Open

Closed

Open

Open

Position

C2 (1)

C2 (1)

Closed (default pull-down) A2

(1)

C2 (1)

C2 (2)

B2

(1)

A3

(1)

A2

(1)

B2

(1)

B2

(1)

B2

(1)

B2

(1)

B2

(1)

B2

(1)

UM3063 - Rev 1 page 8/29

5.3

UM3063

System clock configuration

Jumper

JP12

•

Description

Closed: PA[7] connected to QSH

•

•

PA[8] connection to QSH connectors configuration:

Open: PA[8] not connected to QSH connectors (motherboard)

Closed: PA[8] connected to QSH

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

2. Refer to the Figure 11. SPC572LADPT100S mini module - bottom

Default

Open

Position

B2

(1)

System clock configuration

The mini module supports the usage of crystal clock sources as well as external clock source:

Table 3. System clock related jumpers

Jumper

J13

J15

J17

J19

Description

•

•

EXTAL connection configuration:

1-2: EXTAL connected to 40 MHz crystal clock source

2-3: EXTAL connected to EXTAL EVB clock source

•

•

XTAL connection configuration:

1-2: XTAL connected to 40 MHz crystal clock source

2-3: XTAL connected to XTAL EVB clock source

•

•

8 MHz oscillator enable jumper:

Open: 8 MHz oscillator not enabled

Closed: 8 MHz oscillator enabled

•

•

Jumper selector of external clock source:

1-2: from 8 MHz oscillator

2-3: from SMA connector

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

Default

1-2 (XT1 pin2)

Position

C3

(1)

1-2 (XT1 pin1)

Open

1-2

C3

(1)

D3

(1)

C3

(1)

UM3063 - Rev 1 page 9/29

5.4

5.5

UM3063

Reset circuit configuration

Reset circuit configuration

The mini module supports different ways to reset the devices. To use and perform the reset driving there are different jumpers and switches:

Table 4. Reset configuration jumpers

Jumper Description

SW1 Reset push button

J18

J20

•

•

External reset connection to the ESR0 pin configuration:

Open: the external reset is not connected to the ESRO pin

Closed: the external reset is connected to the ESRO pin

•

•

External reset connection used to reset driver configuration:

Open: the external reset is not connected to the reset driver for ESRO and PORST pins

Closed: the external reset is connected to the reset driver for ESRO and PORST pins

J21

•

•

External reset connection to PORST pin configuration:

Open: the external reset is not connected to the PORST pin

Closed: the external reset is connected to the PORST pin

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

Default Position

Open D1

(1)

Closed

Closed

Closed

D1

(1)

D1

(1)

D2

(1)

Connectors

The mini module has other connectors described in the table below:

Table 5. Connectors

Connectors

J12

J14

J16

J2

J23

J24

Description

14-pin header connector for JTAG port

34-pin SAMTEC connector for nexus 2

10-pin SIPI interface connector

External power supplies input

2 X SAMTEC QSH series, 240 way connector to connect minimodule to motherboard

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

2. Refer to the Figure 11. SPC572LADPT100S mini module - bottom

Position

A1

(1)

A2

(1)

C2

(1)

D4

(1)

A4 ... D4

(2)

A1 ... D1

(2)

UM3063 - Rev 1 page 10/29

UM3063 - Rev 1

The following figure shows the JTAG connector scheme:

VDD_HV_IO_JTAG/VDD_HV_OSC

Figure 6. JTAG connector scheme

TDI

TDO

TCK

EVTI

ESR0

EVTO

EVTI

ESR0

EVTO

NOT MOUNTED

R7

0R DNP

1/10W

0603

NOT MOUNTED

GND

C34

47pF DNP

50V

0603

COG/NP0

GND

C35

27pF

50V

0603

COG/NP0

J12

9

11

13

5

7

1

3

N2514-6002RB

10

12

14

6

8

2

4

GND

PORST

PORST

TMS

VDD_HV_IO_JTAG/VDD_HV_OSC

The following table shows the JTAG connector pinout:

Pin number

1

2

3

4

5

6

7

10

11

12

8

9

13

14

Table 6. JTAG Header 2x7 pins connector pinout

Signal

TDI

GND

TDO

GND

TCK

GND

EVTI

PORST

ESR0

TMS

VDD_HV_IO_MAIN

GND

EVTO

N.C.

R14

10K DNP

1/10W

0603

NOT MOUNTED

TRST

R8

10K

1/10W

0603

GND

UM3063

Connectors page 11/29

UM3063 - Rev 1

The following picture shows the NEXUS SAMTEC ASP-137973-01 connector schema:

Figure 7. NEXUS SAMTEC ASP-137973-01

GND

3.3V_SR

J14

GND

TX0P

TX0N gnd

TX1P

TX1N gnd

TX2P

TX2N gnd

TX3P

TX3N gnd n.c.

n.c.

gnd n.c.

n.c.

SH1

17

19

21

23

9

11

13

15

25

27

29

31

33

SH1

1

3

5

7

+V

TCK

TMS

TDI

TDO

JCOMP

EVTI1

EVTI0

EVTO0

PORST

ESR0 gnd

CLKP

CLKN gnd

EVTO1 n.c.

SH2

SAMTEC ASP-137973-01

18

20

22

24

10

12

14

16

2

4

6

8

26

28

30

32

34

SH2

EVTI

EVTO

PORST

ESR0

GND

EVTI

EVTO

PORST

ESR0

C38

47pF DNP

50V

0603

COG/NP0

NOT MOUNTED

Table 7. NEXUS SAMTEC ASP-137973-01 connector pinout

Pin number

15

16

17

18

19

10

11

12

13

14

5

6

7

8

9

3

4

1

2

Signal

TDO

GND

JCOMP

N.C.

N.C.

N.C.

EVTI

GND

EVTO

N.C.

N.C.

3.3 V

N.C.

TCK

GND

TMS

TX1P

TDI

TX1N

TCK

TMS

TDI

TDO

TRST

UM3063

Connectors page 12/29

UM3063 - Rev 1

UM3063

Connectors

Pin number

29

30

31

32

33

34

SH1

SH2

24

25

26

27

28

20

21

22

23

The following figure shows the SIPI interface scheme:

SIPI_TXP

SIPI_TXN

SIPI_RXN

SIPI_RXP

SIPI_TXP

SIPI_TXN

SIPI_RXN

SIPI_RXP

Figure 8. SIPI interface scheme

J16

9

SH1

5

7

1

3

6

8

2

4

10

SH2

ERF8-005-05.0-L-DV-L-TR

GND GND

DRCLK

DRCLK

Signal

GND

GND

N.C.

N.C.

N.C.

N.C.

GND

GND

PORST

N.C.

ESR0

GND

GND

N.C.

N.C.

N.C.

N.C.

page 13/29

UM3063 - Rev 1

The following picture shows the SIPI interface connector pinout:

Pin number

1

2

3

4

5

6

9

10

7

8

Table 8. SIPI interface connector pinout

The following figure shows the external power supply connector scheme:

Figure 9. External power supply connector scheme

1.25V_SR

3.3V_SR

5.0V_SR

Signal

SIPI_TXP

GND

SIPI_TXN

GND

GND

DRCLK

SIPI_RXN

GND

SIPI_RXP

GND

J2

3

4

1

2

1437671-6

GND

Table 9. External power supply connector pinout

Pin number

1

2

3

4

Signal

1.25 V

3.3 V

5 V

GND

UM3063

Connectors page 14/29

5.6

UM3063

Test points

Test points

Several test points of different shape and functionality are scattered around the SPC572LADPT100S evaluation board to allow easy access to MCU and reference signals. This chapter summarizes and describes the available test points. Test points are listed and detailed in the following table.

Table 10. Test points

TP7

TP8

TP9

TP10

TP3

TP4

TP5

TP6

Test point

GT1

GT2

GT3

GT4

GT5

TP1

TP2

TP11

TP16

TP17

TP18

TP19

1. Refer to the Figure 10. SPC572LADPT100S mini module - top

Description

GND test point

GND test point

GND test point

GND test point

GND test point

AGND test point

TRST test point (JTAG)

TCK test point (JTAG)

TMS test point (JTAG)

TDI test point (JTAG)

TDO test point (JTAG)

SIPI_TXN test point

SIPI_TXP test point

SIPI_RXN test point

SIPI_RXP test point

J23A, QSH connector, pin10 (PA[5]) test point

J23A, QSH connector, pin19 (PA[14]) test point

J24B, QSH connector, pin210 (PD[6]) test point

J24B, QSH connector, pin209 (PD[7]) test point

J24B, QSH connector, pin183 (PF[13]) test point

Position

A3

(1)

D3 (1)

C2 (1)

A1

(1)

D1 (1)

C3 (1)

A1

(1)

A1

(1)

C2 (1)

C2 (1)

C2 (1)

A4

(1)

A1

(1)

A1

(1)

A1

(1)

C2 (1)

A4

(1)

C1 (1)

D1 (1)

C1 (1)

UM3063 - Rev 1 page 15/29

6

1

Layout overview

A

Figure 10. SPC572LADPT100S mini module - top

B C D

UM3063

Layout overview

2

3

4

UM3063 - Rev 1 page 16/29

1

2

3

4

A

Figure 11. SPC572LADPT100S mini module - bottom

B C D

UM3063

Layout overview

UM3063 - Rev 1 page 17/29

7

BOM

Table 11. BOM

Item Qty Reference

DUT1

GT1, GT2, GT3, GT4, GT5, TP1

J1, J3, J5, J6, J7, J13, J15, J19

J2

J8, J9, J10, J11, J17, J18, J20, J21, J25,

J26, J27

11

8

1

1

6

J12

J14

J16

J22

JP2, JP4, JP5, JP6

LD1, LD2

OSC1

SW1

TP2, TP3, TP4, TP5, TP6, TP7, TP8,

TP9, TP10, TP11, TP16, TP17, TP18,

TP19

U1

U3

XT1

JP1, JP3, JP7, JP8, JP9, JP10, JP11,

JP12

J23, J24

14

8

R1

R2

R3

R4

R5

R6

1

1

1

1

1

1

1

2

1

1

LAVAREDO-LQFP100EP

TEST2

STRIP3PM

TYCO-1437671-6

STRIP2PM

1

1

1

1

M.14.180 LP-3M

SAM-ASP13797301

CONNERF805X2-SMD

BNC-SMA-FEM-180

1

1

4 JUMPER

2 LEDSMDGIAL-0805, LEDSMDRED-0805

Q8MHZ-SMD-3953M

PULSANTER

TEST2

74_125

74V1G08-SMD

Q40MHZ-SMD-5032

JUMPER

SAM-QSH12001LDA

RESMD49R9-805

RESMD000-0603

RESMD103-0603

RESMD472-0603

RESMD472-0603

RESMD103-0603

Value

8 MHz

40 MHz

49R9

0R

10K

4K7

4K7

10K

Option

Top 1

DNP

Top

Top

Top

Bottom/Top 2

14

5

2

Bottom

Bottom

Bottom

Top

Bottom

Bottom

Top

2

2

2

2

258

2

2

Top

Top

Top

Top

Top

Top

Top

Top

Top

Layer

Top

Top

Top

Top

2

4

4

3

2

14

38

14

2

Pins Footprint

103 100LQFP_EP(20X20)WELLS_3014_100_X_0E

1 TEST2

3

4

SIP-3P

TYCO-1437671-6

SIP-2P

N2514-6002RB

ASP-137973-01

ERF8-005-05.0-X-DV-L

SMA-PASTERNACK-PE4117

JUMPER_SMD_3VIA_SMALL

LED_SMD_0805

QUARZO-SMD-ECS-3953

PUSH_BUTTON

CHIRI-SMD

SO14NB

SOT-23-5LEAD

QUARZO-SMD-NX5032GA

JUMPER

QSH-120-01-X-D-A

RES-0805-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

Item

C5

C6

C7

C8

C9

R25

R26

R27

C1

C2

C3

C4

R21

R22

R23

R24

R7

R8

R14

R15

C15

C16

C17

C18

C19

C20

C10

C11

C12

C13

C14

Reference

RESMD000-0603

RESMD103-0603

RESMD103-0603

RESMD000-0603

RESMD561-0603

RESMD561-0603

RESMD103-0603

RESMD221-0603

RESMD472-0603

RESMD221-0603

RESMD101-0603

CCERSMD225-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD475-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD475-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD475-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD475-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD475-0805M

CCERSMD104-0603M

CCERSMD102-0603V

Qty

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

Pins

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

Layer

Top

Top

Top

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Top

Top

Top

Top

Top

Top

Top

Top

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Value

4K7

220R

100R

2.2uF

100nF

1nF

4.7uF

100nF

1nF

4.7uF

100nF

1nF

0R DNP

10K

10K

0R

560R

560R

10K

220R

100nF

1nF

4.7uF

100nF

1nF

4.7uF

100nF

1nF

4.7uF

100nF

1nF

Option

DNP

DNP

Footprint

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

RES-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

Item

C29

C30

C31

C32

C33

C34

C35

C36, C37

C38

C39

C25

C26

C27

C28

C21

C22

C23

C24

Qty

1

1

1

1

1

1

1

2

1

1

1

1

1

1

1

1

1

1

Reference

CCERSMD475-0805M

CCERSMD104-0603M

CCERSMD473-0603M

CCERSMD225-0805M

CCERSMD225-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD225-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD225-0805M

CCERSMD104-0603M

CCERSMD102-0603V

CCERSMD470-0603

CCERSMD270-0603

CCERSMD100-0603

CCERSMD470-0603

CCERSMD104-0603M

Value

4.7uF

100nF

47nF

2.2uF DNP

2.2uF DNP

100nF

1nF

2.2uF DNP

100nF

1nF

2.2uF DNP

100nF

1nF

47pF

27pF

10pF

47pF

100nF

Option

DNP

DNP

DNP

Pins

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

Layer

Bottom

Bottom

Bottom

Bottom

Bottom

Top

Top

Top

Top

Top

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Bottom

Footprint

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0805-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

CAP-0603-SMALL

8

Schematics

J2

1437671-6

1

2

3

4

1.25V_SR

3.3V_SR

5.0V_SR

GND

AGND

28

DUT1A

VSS_HV_ADR VDD_HV_ADR

ADC

VDD_HV_ADV

OSC & JTAG (3.3V or 5V)

VDD_HV_IO_JTAG/VDD_HV_OSC

29

39

55

SPC572LADPT100S

Power Pins

I/O (3.3v - 5V)

VDD_HV_IO_MAIN3

85

VDD_HV_IO_MAIN2

51

VDD_HV_IO_MAIN1

20

ETHERNET SUPPLY

VDD_HV_IO_ETH

95

FLASH DECOUPLING

VDD_HV_FLA

86

GND

103

EPAD

LAVAREDO-LQFP100EP

MCU CORE LOGIC (1.25V)

VDD_LV1

19

VDD_LV2

52

VDD_LV3

68

AGND

R2

0R

1/10W

0603

GND

GT1

TEST2

GT2

TEST2

GT3

TEST2

RING -HEADED FOR PROBE HOOK

GT4

TEST2

GT5

TEST2

GND

TP1

TEST2

AGND

Figure 12. Power and decoupling

5.0V_LR

DEFAULT

1-2 CLOSED

2

J3

STRIP3PM

3.3V_SR

5.0V_SR

1.25V_SR

VDD_HV_ADR

C1

2.2uF

16V

0805

X7R

C2

100nF

50V

0603

X7R

C3

1nF

100V

0603

X7R

R1

49R9

1/10W

0805

AGND

VDD_HV_ADV

5.0V_LR

DEFAULT

1-2 CLOSED

2

J1

STRIP3PM

C4

4.7uF

16V

0805

X7R

C5

100nF

50V

0603

X7R

C6

1nF

100V

0603

X7R

AGND

VDD_HV_IO_JTAG/VDD_HV_OSC

C7

4.7uF

16V

0805

X7R

C8

100nF

50V

0603

X7R

C9

1nF

100V

0603

X7R

GND

VDD_HV_IO_JTAG/VDD_HV_OSC

2

J5

STRIP3PM

DEFAULT

1-2 CLOSED

VDD_HV_IO_MAIN

C10

100nF

50V

0603

X7R

VDD_HV_IO_ETH

GND

C11

1nF

100V

0603

X7R

C12

4.7uF

16V

0805

X7R

VDD_HV_FLA

VDD_LV1

NOT MOUNTED

C22

100nF

50V

0603

X7R

C23

47nF

50V

0603

X7R

C24

2.2uF DNP

16V

0805

X7R

NOT MOUNTED

GND

C31

2.2uF DNP

16V

0805

X7R

C32

100nF

50V

0603

X7R

C33

1nF

100V

0603

X7R

VDD_LV2

GND

NOT MOUNTED

C28

2.2uF DNP

16V

0805

X7R

C29

100nF

50V

0603

X7R

C30

1nF

100V

0603

X7R

GND

VDD_LV3

C25

2.2uF

16V

0805

X7R

C26

100nF

50V

0603

X7R

C27

1nF

100V

0603

X7R

GND

C13

100nF

50V

0603

X7R

C14

1nF

100V

0603

X7R

C15

4.7uF

16V

0805

X7R

GND

C19

100nF

50V

0603

X7R

GND

VDD_HV_IO_MAIN

C16

100nF

50V

0603

X7R

GND

C17

1nF

100V

0603

X7R

C18

4.7uF

16V

0805

X7R

VDD_HV_IO_ETH

2

J6

STRIP3PM

DEFAULT

1-2 CLOSED

C20

1nF

100V

0603

X7R

C21

4.7uF

16V

0805

X7R

2

J7

STRIP3PM

DEFAULT

1-2 CLOSED

VDD_LV3

J8

STRIP2PM default OPEN

J25

STRIP2PM default OPEN

J26

STRIP2PM default OPEN

Figure 13. Signals

PA[0..15]

PA[0..15]

THESE JUMPERS

ARE NORMALLY OPEN

PA0

PA1

PA2

PA3

PA4

PA6

PA7

PA8

PA9

PA10

PA11

PA12

PA13

TRST

PA15

TCK

TMS

TDI

TDO

JP10

JP11

JP12

JP3

TRST

TCK

TMS

TDI

TDO

TP2 TP3 TP4 TP5 TP6

DEFAULT 1-2 CLOSED

JP2

SOLDER JUMER

1 3

DRCLK

DEFAULT 1-2 CLOSED

1

JP5

3

SIPI_TXP

SOLDER JUMER

2

59

61

81

82

78

79

65

62

63

60

80

77

76

48

DUT1B

PA[0]

PA[1]

PA[2]

PA[3]

PA[4]

PA[5]

PA[6]

PA[7]

PA[8]

PA[9]

PA[10]

PA[11]

PA[12]

PA[13]

50

PA[15]

PB[0..15]

PB[0..15]

DEFAULT 1-2 CLOSED

VDD_HV_IO_MAIN

SOLDER JUMER

3

JP6

1

PB15

PB0

PB1

PB2

PB3

PB4

38

37

36

35

32

PB[0]

PB[1]

PB[2]

PB[3]

PB[4]

PC[0..15]

PD[0..15]

PC[0..15]

PD[0..15]

PC8

PC9

PC10

PC11

PC12

PC13

PC14

PC15

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PB8

PB9

PB10

PB11

PB12

PB13

PB14

96

94

93

92

98

97

4

3

6

5

8

7

12

11

10

9

24

23

22

21

47

46

45

44

PB[8]

PB[9]

PB[10]

PB[11]

PB[12]

PB[13]

PB[14]

PB[15]

PC[0]

PC[1]

PC[2]

PC[3]

PC[4]

PC[5]

PC[6]

PC[7]

PC[8]

PC[9]

PC[10]

PC[11]

PC[12]

PC[13]

PC[14]

PC[15]

PD0

PD1

PD2

PD3

PD4

PD5

PD6

PD7

PD8

PD9

PD10

PD11

PD12

PD13

PD14

PD15

DEFAULT CLOSED JP9

SIPI_RXP

16

17

1

2

49

42

43

34

72

73

58

57

90

89

88

87

PD[0]

PD[1]

PD[2]

PD[3]

PD[4]

PD[5]

PD[6]

PD[7]

PD[8]

PD[9]

PD[10]

PD[11]

PD[12]

PD[13]

PD[14]

PD[15]

EVTI

EVTO

SIPI_TXN

J9

J10

J27

JP8 default OPEN

STRIP2PM default CLOSED

STRIP2PM default OPEN

STRIP2PM default OPEN

LAVAREDO-LQFP100EP

JP1 default OPEN

PA2

JP4

SOLDER JUMER

DEFAULT

1-2 CLOSED

VDD_HV_IO_MAIN

VDD_LV3 TO PIN 68 OF THE DUT

PE[0]

PE[1]

PE[2]

PE[3]

PE[5]

PE[6]

PE[7]

PE[8]

PE[9]

PE[10]

PE[11]

PE[12]

PE[13]

PE[14]

PE[15]

PF[0]

PF[1]

PF[2]

PF[3]

PF[13]

PG[6]

PG[7]

PG[8]

PORST

ESR0

TESTMODE

XTAL

EXTAL

41

40

100

99

56

25

26

27

66

67

64

54

53

75

83

84

91

69

70

71

74

33

31

30

13

14

15

18

PORST

ESR0

XTAL

EXTAL

PE0

PE1

PE2

PE3

PE5

PE6

PE7

PE8

PE9

PE10

PE11

PE12

PE13

PE14

PE15

PF0

PF1

PF2

PF3

SIPI_RXN

JP7

DEFAULT CLOSED

PF13

PG6

PG7

PG8

XTAL

EXTAL

PE[0..15]

PF[0..15]

PG[1..15]

VDD_HV_IO_MAIN VDD_HV_IO_MAIN

R4

4K7

PF[0..15]

1/10W

0603

PE[0..15]

PF[0..15]

PG[1..15]

PORST

R5

4K7

1/10W

0603

ESR0

TP7

SIPI_TXN

TP8

SIPI_TXP

SIPI_RXN

TP10

SIPI_RXP

TP9

SIPI_TXN

SIPI_TXP

SIPI_RXN

SIPI_RXP

5.0V_SR

R3

10K DNP

1/10W

0603

NOT MOUNTED

J11

1 2

STRIP2PM default CLOSED

R6

10K

1/10W

0603

GND

Figure 14. Reset JTAG, SIPI, Nexus interface and crystal oscillator

C36

10pF DNP

50V

0603

COG/NP0

NOT MOUNTED XT1

40MHz

NX5032GA

J13

STRIP3PM

DEFAULT

1-2 CLOSED

2

C37

10pF DNP

50V

0603

COG/NP0

NOT MOUNTED

R15

0R

1/10W

0603 J15

STRIP3PM

DEFAULT

1-2 CLOSED

2

EXTAL

EVB-EXTAL

(MCU Crystal Input)

EXTAL

XTAL

(MCU Crystal Output)

XTAL

GND GND

REMOVE XTAL jumper when driving EXTAL from

Oscillator Module or External Source (PLL Enabled)

Connect XTAL jumper to GND when driving EXTAL from

Oscilaltor Module or External Source (PLL Bypass Mode)

External Clock Input

Note - Internal

Pull-Up on Pin 1

GND

C39

100nF

0603

50V

X7R

1

OSC1

EN

2

GND

8MHz

7x5

+Vs

OUT

4

3

J17

STRIP2PM

ENABLE default OPEN

3.3V_SR

OSC-MOD

Note - External 3.3V

egulator MUST be enabled when using oscillator module

J19

STRIP3PM

DEFAULT

1-2 CLOSED

2

EVB-EXTAL

J22

BNC-SMA-FEM-180

SMA style

Connector

1

R27

100R

1/10W

0603

GND

EXTAL-SMA

Jtag interface

Nexus interface GND

3.3V_SR

J14

GND

9

11

13

15

5

7

1

3

17

19

21

23

25

27

29

31

33

SH1

TX0P

TX0N gnd

TX1P

TX1N gnd

TX2P

TX2N gnd

TX3P

TX3N gnd n.c.

n.c.

gnd n.c.

n.c.

SH1

+V

TCK

TMS

TDI

TDO

JCOMP

EVTI1

EVTI0

EVTO0

PORST

ESR0 gnd

CLKP

CLKN gnd

EVTO1 n.c.

SH2

SAMTEC ASP-137973-01

10

12

14

16

6

8

2

4

18

20

22

24

26

28

30

32

34

SH2

EVTI

EVTO

PORST

ESR0

GND

EVTI

EVTO

PORST

ESR0

LVDS signals are not routed to motherboard.

JTAG signals are not routed to motherboard.

EVT signals have the option of adding a jumper on daughtercard to route signals to motherboard.

C38

47pF DNP

50V

0603

COG/NP0

NOT MOUNTED

VDD_HV_IO_JTAG/VDD_HV_OSC

TDI

TDO

TCK

EVTI

ESR0

EVTO

EVTI

ESR0

EVTO

VDD_HV_IO_JTAG/VDD_HV_OSC

NOT MOUNTED

R7

0R DNP

1/10W

0603

NOT MOUNTED

GND

C34

47pF DNP

50V

0603

COG/NP0

GND

C35

27pF

50V

0603

COG/NP0

Place CAPS as close to connector pins as

JTAG Connector

J12

9

11

13

5

7

1

3

N2514-6002RB

6

8

2

4

10

12

14

PORST possible but do NOT fit cap C48 at board assembly.

PORST

TMS

R14

10K DNP

1/10W

0603

NOT MOUNTED

TRST

R8

10K

1/10W

0603

GND

GND

TDI, TDO, TCK, TMS & JCOMP are not connected to daughter card.

PORST, ESR0, EVTI and EVTO are connected to daughtercard

TCK

TMS

TDI

TDO

TRST

SIPI interface

SIPI_TXP

SIPI_TXN

SIPI_RXN

SIPI_RXP

SIPI_TXP

SIPI_TXN

SIPI_RXN

SIPI_RXP

GND

J16

9

SH1

5

7

1

3

2

4

6

8

10

SH2

ERF8-005-05.0-L-DV-L-TR

GND

DRCLK

DRCLK

RESET

VDD_HV_IO_MAIN VDD_HV_IO_MAIN

SW1

Pushbutton

R23

10K

1/10W

0603

RST-SW

R21

560R

1/10W

0603

VDD_HV_IO_MAIN

LD1

Yellow

0805

USER RESET LED

RST-SW

GND

2

VCC

U1A

3

J20

GND

SO14

74LVC125AMTR

STRIP2PM default CLOSED

R25

4K7

1/10W

0603

RST-MCU

GND

GND

VDD_HV_IO_MAIN

GND

5

I2

U1B

O2

6

SO14

74LVC125AMTR

R24

220R

1/10W

0603

J18

STRIP2PM default CLOSED

ESR0

ESR0

VDD_HV_IO_MAIN

1

2

VCC

GND

R22

560R

1/10W

0603

4

U3

74V1G08STR

SOT23-5L

LD2

Red

0805

MCU RESET LED

9

I3

U1C

O3

8

GND

SO14

74LVC125AMTR

R26

220R

1/10W

0603

J21

PORST

STRIP2PM default CLOSED

PORST

GND

Figure 15. Daughter card and motherboard connectors

108

110

112

114

116

118

120

100

102

104

106

92

94

96

98

108

110

112

114

116

118

120

100

102

104

106

92

94

96

98

82

84

86

88

90

74

76

78

80

66

68

70

72

58

60

62

64

82

84

86

88

90

74

76

78

80

66

68

70

72

58

60

62

64

38

40

42

44

30

32

34

36

46

48

50

52

54

56

38

40

42

44

30

32

34

36

46

48

50

52

54

56

10

12

14

16

6

8

2

4

18

20

22

24

26

28

10

12

14

16

6

8

2

4

18

20

22

24

26

28

92

94

96

98

100

102

104

84

86

88

90

76

78

80

82

92

94

96

98

100

102

104

84

86

88

90

76

78

80

82

106

108

110

112

114

116

118

120

106

108

110

112

114

116

118

120

68

70

72

74

60

62

64

66

52

54

56

58

44

46

48

50

68

70

72

74

60

62

64

66

52

54

56

58

44

46

48

50

30

32

34

36

38

40

42

22

24

26

28

14

16

18

20

30

32

34

36

38

40

42

22

24

26

28

14

16

18

20

6

8

2

4

10

12

6

8

2

4

10

12

107

109

111

113

115

117

119

91

93

95

97

99

101

103

105

107

109

111

113

115

117

119

91

93

95

97

99

101

103

105

81

83

85

87

89

73

75

77

79

65

67

69

71

57

59

61

63

81

83

85

87

89

73

75

77

79

65

67

69

71

57

59

61

63

37

39

41

43

29

31

33

35

45

47

49

51

53

55

37

39

41

43

29

31

33

35

45

47

49

51

53

55

9

11

13

15

5

7

1

3

17

19

21

23

25

27

9

11

13

15

5

7

1

3

17

19

21

23

25

27

91

93

95

97

99

101

103

83

85

87

89

75

77

79

81

91

93

95

97

99

101

103

83

85

87

89

75

77

79

81

105

107

109

111

113

115

117

119

105

107

109

111

113

115

117

119

67

69

71

73

59

61

63

65

51

53

55

57

43

45

47

49

67

69

71

73

59

61

63

65

51

53

55

57

43

45

47

49

29

31

33

35

37

39

41

21

23

25

27

13

15

17

19

29

31

33

35

37

39

41

21

23

25

27

13

15

17

19

9

11

5

7

1

3

9

11

5

7

1

3

214

216

218

220

222

224

226

228

230

232

234

236

238

240

214

216

218

220

222

224

226

228

230

232

234

236

238

240

196

198

200

202

204

206

208

210

212

180

182

184

186

188

190

192

194

196

198

200

202

204

206

208

210

212

180

182

184

186

188

190

192

194

152

154

156

158

160

162

164

166

168

170

172

174

176

178

152

154

156

158

160

162

164

166

168

170

172

174

176

178

138

140

142

144

146

148

150

122

124

126

128

130

132

134

136

138

140

142

144

146

148

150

122

124

126

128

130

132

134

136

SH9

SH10

SH11

SH12

SH13

SH14

SH15

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SH16

SH15

SH14

SH13

SH12

SH11

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SH16

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SH12

SH11

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SH1

Revision history

Date

29-Aug-2022

Version

1

Table 12. Document revision history

Changes

Initial release.

UM3063

UM3063 - Rev 1 page 25/29

UM3063

Contents

Contents

1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

1.1

Supported Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 License agreement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

3 Handling precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

4 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

4.1

Hardware features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4.2

Hardware dimension. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4.3

Pin numbering for jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

5 Power and system configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

5.1

Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5.2

Port configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.3

System clock configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.4

Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.5

Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.6

Configuration for Pin Shared . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6 Layout overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

7 BOM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

8 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

UM3063 - Rev 1 page 26/29

UM3063

List of tables

List of tables

Table 1. Power supplies configuration jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 2. Ports related jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 3. System clock related jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 4. Reset configuration jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 5. Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 6. JTAG Header 2x7 pins connector pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 7. NEXUS SAMTEC ASP-137973-01 connector pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 8. SIPI interface connector pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 9. External power supply connector pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 10. Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 11. BOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

UM3063 - Rev 1 page 27/29

UM3063

List of figures

List of figures

Figure 1. SPC572LADPT100S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. Overview of SPC572LADPT100S mini module - top . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Figure 3. Overview of SPC572LADPT100S mini module - bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Figure 4. Overview of 3-pin jumpers numbering convention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 5. Overview of 6-pin jumpers numbering convention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 6. JTAG connector scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 7. NEXUS SAMTEC ASP-137973-01 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 8. SIPI interface scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 9. External power supply connector scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 10. SPC572LADPT100S mini module - top . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 11. SPC572LADPT100S mini module - bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 12. Power and decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 13. Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 14. Reset JTAG, SIPI, Nexus interface and crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 15. Daughter card and motherboard connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

UM3063 - Rev 1 page 28/29

UM3063

IMPORTANT NOTICE – READ CAREFULLY

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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products.

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ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2022 STMicroelectronics – All rights reserved

UM3063 - Rev 1 page 29/29