N3290x Series Demo Board User`s Manual Rev. A2.1

N3290x SERIES DEMO BOARD USER’S MANUAL

N3290x Series Demo Board

User’s Manual

Rev. A2.1

The above information is the exclusive intellectual property of NuvoTon Electronics Corp. and shall not be disclosed, distributed, or reproduced without permission from NuvoTon.

- 1 - Revision: A2.1

2013/7/3


1. N3290x Series Demo Board Functional Description ................................................................................. 3

① Power Unit: ................................................................................................................................ 7

② USB Connector: ......................................................................................................................... 7

③ Audio and Video Ports: .............................................................................................................. 7

④ Microphone: ............................................................................................................................... 8

⑤ Reset: .......................................................................................................................................... 8

⑥ Main clock source: ..................................................................................................................... 8

⑦ GPA/B/C/D/E/TP, JTAG and UART Extension port: ................................................................ 8

⑧ N3290x Series, NAND Memory and Others: .......................................................................... 12

⑨ Key Pads: .................................................................................................................................. 13

⑩ LCM and Sensor Port: .............................................................................................................. 13

⑪ SD Card Port: ........................................................................................................................... 14

⑫ Jumper Setting selection: ......................................................................................................... 14

⑬ Control function pins assignment:............................................................................................ 15

2. Document Revision History ..................................................................................................................... 19

3. Schematics ................................................................................................................................................ 19

Schematic 1：NHS-55FA93-1-IN-1M13 V1.0, TOP ............................................................ 20

Schematic 2：NHS-55FA93-1-IN-1M13 V1.0, N3290x ....................................................... 21

Schematic 3：NHS-55FA93-1-IN-1M13 V1.0, POWER ..................................................... 22

Schematic 4：NHS-55FA93-1-IN-1M13 V1.0, MODE ........................................................ 23

Schematic 5：NHS-55FA93-1-IN-1M13 V1.0, USB_SD .................................................... 24

Schematic 6：NHS-55FA93-1-IN-1M13 V1.0, NAND ......................................................... 25

Schematic 7：NHS-55FA93-1-IN-1M13 V1.0, AV ................................................................ 26

Schematic 8：NHS-55FA93-1-IN-1M13 V1.0, PORT ......................................................... 27

Schematic 9：NHS-55FA93-1-IN-1M13 V1.0, ST_SEL ...................................................... 28

Schematic 10：NHS-55FA93-1-IN-1D13 V1.0, TOP ........................................................... 30

Schematic 11：NHS-55FA93-1-IN-1D13 V1.0, CMOS ....................................................... 31

Schematic 12：NHS-55FA93-1-IN-1D13 V1.0, UI ............................................................... 32

Schematic 13：NHS-55FA93-1-IN-1D13 V1.0, LCD ........................................................... 33



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1. N3290x Series Demo Board Functional Description

PCB NHS-55FA93-1-IN-1M11 – Front View:

③

③



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PCB NHS-55FA93-1-IN-1M11 – Back View:

⑪

⑪



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PCB NHS-55FA93-1-IN-1D12 – Front View:

⑩

⑩



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PCB NHS-55FA93-1-IN-1D12 – Back View:

⑩

⑩

⑩



2013/7/3


①

Power Unit:

+5V

Generate the power required for system operation.

System operation voltage: 3.3V and 1.8V.

CON1

0V

Fig.1 Power adaptor input

- CON1：Power adaptor input, 5V input, polarity as Fig.1

- SW1：When system power is off state and push the SW1 key then PWR LED (LED1) will be lighting and system power will be turn on. When system power is on state and push the

SW1 key and holding about 6~7 second, the system power should be auto turn off.

- CON2, 3 (optional)：External battery input connector, if want to connect external battery, the voltage range keep on 3.7V to 4.2V and properly voltage polarity

②

USB Connector:

- USB connector: CON4, mini-B type USB device port.

- USB connector: CON1(on 1D12 board), A-type USB host port.

- U5: USB host power supply, DC-DC step-up.

- SW8: U5 enable control by GPD3.

- SW1: USB host power selection, one is DC-DC, another is DC 3.3V.

③

Audio and Video Ports:

Audio and video output connector:

- CON8：Earphone Jack left and right audio channel out and video composite output.

- CON9：The connector is for Audio power amplifiers speak output.

- U6：ISD8101, audio power amplifier to magnify audio signals DAC0/1 of U1.



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④

Microphone:

- M1：Condenser microphone, it outputs through RC network to ADC inputs of U1.

- M2 & M3 (optional): Dual auxiliary microphone control by audio codec of U10.

- U10 (optional): External codec, NAU8501, NAU8520 or NAU882x.

- JP1: Auxiliary audio output, for NUA882x only,

- JP2: Auxiliary audio inputs, for NUA882x only.

- JP3: Speaker outputs, for NUA8822 only.

- Selector: S32 ~ S36, the detail setting need to reference external codec specification.

⑤

Reset:

- SW10：System reset tack switch, when it pressed once the whole circuits will be enter reset condition.

⑥

Main clock source:

- X1：RTC clock source, 32.768KHz.

- Y1：Main clock source, 12MHz or 27MHz, it depends on U1 is N32905U1DN and

N32903U1DN or N32905U2DN.

⑦

GPA/B/C/D/E/TP, JTAG and UART Extension port:

- GPA/B/C/D/E, Reset, TP, VDD33, VDD18, VSS and VIN control pins as follow :



2013/7/3


34 GPC1

36 GPD11

38 GPD9

40 TP4

42 TP2

44 GPD13

46 GPA5

48 GPA3

50 GPA1

52 GPD0

54 GPD2

56 GPD4

58 VSS

18 GPE1

20 GPC15

22 GPC13

24 GPC11

26 GPC9

28 GPC7

30 GPC5

32 GPC3

2 GPA11

4 GPB5

6 GPB3

8 GPB1

10 GPB14

12 GPB13

14 VSS

16 VSS

CON12 (Top board, 1D12) Header 29x2, 2.54mm Male:

GPC0 33

GPD10 35

GPB15 37

TP3 39

TP1 41 nRESET 43

GPA6 45

GPA4 47

GPA2 49

GPA0 51

GPD1 53

GPD3 55

VIN 57

GPE0 17

GPC14 19

GPC12 21

GPC10 23

GPC8 25

GPC6 27

GPC4 29

GPC2 31

GPA10 1

GPB6 3

GPB4 5

GPB2 7

GPB0 9

GPA7 11

VDD18 13

VDD33 15



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CON12 (Bottom board, 1M11), Header 29x2, 2.54mm Female:

1

GPB6 3

GPB4 5

GPB2 7

2

4 GPB5

6 GPB3

8 GPB1

GPB0 9 10 GPB14

GPA7 11 12 GPB13

VDD18 13 14 VSS

VDD33 15 16 VSS

GPE0 17 18 GPE1

GPC14 19 20 GPC15

GPC12 21 22 GPC13

GPC10 23 24 GPC11

GPC8 25 26 GPC9

GPC6 27 28 GPC7

GPC4 29 30 GPC5

GPC2 31 32 GPC3

GPC0 33 34 GPC1

GPD10 35 36 GPD11

GPB15 37 38 GPD9

TP3 39 40 TP4

TP1 41 42 TP2 nreset 43 44 GPD13

GPA6 45 46 GPA5

GPA4 47 48 GPA3

GPA2 49 50

51 52 GPD0

GPD1 53 54 GPD2

GPD3 55 56

VIN 57 58 VSS



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JTAG [CON10], Header 10x2 with Housing, 2.54mm 90˚˚˚˚.

VDD33 1 nTRST 3

TDI 5

TMS 7

TCK 9

VSS 11

TDO 13 nRESET 15

17

19

2 VDD33

4 VSS

6 VSS

8 VSS

10 VSS

12 VSS

14 VSS

16 VSS

18 VSS

20 VSS

UART [ CON11], D-SUB 9 pins Female :

1

TX 2

RX 3

4

VSS 5

6

7

8

9



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- SLOT1, External Flash card Connector.

RnB2 1 nCE2 3

NVDD33 5 nWR 7

2 nRE

4 NVDD33

6 nWP2

8 ALE

CLE 9 10 MVS

MVS 11 12 ND3

ND2 13 14 ND1

ND0 15 16 CDET

ND4 17 18 ND5

ND6 19 20 ND7

⑧

N3290x Series, NAND Memory and Others:

- U1：LQFP128 package of N32905U1DN, N32905U2DN or N32903U1DN.

- U7：UART transceiver, TRS3232EC, TI.

- U5：NAND Flash (optional), HY27UF081G2A, 1Gb memory size.

- U8 or U9：SPI Flash.

- S3~S30: U1 chip control paths selector.



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⑨

Key Pads:

- Keys：K1~K6.

- Keys input source (GPA2, VSS), output path had GPA5/6/7.

- Key matrix block diagram:

⑩

LCM and Sensor Port:

Dedicated connector for proper LCM and CMOS：

- CON6 (optional) for GPG48273QS5 or HSD04319W1-A LCM module pins assignment.

- CON7 for GPM1006E0 LCM module pins assignment.

- CON8 for touch panel on LCM module.

- OV1 for CCS6003 (OV7670 or YT99050CX) CMOS sensor module.

- OV2 (optional) for NK-0314 (OV7725) CMOS sensor module.

- U4, LCM back light LED driver.

- Selector (on 1D12 board):

- SW3: Back light intensity control by GPD0.

- Back light enable selection:

- SW4: Control by GPD1.



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- SW9: Always enable by pull-up.

- SW9 & SW5: Control by GPD2.

- SW9 & SW10 (Pin 1 & Pin 2 shorted): Control by GPD11.

- SW10 (Pin & Pin3 shorted): LCM’s VDEN signal control by GPD11.

- SW2: CMOS sensor Power down control by GPD13.

⑪

SD Card Port:

- CON5 (1M11 board, back side): SD card connector.

- CON6 (1M11 board, front side): mini-SD card connector.

- S39~S44: CON6 control signal selector:

- S39: SD’s D2 signal selection by GPD6 or GPB5.

- S40: SD’s D3 signal selection by GPD5 or GPB4.

- S41: SD’s CMD signal selection by GPD8 or GPB3.

- S42: SD’s CLK signal selection by GPD7 or GPB2.

- S43: SD’s D0 signal selection by GPE9 or GPB1.

- S44: SD’s D1 signal selection by GPE8 or GPB0.

⑫

Jumper Setting selection:

- Power on setting selection (S2, RS1, RS3, RS4 and RS5):

The Selection definition as follow:

ND2 ND0 Note (S2)

ON

ON

OFF

OFF

ON

OFF

ON

OFF

ND7 (RS3) NAND Cycles

Recovery mode, 12MHz Crystal

Normal mode, 12MHz Crystal

Recovery mode, 27MHz Crystal

Normal mode, 27MHz Crystal

SHORT

OPEN

4

5



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LVD5 (RS2) LVD4 (RS1)

SHORT SHORT

SHORT

OPEN

OPEN

OPEN

SHORT

OPEN

NAND Page Size

2KB

4KB

8KB

None (by IBR)

ND5 (RS5) ND4 (RS4) Memory Type

SHORT SHORT SDRAM

SHORT

OPEN

OPEN

OPEN

SHORT

OPEN

LPDDR

DDR

DDR II

⑬

Control function pins assignment:

NHS-W55FA93xxx Pins Definition

N3290xU2DN N3290xU1DN

No. Name No. Name GPIO SPI 0 SD 0 SD 1 SD 2 USB HUSB

MODE 2 MODE3

MPU

LCM(8) SENSOR NAND 0 NAND 1 UART I2C PWR KEY AMP MIC I2S TV

LCM

1 SPCLK

2 SCLKO

3 ISDA

4 ISCK

5 SPI0_CLK

6 SPI0_CS_

7 SPI0_DI

8 SPI0_DO

9 SDDAT[2]

10 SDDAT[3]

11 SDCMD

12 SDCLK

13 SDDAT[0]

1 SPCLK

2 SCLKO

3 ISDA

4 ISCK

5 SPI0_CLK

6 SPI0_CS_

7 SPI0_DI

8 SPI0_DO

9 SDDAT[2]

10 SDDAT[3]

11 SDCMD

12 SDCLK

13 SDDAT[0]

GPB1 D0

GPB0 D1

GPB14

GPB13

GPD12 CLK

GPD13 CS

GPD14 DO

GPD15 DI

GPE4 D2

GPE5 D3

GPE6 CMD

GPE7 CLK

GPE2 D0

SCLK

SDA

SCLKO

SIO_D

SCL SIO_C

PWRDN

SDA

SCL



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14 SDDAT[1]

26 UD_DM

14 SDDAT[1]

26 UD_DM

GPE3 D1

27 UD_DP

29 UD_REXT

27 UD_DP

29 UD_REXT

DM

DP

Rext

32 LVDATA[17] 32 LVDATA[17] GPE1

33 LVDATA[16] 33 LVDATA[16] GPE0

34 LVDATA[15] 34 LVDATA[15] GPC15






40 LVDATA[9] GPC9 40 LVDATA[9]


42 LVDATA[7]

43 LVDATA[6]

44 LVDATA[5]

45 LVDATA[4]

42 LVDATA[7] GPC7

43 LVDATA[6] GPC6

44 LVDATA[5]

45 LVDATA[4]

GPC5

GPC4

46 LVDATA[3]

47 LVDATA[2]

48 LVDATA[1]

49 LVDATA[0]

50 LVDEN

51 LVSYNC

52 LHSYNC

54 LPCLK

46 LVDATA[3]

47 LVDATA[2]

48 LVDATA[1]

49 LVDATA[0]

50 LVDEN

51 LVSYNC

52 LHSYNC

54 LPCLK

GPC3

GPC2

GPC1

GPC0

57 ADC_TP_YM 57 ADC_TP_YM

58 ADC_TP_XM 58 ADC_TP_XM

GPD11

GPD10

GPD9

GPB15

59 ADC_TP_XP

60 ADC_TP_YP

59 ADC_TP_XP

60 ADC_TP_YP

62 ADC_AIN[0] 62 ADC_AIN[0]



XP

YP

WR

CS

YM

XM

LD01

LD00

RS

RD

LD05

LD04

LD03

LD02

LD05

LD04

LD03

LD02

YM

XM

XP

YP

LD01

LD00

LVDEN

LVSYNC

LHSYNC

LPCLK

LD15

SVSYNC

SHSYNC

SPD7

SPD6 LD14

LD13 SPD5

SPD4 LD12

LD11 SPD3

SPD2 LD10

LD09

LD08

LD07

LD06

LD07

LD06

SPD1

SPD0

HP_DET

AMP_EN

MICP

MICN



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112 ND[3]

113 ND[4]

114 ND[5]

115 ND[6]

116 ND[7]

117 NBUSY1_

118 NBUSY0_

119 NWR_

120 NRE_

121 NCLE

66 ADC_AIN[3]

108 GPA[7]

73 GPA[6]

66 ADC_AIN[3]

103 GPA[7]

73 GPA[6]

69 RTC_WAKE_ 69 RTC_WAKE_

70 RTC_PWREN_ 70 RTC_PWREN_

GPA7

GPA6

74 GPA[5]

75 GPA[4]

76 GPA[3]

77 GPA[2]

78 GPA[1]

79 GPA[0]

81 TCK

82 TMS

83 TDI

84 TDO

74 GPA[5]

75 GPA[4]

76 GPA[3]

77 GPA[2]

78 GPA[1]

79 GPA[0]

81 TCK

82 TMS

83 TDI

84 TDO

GPA5

GPA4 H_DM

GPA3 H_DP

GPA2

GPA1 CD

GPA0

DPD0

WP

BL_CTRL BL_CTRL

GPD1

GPD2

GPD3

BL_EN BL_EN

PWR_EN

CS

85 TRST_

86 UD_CDET

85 TRST

86 UD_CDET

GPD4

95 AO_HPOUT_L 95 AO_HPOUT_L

97 AO_HPOUT_R 97 AO_HPOUT_R

102 TV_OUT

109 ND[0]

110 ND[1]

111 ND[2]

104 ND[0]

105 ND[1]

106 ND[2]

Det

107 ND[3]

108 ND[4]

109 ND[5]

110 ND[6]

111 ND[7]

112 NBUSY1_

113 NBUSY0_

114 NWR_

115 NRE_

116 NCLE

GPD6

GPD5

GPD8

GPD7

GPE11

D2

D3

CMD

CLK

CD CD

ND0 ND0

ND1 ND1

ND2 ND2

ND3 ND3

ON/OFF

EN

CARD_DET

OUT

OUT

OUT

IN

HP_DET

AMP_EN

ND4 ND4

ND5 ND5

ND6 ND6

ND7 ND7

NBSY

NBSY nNWR nNWR nNRE nNRE nNCLE nNCLE

L

R

L

R

TV



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122 NALE

123 NCS1_

125 NCS0_

127 URTXD

128 URRXD

117 NALE

118 NCS1_

120 NCS0_

122 URTXD

GPE10

GPE9

GPE8

GPA10

D0

D1

123 URRXD GPA11

124 SPDATA[1] GPB6 CD CD

125 SPDATA[0] GPB5 D2

126 SFIELD

127 SVSYNC

128 SHSYNC

GPB4

GPB3

GPB2

D3

CMD

CLK nNALE nNALE nNCS nNCS

TXD

RXD

CARD_DET DI

DO

WS

BCLK

MCLK



2013/7/3


2. Document Revision History

Date Revision Remarks

10/31/2012 A1.0 Formal release version A1.0

06/06/2013 A2.0 Circuit modify, add memory selection and voltage setting.

07/03/2013 A2.1 Modified Control Funcion Pin Assignment

Table, Page 15.

Important Notice

NuvoTon products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Furthermore, NuvoTon products are not intended for applications wherein failure of NuvoTon products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur.

NuvoTon customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify NuvoTon for any damages resulting from such improper use or sales.

3. Schematics



2013/7/3

Schematic 1：NHS-55FA93-1-IN-1M13 V1.0, TOP

VD33

VD18

VS

VIN

POWER

VD33

VD18

VS

VIN

SHEET 03

AIN2

RTC_WKUP

RTC_PWREN

RTC18V

AIN2

RTC_WKUP

RTC_PWREN

RTC18V

VS

MODE

VS

SHEET 04

ND0

ND2

ND4

ND5

ND7

LVD4

LVD5

GPD[8:5]

GPE[9:8]

GPE11

GPB[6:0]

VD33

VS

USB_SD

GPD[8:5]

GPE[9:8]

GPE11

USBDP

USBDM

USB_DET

GPB[6:0]

VD33

VS

SD_D0

SD_D1

SD_D2

SD_D3

SD_CMD

SD_CLK

SD_CD

SD_WP

SHEET 05

GPB2

GPB3

GPB4

GPB5

GPB6

P[101:128]

GPA7

GPA11

GPA10

ST_SEL

GPB2

GPB3

GPB4

GPE8

GPE9

GPE10

GPE11

GPD5

GPD6

GPD7

GPD8

ND[0:7]

GPB5

GPB6

P[101:128]

GPA7

GPA11

GPA10

ADAVDD33

GPE8

GPE9

GPE10

GPE11

GPD5

TVVREF

TVREXT

TVCOMP

TVOUT

TVDVSS

TVDVDD

GPD6

GPD7

GPD8

ND[0:7]

VDD33

VDD18

VSS

SHEET 09

ND0

ND2

ND4

ND5

ND7

GPC4

GPC5

USBDP

USBDM

USB_DET

GPE2

GPE3

GPE4

GPE5

GPE6

GPE7

GPA1

GPA0

ADAVDD33

TVVREF

TVREXT

TVCOMP

TVOUT

TVDVSS

TVDVDD

VDD33

VDD18

VSS

RTC_WKUP

RTC_PWREN

RTC18V

N3290x

RTC_WKUP

RTC_PWREN

RTC18V

GPC[0:15]

GPE[0:1]

GPD[9:11]

GPB15

TP[1:4]

GPC[0:15]

GPE[0:1]

GPD[9:11]

GPB15

TP[1:4]

TVCOMP

TVVREF

TVREXT

TVDVDD

TVDVSS

ADAVDD33

AIN[0:2]

GPB[0:1]

GPB[13:14]

USBDP

USBDM

USB_DET

GPE[2:7]

GPA[0:6]

P[101:128]

VDD33

VDD18

VSS

GPB14

GPB13

GPB2

GPB3

GPB4

GPB5

GPB6

GPB[0:1]

GPB[13:14]

USBDP

USBDM

USB_DET

GPE[2:7]

GPA[0:6]

P[101:128]

VDD33

VDD18

VSS

SHEET 02

DAC[0:1]

GPD[12:15]

ADCVSS

GPD[0:4] nRESET

VD33

VD18

VS

AUDIO

SDIO

SCLK

MCLK

BCLK

FS

DACIN

ADCOUT

SHEET 10

ROUT

LOUT

VD33

VD18

VIN

VS

NAND

GPD2

GPB6

ND[0:7]

GPD2

GPB6

ND[0:7] VD33

VS

TVCOMP

TVVREF

TVREXT

TVDVDD

TVDVSS

GPE11

GPE10

GPE9

GPE8

CLE

ALE nCE2 nCE1

ADAVDD33

GPD5

GPD6

GPD7

GPD8

RnB1

RnB2 nRE nWR

SPI0_CS

SPI0_CLK

SPI0_DI

SPI0_DO

AIN[0:2]

DAC[0:1]

GPD[12:15]

ADCVSS

AIN0

AIN1

TVOUT

DAC0

DAC1

GPD[0:4]

ADCVSS

SHEET 06

AV

AIN0

AIN1

TVOUT

DAC0

VD33

VS

AMP_EN0

HP_DET0

DAC1 HP_DET1

AMP_EN1

ADCVSS

LOUT

ROUT

LOUT

ROUT

SHEET 07 nRESET

VD33

VD18

VS

ROUT

LOUT

VD33

VD18

VIN

VS

PORT

GPD4

GPD3

GPD2

GPD1

GPD0 nTRST

TDO

TDI

TMS

TCK

GPA10

GPA11

TX

RX nRESET nRESET

SHEET 08

VD33

VD18

VS

VIN

VD33

VS

GPD13

GPD12

GPD14

GPD15

VD33

VS

GPE0

GPE1

GPD3

GPD4

VD33

VD18

VS

VIN

GPA10

GPB6

GPB4

GPB2

GPB0

GPA7

VD18

VD33

GPE0

GPC14

GPC12

GPC10

GPC8

GPC6

GPC4

GPC2

GPC0

GPD10

GPB15

TP3

TP1 nRESET

GPA6

GPA4

GPA2

GPA0

GPD1

GPD3

VIN


- 20 -

Revision: A2.1

2013/7/3

CON12

45

47

49

51

53

55

57

37

39

41

43

29

31

33

35

21

23

25

27

13

15

17

19

1

3

5

7

9

11

HEADER29x2

46

48

50

52

54

56

58

38

40

42

44

30

32

34

36

22

24

26

28

14

16

18

20

10

12

6

8

2

4

GPC5

GPC3

GPC1

GPD11

GPD9

TP4

TP2

GPD13

GPA5

GPA3

GPA1

GPD0

GPD2

GPD4

VS

GPA11

GPB5

GPB3

GPB1

GPB14

GPB13

VS

VS

GPE1

GPC15

GPC13

GPC11

GPC9

GPC7

Schematic 2：NHS-55FA93-1-IN-1M13 V1.0, N3290x

VD33

VD33

VS

L2

FB

R3

0R

L4

FB

R4

0R

TVDVDD

+

CP4

10u

TVDVSS

ADAVDD33

+

CP9

10u

P[101:128]

VS ADAVSS33

GPB[0:1]

GPB[13:14]

GPD[12:15]

GPE[2:7]

MVSSQ

USBDM

USBDP

USBVSS

CB14

0.1u

R9

12.1K

GPB1

GPB0

GPB14

GPB13

GPD12

GPD13

GPD14

GPD15

GPE4

GPE5

GPE6

GPE7

GPE2

GPE3

X11

X12

VDD18

MVSSQ

MVDDQ

MVSSQ

MVDDQ

MVDD

MVREF

USBVDD18

USBVSS

USBVDD33

USBREXT

MVDD

VSS

GPE1

24

25

26

27

28

29

30

31

32

3

4

5

6

1

2

14

15

16

17

18

19

20

21

22

23

10

11

12

13

7

8

9

SPCLK/GPB1/UHL_DM1/SD1D0

SCLKO/GPB0/UHL_DP1/SD1D1

ISDA/GPB14/LMVsy nc

ISCK/GPB13

SPI0_CLK/GPD12

SPI0_nCS0/GPD13

SPI0_DI/GPD14

SPI0_DO/GPD15

SDD2/GPE4

SDD3/GPE5

SDCMD/GPE6

SDCLK/GPE7

SDD0/GPE2

SDD1/GPE3

Xin

Xout

VDD18

MVSSQ

MVDDQ

MVSSQ

MVDDQ

MVDD

MVref

USBVDD18

USB_VSS

USB_DM

USB_DP

USB_VDD33

USB_Rext

MVDD

VSS33

LVD17/GPE1/SVsy nc

GPE[0:1]

P[101:128]

TVDVDD

C1

0.1u

TVCOMP

U1

N3290x

LQFP-128, 14X14mm, FOOTPRINT 2.0mm

MVSSQ

ADAC_HPL

ADAC_HPVDD33

ADAC_HPVSS33

MVDDQ

MVDDQ

MVSSQ

MVref

MVSS

VDD18

USB_Det nTRST/GPD4/HUR_RTS/SPI0_nCS1

TDO/GPD3/HUR_CTS/PWM3

TDI/GPD2/HUR_Rx/PWM2

TMS/GPD1/HUR_Tx/PWM1

TCK/GPD0/SPI1_nCS1/PWM0 nRST

GPA0

GPA1/SD_nCD

GPA2/LMVsy nc

GPA3/UHL_DP1

GPA4/UHL_DM1

GPA5/SPI0_nCS1

GPA6/SPI1_nCS1

VDD33

RTC_VDD

RTC_PWREN

RTC_nWakeUp

RTC_Xin

RTC_Xout

ADC_AIN3

MVSS

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

75

74

96

95

94

93

92

91

73

72

71

70

69

68

67

66

65

TVVREF

C2

0.1u

TVREXT

R1

160

TVDVSS

ADAVREF

C3

1u

ADAVSS33

TVCOMP

TVVREF

TVREXT

TVDVDD

TVDVSS

ADAVDD33

VDD33

VDD18

VSS

VDD33

CP1

10u

+

CP2

10u

+

CP3

10u

+

CB1

0.1u

CB2

0.1u

CB3

0.1u

R2

0R

L1

FB

VD33

CP5

10u

CP6

10u

VSS

CP7

10u

CP8

10u

CB4

0.1u

CB5

0.1u

CB6

0.1u

CB7

0.1u

VS

VDD18

VD18

MVDD

CB8

0.1u

DAC[0:1]

VD33

VD18

VS

ADCVSS

RTC18V

R5

1K+/-1%

MVDDQ

+

CP10

10u

CP11

10u

CB9

0.1u

+

+

+

MVSSQ

DAC0

HPVDD

HPVSS

MVDDQ

MVDDQ

MVSSQ

MVREF

MVSSQ

VDD18

MVREF

CB13

0.1u

MVSSQ

VDD33

GPD4

GPD3

GPD2

GPD1

GPD0

GPA0

GPA1

GPA2

GPA3

GPA4

GPA5

GPA6

RTC18V

R6

1K+/-1%

GPD[0:4]

GPA[0:6]

USB_DET

GPD[0:4] nRESET

GPA[0:6]

RTC_PWREN

RTC_WKUP

X21

X22

AIN3

MVSSQ

TP

1

AIN3

MVDD

MVSSQ

+ +

CB10

0.1u

CB11

0.1u

CB12

0.1u

MVSSQ

+

CP12

10u

L6

FB

VD18

1

2

3

VD33

S50

--N32901

SW3PAD-S

HPVDD

L3

FB

R7

0R

VSS

L5

FB

VD18

1

2

3

VD33

S49

--N32901

SW3PAD-S

CP13

10u

+

HPVSS

ADCVDD

CP14

10u

+

VS

R8

0R

L7

FB

FB

R10

0R

L8

VS

VD33

VD33

ADCVSS

USBVDD33

CP15

10u

+

L9

FB

R12

0R

VS

VD33

C4

20p

X11

R11

1M

X12

Y 1

1

XIN GND

2

GND

27MHz

XOUT

4

3

C5

20p

GPE0

GPC[0:15]

GPD[9:11]

TP[1:4]

AIN[0:2]

X21

R13

10M

X1

X22

C6

33p

32.768KHz

C7

33p

VSS

GPC[0:15]

GPD[9:11]

AIN[0:2]

TP[1:4]

GPB15

VSS


- 21 -

Revision: A2.1

2013/7/3

USBVSS

USBVDD18

+

CP16

10u

L10

FB

VS

VD18

Schematic 3：NHS-55FA93-1-IN-1M13 V1.0, POWER

AIN2 VIN

CB15

0.1u

R15

100K

R14

200K

CON1

DC5V

3

R16

D1

RB161M

VS

CON2

3

2

1

BAT1

VS

VS

10K

3

Q1

IS2301

2

CON3

2

1

BAT2

CP27

47u

+

C34

0.1u

5VIN

R78

10K

ZD1

5V6

R79

4K7

1

RTC_PWREN

RTC_WKUP

SW1

PW_SW

SOT-23-GSD

Q3

2

2N3906

Q4

IS2301

3

C35

0.01u

VS

VIN

CP17

47u

VS

+

R80

10K

VS

47K

10K

R18

RTC18V

2

U3

VOUT VIN

3

R67

C8

0.1u

CB19

0.1u

XC6206P182MR

SOT-23-GOI

RTC_PWREN

RX5

51K

VS

CX5

10n

VS

VS CX2

0.1u

1

U2

VIN

RTC_PWREN

3

CE

2

SW

VSS FB

ZT7104AS

SOT23-5L

VS

(ZT7104)

5

4

RX2

150K

LX1 4.7uH

INDUCTOR IRON

CX1 30p

RX1 680K

CP18

47u

CAP_B

+

VD33 R17

1K

CB17

0.1u

LED1

Power

CX4

0.1u

1

U21

VIN

3

CE

2

SW

VSS FB

ZT7104AS

SOT23-5L

5

4

RX4

120K

VS

LX2 4.7uH

INDUCTOR IRON

CX3 30p

RX3 240K

CP19

47u

CAP_B

+

1.8V : 240K/120K

2.0V : 300K/120K

VD18

VS

CB18

0.1u

VS

VS

VD33

VD18

VS

RTC18V


- 22 -

Revision: A2.1

2013/7/3

Schematic 4：NHS-55FA93-1-IN-1M13 V1.0, MODE

RS1

0

RS2

0

R66

10K

R77

10K

R22

10K

LVD4

LVD5

LVD5(RS2) LVD4(RS1)

SHORT

SHORT

OPEN

OPEN

SHORT

OPEN

SHORT

OPEN

NAND Page Size

2KB

4KB

8KB

None (by IBR)

ND7(RS3)

SORT

OPEN

NAND Cycle

4

5

S2

1

3

2

4

HPS702-E

RS3

0

R23

10K

R34

10K

ND0

ND2

ND2

SHORT

SHORT

OPEN

OPEN

ND0

SHORT

OPEN

SHORT

OPEN

Rec.

Nor.

Rec.

Note

12MHz crystal.

12MHz crystal.

27MHz crystal.

Nor. 27MHz crystal.

ND7

RS4

0

R24

10K

ND4

ND5

ND5(RS5)

SHORT

SHORT

OPEN

OPEN

ND4(RS4)

SHORT

OPEN

SHORT

OPEN

MEMORY TYPE

SDRAM

LPDDR

DDR2

DDR

VS

RS5

0

R25

10K

VS


- 23 -

Revision: A2.1

2013/7/3

Schematic 5：NHS-55FA93-1-IN-1M13 V1.0, USB_SD

USB_DET

R26

200K

R27

4R7

USBDM

USBDP

USBDM

USBDP

R29

390K

R28

4R7 CX7

NP

L13

FB

VD33

VS

VS

CX6

NP

3

4

5

1

2

VCC

DM

DP

ID

GND

USB_CVSS

CON4

MiniUSB

USB_CVSS

GPD[8:5]

GPE[9:8]

GPB[6:0]

VD33

R30

0

RN2

10KR

SDVDD33

RN3

10KR

GPB5

GPD6

S39 SD2

3

2

SD2_D2

1

GPB4

GPD5

S40 SD3

3

2

SD2_D3

1

GPB3

GPD8

S41 SDCMD

3

2

SDCMD

1

GPB2

GPD7

S42 SDCLK

3

2

SDCLK

1

GPB1

GPE9

S43 SD0

3

2

SD2_D0

1

GPB0

GPE8

S44 SD1

3

2

SD2_D1

1

GPE11

RN4

10KR

R19

33

VS

SDVDD33

C10

10p

GPE11

2

SW7 TF_DET0

1

GPB6

2

SW6 TF_DET1

1

R20

100K

R21

100K

Mini SD SOCKET

VS iSDCLK

11

SW_VDD

1

2

3

4

5

6

7

8

DAT2

DAT3/CD

CMD

VDD

CLK

VSS

DAT0

DAT1

+ CP20

10u

CON6

VS

R19 should be closed to FL91 &

C10 should be closed to CON6.

(GPA1)

SD_CD

(GPE4)

(GPE5)

(GPE6)

SD_D2

SD_D3

SD_CMD

(GPE7)

(GPE2)

(GPE3)

(GPA0)

SD_CLK

SD_D0

SD_D1

SD_WP

R31

33 iSD_CLK

C9

10p

+

CP22

10u

13

12

CON5

CD#

GND

2

3

4

5

9

1

6

7

8

DAT2

DAT3

CMD

VSS

VDD

CLK

VSS

DAT0

DAT1

10

11

WP

GND

SD/MMC

VS


- 24 -

Revision: A2.1

2013/7/3

Schematic 6：NHS-55FA93-1-IN-1M13 V1.0, NAND

VD33

ALE

CLE nWR nRE nCE1

RnB1 nCE2

RnB2

VS

L16

FB

R49

10K

1

S45 CE1

2

R54 0R

NVDD33

1

2

PSL

3

SW8

PSL

1

SW9

WP

2

R58

0R

MVS

R51 0R

MVS

R68

10K

R50

10K

NVDD33

U5

5

11

14

15

3

4

19

20

21

17

16

18

8

9

7

ALE

CLE

WE

RE

CE1

R/B1

10

6

39

/CE2

R/B2

PSL

NC

NC

NC

NC

NC

NC

NC

NC

NC

MVS

R48

0

CB26

0.1uF

CB27

0.1uF

+

CP24

10uF

CAP_A

R69

10K

I/O0

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

29

30

31

32

41

42

43

44

MVS

ND0

ND1

ND2

ND3

ND4

ND5

ND6

ND7

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

22

26

27

28

33

35

40

45

46

47

NVDD33

Toshiba NAND 4-8G

TSOP48-0.5mm

R97

10K

SPI0_DI iSPI0_CS

GPD14

3

4

1

2

U8

W55X16

/CS VCC

DO

/WP

GND

/HOLD

CLK

DI

8

7

6

5

SPI0_CLK

SPI0_DO

MVS

U9

16

15

14

13

12

11

10

9

CLK

DI

NC

NC

NC

NC

GND

WP

HOLD

VCC

NC

NC

NC

NC

CS

DO

W25Q128BV

1

4

5

2

3

6

7

8

RnB2 nCE2

NVDD33 nWR

CLE

MVS

ND2

ND0

ND4

ND6

CP21

10uF

CAP_A

+

SOLT1

11

13

15

17

19

1

7

9

3

5

2

8

10

4

6

12

14

16

18

20

HEADER 10X2

MVS nRE

NVDD33 nWP2

ALE

ND3

ND1

CDET

ND5

ND7

GPD12

GPD15 iSPI0_CS

SPI0_DI

CB28

0.1uF

R99

10K

SPI0_CLK

SPI0_DO

1

R98

10K

S47

CS1

2

2

SW14

CDET

1

3

SW13

WP_X

GPD13

SPI0_CS

ND[0:7]

GPB6

GPD2

MVS


- 25 -

Revision: A2.1

2013/7/3

Schematic 7：NHS-55FA93-1-IN-1M13 V1.0, AV

C17

220uF

CV2 22pF

L17

1.8uH

TVOUT

CB30

0.1uF

R36

680

L18

R52

75

CV3

270pF

CV4

330pF

VD33

R56

3K3

+

CP25

10uF

ADCVSS

C20

C23

330p

FB

DAC0

LOUT

ROUT

DAC1

R53

10

VS

C18

10uF

VS

3

3

1

S37

LIN

2

2

1

S38

RIN

L19

FB

VD33

L20

FB

AIN

5

4

3

6

8

1

2

7

M1

MIC

10uF

C36

470p

C21

R57

30K

AIN0

R55

10

C19

10uF

L21

FB

CON8

PJK-691

R75

100K

R59

3K3

10uF

C22

330p

AIN1

For HP detect

HP_DET0

HP_DET1

1

SW11

HPDET0

2

1 2

SW4

HPDET1

CV1

0.01uF

R71

1K

VS

VS

ADCVSS

ADCVSS

VD33

VS

VD33

L22

FB

SPKVDD

CB31

0.1uF

CP26

47uF

AMP_EN0

AMP_EN1

AIN

C24

1uF

1

SW5

AMPEN0

2

1 2

SW12

AMPEN1

R60

10K

R76

10K

R61

10K

5

U6

INV

4

INP

6

VREF

7

CE

C25

0.1uF

VS

SPP

2

SPN

1

ISD8101

VS

CON9

2

1

SPK

VS


- 26 -

Revision: A2.1

2013/7/3

1

2

3

5

PJK-691

8

7

6

4

Schematic 8：NHS-55FA93-1-IN-1M13 V1.0, PORT

VD33

VD18 VD33

VD33

L23

FB

IVD33

CON10

10

12

14

16

6

8

2

4

18

20

ICE

VS

HEADER10X2\BOX, 2.54mm 90 Degree

VD33

9

11

13

15

5

7

1

3

17

19

L24

FB

R63

10K

C28

10u

+

3

4

1

2

RN6

10KR

8

7

6

5

8

7

6

5

RN7

33R

3

4

1

2

R65

33

D4

1

A

3

K

NC

IN4148

SOT-23-ANK

2

UVD33

SW3

ICE_PWR

1 2

C26

0.1u

R62

100K

VS nTRST

TDI

TMS

TCK

TDO

1

R64

47K

Q2 nRESET

2N3904

C27

0.1u

SW10

RESET

PUS_03_01 nRESET

VS

R96

1K VS VS VS

S48

1

2

(Simulation XROM detection on the none ICE mode)

XROM_DET

VIN

VD33

1

3

2

TMS nTRST

SW2

HUART_PWR

CON7

1

3

5

2

4

6

HEADER 3X2

VS

TDI

TDO

C29

0.1u

VIN

VD18

VD33

VS nTRST

TDI

TMS

TCK

TDO

TX

RX nRESET

RX

TX

VS

C30

0.1u

C32

0.1u

13

8

11

10

1

3

2

U7

R1IN

R2IN

T1IN

T2IN

C1+

C1-

V+

R1OUT

R2OUT

T1OUT

T2OUT

C2+

C2-

V-

ICL-232E

4

5

6

12

9

14

7

C31

0.1u

C33

0.1u

L25

FB

3

8

4

9

5

1

6

2

7

CON11

D-SUB-9

D-SUB 9, Female 90 Degree

VS


- 27 -

Revision: A2.1

2013/7/3

Schematic 9：NHS-55FA93-1-IN-1M13 V1.0, ST_SEL

TVCOMP

TVREXT

TVVREF

TVOUT

TVDVDD

TVDVSS

ADAVDD33

GPA7

ND[0:7]

GPD8

GPD7

GPD6

GPD5

GPE11

GPE10

GPE9

GPE8

GPA10

GPA11

GPB6

GPB5

GPB4

GPB3

GPB2

P[101:128]

VDD33

VSS

VDD18

1-2 : W55FA93SDN

2-3 : W55FA93TDN

ADAVDD33

P101

TVDVSS

1

2

3

SW3PAD-S

VDD18

P102

TVOUT

1

2

3

SW3PAD-S

GPA7

P103

TVCOMP

1

2

3

SW3PAD-S

ND0

P104

TVREXT

1

2

3

SW3PAD-S

ND1

P105

TVVREF

1

2

3

SW3PAD-S

ND2

P106

TVDVDD

1

2

3

SW3PAD-S

ND3

P107

VDD18

1

2

3

SW3PAD-S

ND4

P108

GPA7

1

2

3

SW3PAD-S

ND5

P109

ND0

1

2

3

SW3PAD-S

ND6

P110

ND1

1

2

3

SW3PAD-S

S3

S6

S9

S12

S15

S18

S21

S24

S27

S29

ND7

P111

ND2

GPD6

P112

ND3

GPD5

P113

ND4

GPD8

P114

ND5

GPD7

P115

ND6

1

2

3

SW3PAD-S

1

2

3

SW3PAD-S

1

2

3

SW3PAD-S

1

2

3

SW3PAD-S

1

2

3

SW3PAD-S

GPE11

P116

ND7

1

2

3

SW3PAD-S

GPE10

P117

GPD6

1

2

3

SW3PAD-S

GPE9

P118

GPD5

1

2

3

SW3PAD-S

VSS

P119

GPD8

1

2

3

SW3PAD-S

GPE8

P120

GPD7

1

2

3

SW3PAD-S

S4

S7

S10

S13

S16

S19

S22

S25

S28

S30

VDD33

P121

GPE11

1

2

3

SW3PAD-S

GPA10

P122

GPE10

1

2

3

SW3PAD-S

GPA11

P123

GPE9

1

2

3

SW3PAD-S

GPB6

P124

VSS

1

2

3

SW3PAD-S

GPB5

P125

GPE8

1

2

3

SW3PAD-S

GPB4

P126

VDD33

1

2

3

SW3PAD-S

GPB3

P127

GPA10

1

2

3

SW3PAD-S

GPB2

P128

GPA11

1

2

3

SW3PAD-S

S5

S8

S11

S14

S17

S20

S23

S26


- 28 -

Revision: A2.1

2013/7/3

Schematic 10：NHS-55FA93-1-IN-1M13 V1.0, AUDIO

VREF

C44 1uF

AUXOUT2

M2

MIC

M3

MIC

MCLK

BCLK

FS

ADCOUT

DACIN

SCLK

SDIO

ROUT

LOUT

VD33

VD18

VIN

VS

R82

2K2

VSSA

C38

1uF

CP29

4.7uF

R91 R

R81

2K2

R83

2K2

R84

2K2

VSSA

C39

1uF

C40

1uF

C41

1uF

CB32

0.1uF

MICBIAS

+

LMICN

LMICP

CP28

10uF

VSSA

RMICP

RMICN

BCLK

R85 33

LMICP

LMICN

GPIO2

RMICP

RMICN

GPIO3

FS

IBCLK

1

2

3

4

5

6

7

8

LMICP

LMICN

LLIN/GPIO2

RMICP

RMICN

RLIN/GPIO3

FS

BCLK

EPAD

VSSA

U10

R92 R

VSSP

AUXOUT1

VSSSPK

NC

AUXOUT2

AUXOUT1

RAUXIN

LAUXIN

MODE

SDIO

24

23

22

21

20

19

18

17

VSSP

RSPKOUT

AUXOUT2

AUXOUT1

RAUXIN

LAUXIN

MODE

SDIO

C45 1uF

C46 1uF

RAUXIN

LAUXIN

C47 1uF

NAU8501

(EPAD = VSSA)

RSPKOUT

LSPKOUT

NC: 10, 19~23, 25 (NUA8501)

NC: 23, 25 (NUA8520)

R87

33

SCLK

C42

1uF

MCLK

R86

33

ROUT RHP

LOUT LHP

VDDC

L26

FB

2

S35

1

3

R88

R

R89

R

C43

1uF

CB33

0.1uF

+

CP30

10uF

DACIN

1

S32

2

IDACIN

DACIN (GPB2)

(GPB3)

(GPB4)

(GPB6)

VSSA

(GPB5, NUA882x ONLY)

(GPB13)

(GPB14)

MODE

R90 33

VDDB

2

1

3

S33

MODE

LOW, I2C

VSSD

ICSB

INTERNAL PLL

S34

2

1

CSB

3

CSB

VSSD

J1

1

CSB

VDDB

GPIO2

CB34

0.1uF

VSSD

VSSD

J2

1

CSB

+

L27

FB

CP31

10uF

GPIO3

R93

0

J3

1

CSB

VS

VD33

VD33

VD18

CORE PWR

CB35

0.1uF

VDDP

CB36

0.1uF

VDDA

VSSA

VSSP

+

+

JP1

1

2

AUXout

JP2

1

2

AUXIN

JP3

1

2

L28

FB

CP32

10uF

R94

0

L29

FB

CP33

10uF

R95

0

NUA882x ONLY

NUA882x ONLY

NUA8822 ONLY

SPKOUT

VS

VS

VD33

2

S36

1

3

VD33

SPK PWR

VIN

(5V)


- 29 -

Revision: A2.1

2013/7/3

Schematic 10：NHS-55FA93-1-IN-1D13 V1.0, TOP

VD33

VD18

VS

VD33

VIN

VS

VD33

VS

CMOS

VD33

VD18

VS

SHEET 02

GPC[8:15]

GPE[0:1]

GPB0

GPB1

GPB13

GPB14

GPD13 nRESET

UI

VD33

VIN

VS

SHEET 03

LCD

GPA[2:7]

GPD3

VD33

VS

GPC[0:15]

GPE[0:1]

GPD[9:11]

GPB15

TP[1:4]

GPB13

GPB14

GPD[0:2] nRESET

SHEET 04

GPC[8:15]

GPE[0:1]

GPB0

GPB1

GPB13

GPB14

GPD13 nRESET

GPA[2:7]

GPD3

GPC[0:15]

GPE[0:1]

GPD[9:11]

GPB15

TP[1:4]

GPB13

GPB14

GPD[0:2] nRESET

(GPA10)

GPB6

GPB4

GPB2

GPB0

GPA7

VD18

VD33

GPE0

GPC14

GPC12

GPC10

GPC8

GPC6

GPC4

GPC2

GPC0

GPD10

GPB15

TP3

TP1 nRESET

GPA6

GPA4

GPA2

(GPA0)

GPD1

GPD3

VIN

I2S I/F

(MCLK)

(BCLK)

(WS)

(DO)

(DI)

GPB2

GPB3

GPB4

GPB5

GPB6

VS

CON2

5

6

3

4

1

2

HEADER 6

CON12

45

47

49

51

35

37

39

41

43

53

55

57

27

29

31

33

17

19

21

23

25

1

3

5

7

9

11

13

15

HEADER29x2

46

48

50

52

36

38

40

42

44

54

56

58

28

30

32

34

18

20

22

24

26

8

10

12

14

16

2

4

6

(GPA11)

GPB5

GPB3

GPB1

GPB14

GPB13

VS

VS

GPE1

GPC15

GPC13

GPC11

GPC9

GPC7

GPC5

GPC3

GPC1

GPD11

GPD9

TP4

TP2

GPD13

GPA5

GPA3

(GPA1)

GPD0

GPD2

(GPD4)

VS


- 30 -

Revision: A2.1

2013/7/3

Schematic 11：NHS-55FA93-1-IN-1D13 V1.0, CMOS

GPB14

SW2

GPD13

CMOS_PDN

1 2

R19

NC

CVD30

GPB13 nRESET

GPE1

CVS

R22

10K

GPB0

CMOS_PWDN

GPE0

CVS

CVD18

CB20

0.1uf

R23

33

CVS

CB21

0.1uf

CVD30

GPC15

CB22

GPC14

0.1uf

XCLK

GPC13

CVS

PCLK

GPC12

GPC8

GPC11

GPC9

GPC10

XCLK

CMOS_PWDN

GPB1 PCLK

R24

33

CVS

OV1

13

14

15

16

9

10

11

12

7

8

5

6

3

4

1

2

21

22

23

24

17

18

19

20

Y8

DGND

Y7

PCLK

Y6

Y2

Y5

Y3

Y4

Y1

Y0

NC

AGND

SIO_D

AVDD

SIO_C

RESET

VSYNC

PWDN

HREF

DVDD

DOVDD

Y9

XCLK

FPC-24/0.5mm

CMOS_PWDN

GPC15

GPC14

GPC13

GPC12

CVS

GPC11

GPC10

GPC9

GPC8

GPB13

XCLK

GPB14

CVD30

CVD18

PCLK nRESET

GPE1

GPE0

AVS

OV2

10

11

12

13

8

9

6

7

1

4

5

2

3

14

15

16

17

18

19

20

FPC-20/0.5mm

L15

FB

CVS

VD33

L11

FB

D2

1

A

RS1

0

K

3

2

NC

IN4148

CP21

10uf

+

CVD30

VD18

CB24

0.1uf

L12

FB

CP20

10uf

+

CVD18

CB23

0.1uf

CVS

OV7670:

AVDD: 2.45~3.0V

DVDD: 1.8V

DOVDD: 1.7~3.0V

VS

R25

0 CVS


- 31 -

Revision: A2.1

2013/7/3 nRESET

GPE[0:1]

GPC[8:15]

GPB0

GPB1

GPD13

GPB13

GPB14

VD33

VS

VD18

Schematic 12：NHS-55FA93-1-IN-1D13 V1.0, UI

L18

2.2uH

VIN

D4

R54

10K

6

U5

VIN

RB161M

VOUT

5

R51

470K

GPD3

1 2

SW8

HU_PWR

R53

10K

4

EN

ZT3001

FB

3

R52

150K

+

CP17

47uf

L10

FB

SW1

HUSB_PW

VD33

GPA4

GPA3

VS

R49

33

R50

33

VS

C31

10pf

C32

10pf

R48

15K

R47

15K

L19

FB

VS

H_DM

H_DP

3

4

1

2

VDD

DM

DP

GND

CON1

USBH

L20

FB

HUSB_GND

GPA2

R46

1K

VD33

K1 UP K2 DOWN

RN4

10KR

R2

1K

GPA5

STS-B5

K3 LEFT

STS-B5

K4 RIGHT R3

1K

GPA6

STS-B5

K5

ESC

STS-B5

K6

ENTER

R4

1K

GPA7

STS-B5 STS-B5

VS

GPD3

GPA[2:7]

VD33

VS

VIN


- 32 -

Revision: A2.1

2013/7/3

Schematic 13：NHS-55FA93-1-IN-1D13 V1.0, LCD

GPB13

GPB14

GPB15

GPC[0:15]

TP[1:4]

GPD[0:2]

GPD[9:11]

GPE[0:1] nRESET

LVD33

L14

22uH/1.1MHZ

C13

1uF

BL_EN

GPD0

R32

10K

LVS

R33

10K LVS

6

4

2

U4

Vin

EN

GND

SW

OV

FB

1

5

3

ZT7418/PJ9293

R36

10K

1

SW3

BL_Ctr

2

BL_CTRL LED-

1

D3

RB521S-30

2

LED+

R34

80K

C11

1uF

LVS

C12

1uF

LVS

R35

100K

GPD1

GPD2

VD33

1

1

SW4

BL_En

SW5

LCSB

VS

2

2

FB

0R

BL_EN

LCSB

L13

R39

(L15)

CP23

47uF

+

R38

10K

R6

10K

LVS

LVD33

LVS

CB25

0.1uF

R37

4.7

R42

4K7

LVS

R43

4K7

GPB13

GPB14

LVD33

R44

R45

0R

0R

BL_CTRL

LVD33

SIO_C

SIO_D

R1

10K

C17

NC

GPE0

GPE1

GPC12

GPC13

GPC14

GPC15

GPE0

GPE1

GPC10

GPC11

GPC6

GPC7

GPC8

GPC9

GPC10

GPC11

GPC4

GPC5

GPC0

GPC1

GPC2

GPC3

GPC4

GPC5

GPB15

LCSB

GPD9

GPD10

GPD11

TP4

TP2

TP3

TP1

LED-

LED+

LVS

LVD33

R5

R6

R7

G0

G1

R0

R1

R2

R3

R4

B0

B1

B2

B3

B4

B5

B6

B7

G2

G3

G4

G5

G6

G7

LVS

LPCLK

LCSB

LHSYNC

LVSYNC

LVDEN

CON6

LVS

X1

Y1

X2

Y2

12

13

14

15

16

17

7

8

9

10

11

1

4

5

2

3

6

23

24

25

26

27

18

19

20

21

22

33

34

35

36

37

38

28

29

30

31

32

39

40

LCM_CON 40x1

C21

NC

C18

NC

C19

NC

LVS

GPG48273QS5 & HSD04319W1-A

0.5mm x 40 PINS

480RGB 272 DOTS

UP(Y2)/DN(Y1)/LF(X2)/RT(X1)

VD33

VS

LED-

LED+

L2

L1

C34 1uF/10V

C42

C47

1uF/25V

1uF/10V

FB

FB

CB1

0.1uF

C33

C41

C46

LVS

LVD33

1uF/10V

C35 1uF/10V

C38 1uF/10V

1uF/25V

1uF/10V

CB2

0.1uF

R5

10K

CB3

C36

LVS

0.1uF

1uF/10V

C37 1uF/10V

C39

C40

C43

1uF/10V

1uF/10V

1uF/25V

C44 1uF/25V

C45 1uF/10V

GPD11

GPD10

GPD9

GPB15

GPC0

GPC1

GPC2

GPC3

GPC4

GPC5

GPC6

CON7

FPC_con_45

1

4

5

2

3

6

7

13

14

15

16

17

10

11

8

9

12

GPC7

SIO_D

SIO_C

LCSB nRESET

LVD33

VCORE

VREG1OUT

VCI1

C12+

C12-

18

19

20

21

22

23

24

25

26

27

28

C11+

C11-

DDVDH

C13-

C13+

VCL

VGH

VGL

C23-

C23+

34

35

36

37

38

29

30

31

32

33

C22-

C22+

C21-

C21+

VCOML

VCOMH

39

40

41

42

43

44

45

LVS

LVS

D7

GPM1006E0 3.5"

0.5mm x 45 PINS

320RGB 240 DOTS

VGH

DDVDH

SA10QA03

D5

SA10QA03

D6

LVD33

TP3

TP2

TP4

TP1

LVS

LVS

CON8

3

4

1

2

HEADER 4

VGL

SA10QA03

LVS


- 33 -

Revision: A2.1

2013/7/3

N3290x Series Demo Board User`s Manual Rev. A2.1

N3290x Series Demo Board

User’s Manual

Rev. A2.1

1. N3290x Series Demo Board Functional Description

2. Document Revision History

3. Schematics

Related manuals

Languages

N3290x Series Demo Board User`s Manual Rev. A2.1