GOWIN EMPU(GW1NS-4C) Solution Reference manual

Gowin_EMPU(GW1NS-4C) Solution
Reference Manual
IPUG1013-2.0E,03/14/2024
Revision History
Date
Version
Description
02/03/2023
1.0E
Initial version published.
03/14/2024
2.0E

Software programming reference design and hardware
reference design updated.

GMD software supports RTOS RT-Thread Nano.
Copyright © 2024 Guangdong Gowin Semiconductor Corporation. All Rights Reserved.
is a trademark of Guangdong Gowin Semiconductor Corporation and is
registered in China, the U.S. Patent and Trademark Office, and other countries. All other
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the prior written consent of GOWINSEMI.
Disclaimer
GOWINSEMI assumes no liability and provides no warranty (either expressed or implied)
and is not responsible for any damage incurred to your hardware, software, data, or
property resulting from usage of the materials or intellectual property except as outlined in
the GOWINSEMI Terms and Conditions of Sale. GOWINSEMI may make changes to this
document at any time without prior notice. Anyone relying on this documentation should
contact GOWINSEMI for the current documentation and errata.
Contents
Contents
Contents ................................................................................................................. i
List of Figures ...................................................................................................... iii
List of Tables ........................................................................................................ iv
1 About This Guide ............................................................................................... 1
1.1 Purpose ............................................................................................................................. 1
1.2 Related Documents ........................................................................................................... 1
1.3 Terminology and Abbreviations .......................................................................................... 1
1.4 Support and Feedback ...................................................................................................... 2
2 RTOS ................................................................................................................... 3
2.1 uC/OS-III ............................................................................................................................ 3
2.1.1 Features ......................................................................................................................... 3
2.1.2 Version ............................................................................................................................ 3
2.1.3 Configuration .................................................................................................................. 3
2.1.4 Reference Design ........................................................................................................... 4
2.2 FreeRTOS ......................................................................................................................... 4
2.2.1 Features ......................................................................................................................... 4
2.2.2 Version ............................................................................................................................ 4
2.2.3 Configuration .................................................................................................................. 5
2.2.4 Reference Design ........................................................................................................... 5
2.3 RT-Thread Nano Version ................................................................................................... 5
2.3.1 Features ......................................................................................................................... 5
2.3.2 Version ............................................................................................................................ 6
2.3.3 Configuration .................................................................................................................. 6
2.3.4 Reference Design ........................................................................................................... 6
3 Running in SRAM from SIP SPI-Flash ............................................................. 7
IPUG1013-2.0E
i
Contents
3.1 About This Solution ............................................................................................................ 7
3.2 Reference Design .............................................................................................................. 7
3.2.1 Hardware Reference Design........................................................................................... 7
3.2.2 Software Programming Reference Design ..................................................................... 7
3.3 Software Configuration ...................................................................................................... 8
3.3.1 Target Memory Configuration .......................................................................................... 8
3.3.2 SRAM Code Summarization ........................................................................................... 9
3.3.3 SRAM Code Configuration.............................................................................................. 9
3.3.4 SCT File Configuration.................................................................................................. 11
3.3.5 Main Program Code Configuration ............................................................................... 13
3.4 Download ......................................................................................................................... 13
3.4.1 Extract ER_ROM1.bin Data .......................................................................................... 13
3.4.2 Write to SIP SPI-Flash .................................................................................................. 13
3.4.3 Download Main Program .............................................................................................. 14
4 Running in SRAM from Embedded User-Flash ............................................ 15
4.1 About This Solution .......................................................................................................... 15
4.2 Reference Design ............................................................................................................ 15
4.2.1 Hardware Reference Design......................................................................................... 15
4.2.2 Software Reference Design .......................................................................................... 15
4.3 Software Configuration .................................................................................................... 16
4.3.1 SRAM Code Summarization ......................................................................................... 16
4.3.2 SRAM Code Configuration............................................................................................ 16
IPUG1013-2.0E
ii
List of Figures
List of Figures
Figure 3-1 Configure “Options for Target > Target” ........................................................................... 8
Figure 3-2 ram_func.c Example ........................................................................................................ 9
Figure 3-3 Select “Options for File ‘ram_func.c’…” ........................................................................... 10
Figure 3-4 Configure “Memory Assignment > Code/Const” .............................................................. 11
Figure 3-5 Configure “Options for Target > Linker” ........................................................................... 12
Figure 3-6 Modify SCT File ............................................................................................................... 12
Figure 3-7 Device configuration ........................................................................................................ 14
Figure 4-1 ram_func.c Example ........................................................................................................ 16
Figure 4-2 Select “Options for File ‘ram_func.c’…” ........................................................................... 17
Figure 4-3 Configure “Memory Assignment > Code/Const” .............................................................. 17
IPUG1013-2.0E
iii
List of Tables
List of Tables
Table 1-1 Terminology and Abbreviations ......................................................................................... 1
IPUG1013-2.0E
iv
1 About This Guide
1.1 Purpose
1
About This Guide
1.1 Purpose
This manual provides a series of solutions for the applications and
known issues of Gowin_EMPU (GW1NS-4C), including the solution for
embedded real-time operating system (RTOS), the solution for code
running in SRAM from SIP SPI-Flash, and the solution for code running in
SRAM from Embedded User-Flash.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI Website.
You can find the related documents at www.gowinsemi.com.cn.

SUG100, Gowin Software User Guide

IPUG931, Gowin_EMPU(GW1NS-4C) Software Programming
Reference Manual

IPUG932, Gowin_EMPU(GW1NS-4C) Hardware Design Reference
Manual
1.3 Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown
in Table 1-1.
Table 1-1 Terminology and Abbreviations
IPUG1013-2.0E
Terminology and Abbreviations
Meaning
RTOS
Real-time Operating System
SIP
System in a Package
SPI
Serial Peripheral Interface
SRAM
Static Random Access Memory
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1 About This Guide
1.4 Support and Feedback
1.4 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly using the information provided below.
Website: www.gowinsemi.com
E-mail: [email protected]
IPUG1013-2.0E
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2 RTOS
2.1 uC/OS-III
2
RTOS
Gowin_EMPU(GW1NS-4C) supports the embedded real-time
operating system, such as uC/OS-III, FreeRTOS, and RT-Thread Nano
version.
2.1 uC/OS-III
2.1.1 Features

The uC/OS-III is an extensible, romable, and preemptive real-time
core. There is no limit to the number of managed tasks.

uC/OS-III is the third generation core. It provides a real-time core
functions, including resource management, synchronization, and intertask communication, etc.

uC/OS-III provides many features that other real-time cores do not
have. For example, it can measure operating performance during
runtime and send signals or messages to tasks directly. Tasks can also
wait for multiple semaphores and message queues simultaneously.

Gowin_EMPU(GW1NS-4C) supports uC/OS-III.

Users can download source code from the uC/OS-III website:
http://www.micrium.com/.
2.1.2 Version
Gowin_EMPU(GW1NS-4C) supports uC/OS-III V3.03.00.
2.1.3 Configuration
IPUG1013-2.0E

Users can modify UCOSIII_CONFIG\os_cfg.h and os_cfg_app.h to
configure uC/OS-III.

Users can modify UCOS_BSP\bsp.c and bsp.h to support the
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2 RTOS
2.2 FreeRTOS
development board.
2.1.4 Reference Design
For uC/OS-III RTOS hardware and software programming reference
designs, you can click following link.
cdn.gowinsemi.com.cn/Gowin_EMPU(GW1NS-4C)_V2.0.zip
Hardware Reference Design
Gowin_EMPU (GW1NS-4C) supports uC/OS-III hardware reference
design in Gowin Software (tested software version V1.9.9.01 (64-bit)).
…\solution\RTOS\ref_design\FPGA_RefDesign\gowin_empu
Software Programming Reference Design
Gowin_EMPU(GW1NS-4C) supports uC/OS-III software programming
reference design in ARM Keil MDK (tested software version V5.26 and
GMD (tested software version V1.2).

…\solution\RTOS\ref_design\MCU_RefDesign\MDK_RefDesign\cm3_
ucos_iii

…\solution\RTOS\ref_design\MCU_RefDesign\GMD_RefDesign\cm3_
ucos_iii
2.2 FreeRTOS
2.2.1 Features

FreeRTOS is a lightweight real-time operating system.

It offers functions of task management, time management,
semaphore, message queue, memory management, recording,
software timer, coroutines, etc. It can basically meet the needs of
smaller systems.

FreeRTOS is a free operating system. It has features of open source,
portability, reducibility, and flexible scheduling policy.

Gowin_EMPU(GW1NS-4C) supports FreeRTOS.

Users can download source code from the FreeRTOS website:
http://www.freertos.org/
2.2.2 Version
Gowin_EMPU(GW1NS-4C) supports FreeRTOS V10.2.1.
IPUG1013-2.0E
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2 RTOS
2.3 RT-Thread Nano Version
2.2.3 Configuration
Users can modify include\FreeRTOSConfig.h to configure FreeRTOS.
2.2.4 Reference Design
For FreeRTOS hardware and software programming reference
designs, you can click following link.
cdn.gowinsemi.com.cn/Gowin_EMPU(GW1NS-4C)_V2.0.zip
Hardware Reference Design
Gowin_EMPU(GW1NS-4C) supports FreeRTOS hardware reference
design in Gowin Software (tested software version V1.9.9.01 (64-bit)).
…\solution\RTOS\ref_design\FPGA_RefDesign\gowin_empu
Software Programming Reference Design
Gowin_EMPU(GW1NS-4C) supports FreeRTOS software
programming reference design in ARM Keil MDK (tested software version
V5.26 and GMD (tested software version V1.2).

…\solution\RTOS\ref_design\MCU_RefDesign\MDK_RefDesign\cm3_f
reertos

…\solution\RTOS\ref_design\MCU_RefDesign\GMD_RefDesign\cm3_f
reertos
2.3 RT-Thread Nano Version
2.3.1 Features
IPUG1013-2.0E

RT-Thread Nano is a lite hard real-time core, developed in C language
with object-oriented programming ideas, and it is a trimmable,
preemptive real-time multitasking RTOS with a good code style.

Its memory resource utilization is extremely small and its functions
include task processing, software timers, semaphores, mailboxes and
real-time scheduling, etc.

It is open source and free, and follows the Apache license 2.0. RTOS
core and all open source components are free to use in commercial
products without the need to publish application source code and
without potential commercial risk.

Gowin_EMPU(GW1NS-4C) supports RT-Thread Nano version.

RT-Thread Nano source code is available at the RT-Thread website
https://www.rt-thread.org/.
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2 RTOS
2.3 RT-Thread Nano Version
2.3.2 Version
Gowin_EMPU(GW1NS-4C) supports RT-Thread Nano V3.1.5.
2.3.3 Configuration

Users can modify bsp\cm3\rtconfig.h to configure RT-Thread Nano.

Users can modify bsp\cm3\drivers\board.c to support the development
board used.
2.3.4 Reference Design
For RT-Thread Nano RTOS hardware and software reference
designs, you can click this link.
cdn.gowinsemi.com.cn/Gowin_EMPU(GW1NS-4C)_V2.0.zip
Hardware Reference Design
Gowin_EMPU(GW1NS-4C) supports RT-Thread Nano reference
design in Gowin Software (tested software version V1.9.9.01 (64-bit)).
…\solution\RTOS\ref_design\FPGA_RefDesign\gowin_empu
Software Programming Reference Design
Gowin_EMPU(GW1NS-4C) supports RT-Thread Nano software
programming reference design in ARM Keil MDK (tested software version
V5.26 and GMD (tested software version V1.2).
IPUG1013-2.0E

…\solution\RTOS\ref_design\MCU_RefDesign\MDK_RefDesign\cm3_r
tthread_nano

…\solution\RTOS\ref_design\MCU_RefDesign\GMD_RefDesign\cm3_
rtthread_nano
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3 Running in SRAM from SIP SPI-Flash
3
3.1 About This Solution
Running in SRAM from SIP SPI-Flash
3.1 About This Solution
The code of Gowin_EMPU(GW1NS-4C) is downloaded to the
instruction memory FLASH, and the execution is also in the instruction
memory FLASH; if the space of the instruction memory FLASH cannot
meet the user’s demands, for example, the instruction memory FLASH of
Gowin_EMPU(GW1NS-4C) is 32KB, and the user’s code exceeds 32KB,
we can write part of the code to the devices with SIP SPI-FLASH, such as
GW1NSR-4C QN48G, and borrow some space of the data memory SRAM
to execute the code during runtime.
3.2 Reference Design
For Running in SRAM from SIP SPI-Flash hardware and software
programming reference design, you can click following link.
cdn.gowinsemi.com.cn/Gowin_EMPU(GW1NS-4C)_V2.0.zip
3.2.1 Hardware Reference Design
Gowin_EMPU(GW1NS-4C) supports hardware reference design in
Gowin Software (tested software version V1.9.9.01 (64-bit)).
…\solution\RunInSRAM_FromSIPFlash\ref_design\FPGA_RefDesign\
gowin_empu
3.2.2 Software Programming Reference Design
Gowin_EMPU(GW1NS-4C) supports software programming reference
design in ARM Keil MDK (tested software version V5.26).
…\solution\RunInSRAM_FromSIPFlash\ref_design\MCU_RefDesign\c
m3_demo\project\printf
IPUG1013-2.0E
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3 Running in SRAM from SIP SPI-Flash
3.3 Software Configuration
3.3 Software Configuration
3.3.1 Target Memory Configuration
Configure "Options for Target > Target"; select and define the off-chip
ROM1, on-chip IROM1, and on-chip IRAM1 options as shown in Figure
3-1.
Figure 3-1 Configure “Options for Target > Target”
ROM1 Configuration

Start: 0x40002400
You can refer to the start address of APB Master [1] in the hardware
reference design, i.e., the start address of the SPI-Flash controller.

Size: 0x2000
Borrow the16KB data memory SRAM in the hardware reference
design; it is recommended that the borrowed space for the code written to
the SPI-Flash should not exceed half space of the data memory SRAM.
IROM1 (MCU Instruction Memory) Configuration
IPUG1013-2.0E

Start: 0x0

Size: 0x8000
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3 Running in SRAM from SIP SPI-Flash
3.3 Software Configuration
IRAM1 (MCU Data Memory) Configuration

Start: 0x20000000

Size: 0x2000
Borrow 8KB from the16KB data memory SRAM to execute the code in
the SIP SPI-Flash.
3.3.2 SRAM Code Summarization
Place all the code that needs to run in the data memory SRAM in a
file, such as ram_func.c, as shown in Figure 3-2.
Figure 3-2 ram_func.c Example
3.3.3 SRAM Code Configuration
Right click on the ram_func.c file and select "Options for File
'ram_func.c'..." as shown in Figure 3-3.
IPUG1013-2.0E
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3 Running in SRAM from SIP SPI-Flash
3.3 Software Configuration
Figure 3-3 Select “Options for File ‘ram_func.c’…”
Click "Options for File 'ram_func.c'... > Memory Assignment >
Code/Const" option to select "ROM1 [0x40002400-0x400043FF]", as
shown in Figure 3-4.
IPUG1013-2.0E
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3 Running in SRAM from SIP SPI-Flash
3.3 Software Configuration
Figure 3-4 Configure “Memory Assignment > Code/Const”
3.3.4 SCT File Configuration
Configure "Options for Target > Linker"; uncheck the "Use Memory
Layout from Target Dialog" option, edit the "Scatter File" option, and
manually select the SCT file as shown in Figure 3-5.
IPUG1013-2.0E
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3 Running in SRAM from SIP SPI-Flash
3.3 Software Configuration
Figure 3-5 Configure “Options for Target > Linker”
Manually open and edit the SCT file, and modify "LR_ROM1 >
ER_ROM1" as shown in Figure 3-6.
Figure 3-6 Modify SCT File
IPUG1013-2.0E
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3 Running in SRAM from SIP SPI-Flash
3.4 Download
3.3.5 Main Program Code Configuration
The code written to the SIP SPI-Flash needs to be transferred to the
data memory SRAM before it can be executed in the data memory SRAM.
Edit main.c to call the SPI-Flash driver function "Read", which is used
to transfer the code to the data memory SRAM.
3.4 Download
After compilation, the program automatically generates two separate
files ER_IROM1 (the main program code, running in instruction memory
FLASH) and ER_ROM1 (the code written to the SIP SPI-Flash, i.e. the
code of ram_func.c).
Manually modify the suffixes of these two files to .bin, i.e.
ER_IROM1.bin and ER_ROM1.bin.
3.4.1 Extract ER_ROM1.bin Data
Execute the software tool
"…\solution\RunInSRAM_FromSIPFlash\tool\bin2hex\bin\bin2hex.exe" in
the software development kit to extract ER_ROM1 data.
For example, execute the command "bin2hex.exe ER_ROM1.bin" to
generate ER_ROM1.bin.txt file and extract ER_ROM1 data.
3.4.2 Write to SIP SPI-Flash
The extracted ER_ROM1 data is loaded and written to the SIP SPIFlash using the following hardware design and software programming
design.
Hardware Programming Design
…\solution\RunInSRAM_FromSIPFlash\ref_design\FPGA_RefDesign\
gowin_empu
Software Design
…\solution\RunInSRAM_FromSIPFlash\ref_design\MCU_RefDesign\c
m3_demo\project\spi_flash
1. Load ER_ROM1 Data
Modify the main program main.c for spi_flash, fill the extracted
ER_ROM1 data into the array "ER_ROM1", and call the SPI-Flash driver
function "Write" to write to the SIP SPI-Flash.
Modify the spi_flash project code according to the ER_ROM1 data.
IPUG1013-2.0E
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3 Running in SRAM from SIP SPI-Flash
3.4 Download
2. Download ER_ROM1 Data
Download the above ER_ROM1 hardware design and software
programming design using Programmer in Gowin Software.
Open Programmer, click "Edit > Configure Device" in the menu bar or
"Configure Device" ( ) in the toolbar, and open Device configuration as
shown in Figure 3-7.

In Access Mode drop-down list, select the "MCU Mode" option.

In Operation drop-down list, select the "Firmware Erase, Program" or
"Firmware Erase, Program, Verify" option.

In File Name text box, select hardware design bitstream file.

In Firmware/Binary File text box, select software programming design
Binary file.
Figure 3-7 Device configuration
After configuration, click “Program/Configure” ( ) to download the
bitstream files and binary files, that is, the ER_ROM1 data is written to the
SIP SPI-Flash.
3.4.3 Download Main Program
Download the hardware reference design bitstream file and the
software programming reference design ER_IROM1.bin file of the main
program to the instruction memory FLASH using Programmer.
IPUG1013-2.0E
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4 Running in SRAM from Embedded User-Flash
4
4.1 About This Solution
Running in SRAM from Embedded
User-Flash
4.1 About This Solution
If there is code in the program that requires high running speed, the
code can be put into the data memory SRAM in order to improve the
running speed of the code.
4.2 Reference Design
For Running in SRAM from Embedded User-Flash hardware and
software programming reference designs, you can click this link.
cdn.gowinsemi.com.cn/Gowin_EMPU(GW1NS-4C)_V2.0.zip
4.2.1 Hardware Reference Design
Gowin_EMPU(GW1NS-4C) supports hardware reference design in
Gowin Software (tested software version V1.9.9.01 (64-bit)).
…\solution\RunInSRAM_FromEmbFlash\ref_design\FPGA_RefDesig
n\gowin_empu
4.2.2 Software Reference Design
Gowin_EMPU(GW1NS-4C) supports software programming reference
design in ARM Keil MDK (tested software version V5.26).
…\solution\RunInSRAM_FromEmbFlash\ref_design\MCU_RefDesign\
cm3_demo\project\printf
IPUG1013-2.0E
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4 Running in SRAM from Embedded User-Flash
4.3 Software Configuration
4.3 Software Configuration
4.3.1 SRAM Code Summarization
Place all the code that needs to run in the data memory SRAM in a
file, such as ram_func.c, as shown in Figure 4-1.
Figure 4-1 ram_func.c Example
4.3.2 SRAM Code Configuration
Right click on the ram_func.c file and select "Options for File
'ram_func.c'..." as shown in Figure 4-2.
IPUG1013-2.0E
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4 Running in SRAM from Embedded User-Flash
4.3 Software Configuration
Figure 4-2 Select “Options for File ‘ram_func.c’…”
Click "Options for File 'ram_func.c'... > Memory Assignment >
Code/Const" option to select "IRAM1 [0x20000000-0x20003FFF]", as
shown in Figure 4-3.
Figure 4-3 Configure “Memory Assignment > Code/Const”
IPUG1013-2.0E
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4 Running in SRAM from Embedded User-Flash
4.3 Software Configuration
After coding and configuration, compile and generate the software
programming design Binary file; download the hardware design bitstream
file and the software programming design Binary file using Programmer.
IPUG1013-2.0E
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