®
UC2842B/3B/4B/5B
UC3842B/3B/4B/5B
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER
.
.
TRIMMED OSCILLATOR FOR PRECISE FRE-
QUENCY CONTROL
OSCILLATOR FREQUENCY GUARANTEED
AT 250kHz
.
.
CURRENT MODE OPERATION TO 500kHz
AUTOMATIC FEED FORWARD COMPENSA-
.
TION
LATCHING PWM FOR CYCLE-BY-CYCLE
.
.
.
CURRENT LIMITING
INTERNALLY TRIMMED REFERENCE WITH
.
UNDERVOLTAGE LOCKOUT
HIGH CURRENT TOTEM POLE OUTPUT
UNDERVOLTAGE LOCKOUT WITH HYSTER-
ESIS
LOW START-UP AND OPERATING CURRENT
Minidip SO8
DESCRIPTION
The UC384xB family of control ICs provides the necessary features to implement off-line or DC to DC fixed frequency current mode control schemes with a minimal external parts count. Internally implemented circuits include a trimmed oscillator for precise DUTY CYCLE CONTROL under voltage lockout featuring start-up current less than 0.5mA, a precision reference trimmed for accuracy at the error amp input, logic to insure latched operation, a PWM comparator which also provides current limit control, and a totem pole output stage designed to source or sink high peak current. The output stage, suitable for driving N-Channel MOSFETs, is low in the offstate.
Differences between members of this family are the under-voltage lockout thresholds and maximum duty cycle ranges. The UC3842B and UC3844B have
UVLO thresholds of 16V (on) and 10V (off), ideally suited off-line applications The corresponding thresholds for the UC3843B and UC3845B are 8.5 V and 7.9
V. The UC3842B and UC3843B can operate to duty cycles approaching 100%. A range of the zero to <
50 % is obtained by the UC3844B and UC3845B by the addition of an internal toggle flip flop which blanks the output off every other clock cycle.
BLOCK DIAGRAM (toggle flip flop used only in UC3844B and UC3845B)
Vi
7
GROUND
5
34V
RT/CT
4
VFB
2
COMP
CURRENT
SENSE
1
3
2.50V
OSC
+
ERROR AMP.
-
UVLO
2R
R
S/R
5V
REF
8
VREF
5V 50mA
INTERNAL
BIAS
VREF GOOD
LOGIC
T
1V
S
R
CURRENT
SENSE
COMPARATOR
PWM
LATCH
UC3842B
D95IN331
6
OUTPUT
March 1999 1/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
ABSOLUTE MAXIMUM RATINGS
Symbol
V i
V i
I
O
E
O
Supply Voltage (low impedance source)
Supply Voltage (Ii < 30mA)
Output Current
Parameter
Output Energy (capacitive load)
Analog Inputs (pins 2, 3)
P tot
P tot
T stg
T
J
T
L
Error Amplifier Output Sink Current
Power Dissipation at T amb
≤
25
°
C (Minidip)
Power Dissipation at Tamb
≤
25
°
C (SO8)
Storage Temperature Range
Junction Operating Temperature
Lead Temperature (soldering 10s)
* All voltages are with respect to pin 5, all currents are positive into the specified terminal.
PIN CONNECTION (top view)
Minidip/SO8
Value
30
Self Limiting
±
1
5
– 0.3 to 5.5
10
1.25
800
– 65 to 150
– 40 to 150
300
COMP
V
FB
I
SENSE
R
T
/C
T
3
4
1
2
D95IN332
6
5
8
7
V
REF
Vi
OUTPUT
GROUND
PIN FUNCTIONS
No
1
2
3
4
5
6
7
8
Function
COMP
Description
This pin is the Error Amplifier output and is made available for loop compensation.
V
FB
This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider.
I
SENSE
A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction.
R
T
/C
T
The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor R
T
to Vref and cpacitor C
T
to ground. Operation to 500kHz is possible.
GROUND This pin is the combined control circuitry and power ground.
OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sunk by this pin.
V
CC
V ref
This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor C
T
through resistor R
T
.
ORDERING NUMBERS
SO8
UC2842BD1; UC3842BD1
UC2843BD1; UC3843BD1
UC2844BD1; UC3844BD1
UC2845BD1; UC3845BD1
Minidip
UC2842BN; UC3842BN
UC2843BN; UC3843BN
UC2844BN; UC3844BN
UC2845BN; UC3845BN
2/15
Unit
V
A
µ
J
V mA
W mW
°
C
°C
°
C
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
THERMAL DATA
Symbol
R th j-amb
Description
Thermal Resistance Junction-ambient. max.
Minidip
100
SO8
150
Unit
°
C/W
ELECTRICAL CHARACTERISTICS ( [note 1] Unless otherwise stated, these specifications apply for
-25 < T amb
< 85
°
C for UC284XB; 0 < T amb
< 70
°
C for UC384XB; V i
= 15V (note 5); R
T
= 10K; C
T
= 3.3nF)
Symbol Parameter Test Conditions
UC284XB UC384XB
Min. Typ. Max. Min. Typ. Max.
Unit
REFERENCE SECTION
V
REF
∆
V
REF
Output Voltage
Line Regulation
∆
V
REF
Load Regulation
∆
V
REF
/
∆
T
Temperature Stability
T j
= 25
°
C I o
= 1mA
12V
≤
V i
≤
25V
1
≤
I o
≤
20mA
(Note 2) e
N
Total Output Variation
Output Noise Voltage
Long Term Stability
Line, Load, Temperature
10Hz
≤
f
≤
10KHz T j
= 25
°
C
(note 2)
T amb
= 125
°
C, 1000Hrs
(note 2)
OSCILLATOR SECTION
f
OSC
Frequency
T j
= 25
°
C
T
A
= T low
to T high
T
J
= 25°C (R
T
= 6.2k, C
T
= 1nF)
∆ f
OSC
/
∆
V
Frequency Change with Volt. V
CC
= 12V to 25V
∆ f
OSC
/
∆
T
Frequency Change with Temp.
T
A
= T low
to T high
V
I
SC
OSC
I dischg
Output Short Circuit
Oscillator Voltage Swing
Discharge Current (V
OSC
(peak to peak)
=2V) T
J
= 25°C
T
A
= T low
to T high
ERROR AMP SECTION
V
2
Input Voltage
I b
Input Bias Current
A
VOL
V
FB
= 5V
2V
≤
V o
≤
4V
BW Unity Gain Bandwidth T
J
= 25°C
PSRR Power Supply Rejec. Ratio
12V
≤
V i
≤
25V
I o
Output Sink Current V
PIN2
= 2.7V V
PIN1
= 1.1V
I o
Output Source Current
V
PIN1
= 2.5V
V
PIN2
= 2.3V V
PIN1
= 5V
V
OUT
High
V
OUT
Low
V
PIN2
= 2.3V;
R
L
= 15K
Ω
to Ground
V
PIN2
= 2.7V;
R
L
= 15K
Ω
to Pin 8
CURRENT SENSE SECTION
G
V
Gain
V
3
SVR
Maximum Input Signal
Supply Voltage Rejection
(note 3 & 4)
V
PIN1
= 5V (note 3)
12
≤
V i
≤
25V (note 3)
I b
Input Bias Current
Delay to Output
4.95
4.9
-30
49
48
225
–
–
–
7.8
7.5
2.45
2.50
2.55
2.42
2.50
2.58
-0.1
-1 -0.1
-2
65
0.7
60
2
-0.5
5
2.85
0.9
5.00
2
3
0.2
50
5
52
–
250
0.2
1
1.6
8.3
–
90
1
70
12
-1
6.2
0.8
3
1
70
-2
150
5.05
20
25
5.1
25
-100 -180
55
56
275
1
–
–
8.8
8.8
1.1
3.15
1.1
-10
300
4.90
4.82
-30
49
48
225
–
–
–
7.8
7.6
65
0.7
60
2
-0.5
5
2.85
0.9
5.00
2
3
0.2
50
5
52
–
250
0.2
0.5
1.6
8.3
–
90
1
70
12
-1
6.2
0.8
3
1
70
-2
150
5.10
20
25
5.18
25
-100 -180
55
56
275
1
–
–
8.8
8.8
1.1
3.15
1.1
-10
300
V mV mV mV/
°
C
V
µ
V mV mA
KHz
KHz
KHz
%
%
V mA mA mA
V
V
V/V
V dB
µ
A ns
V
µ
A dB
MHz dB mA
3/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter Test Conditions
UC284XB UC384XB
Min. Typ. Max. Min. Typ. Max.
Unit
OUTPUT SECTION
V
V
OL
OH
Output Low Level
Output High Level
I
SINK
= 20mA
I
SINK
= 200mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
V
OLS t t r f
UVLO Saturation
Rise Time
Fall Time
VCC = 6V; I
SINK
= 1mA
T j
= 25
°
C C
L
= 1nF (2)
T j
= 25
°
C C
L
= 1nF (2)
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold X842B/4B
Min Operating Voltage
After Turn-on
X843B/5B
X842B/4B
X843B/5B
PWM SECTION
Maximum Duty Cycle X842B/3B
X844B/5B
Minimum Duty Cycle
TOTAL STANDBY CURRENT
I st
Start-up Current
V
I i iz
Operating Supply Current
Zener Voltage
V i
= 6.5V for UCX843B/45B
V i
= 14V for UCX842B/44B
V
PIN2
= V
PIN3
= 0V
I i
= 25mA
13
12 13.5
94
47
30
0.1
0.4
1.6
2.2
13.5
0.1
1.1
50
50
96
48
0.3
0.3
12
36
150
150
13
0.1
0.4
1.6
2.2
13.5
12 13.5
0.1
1.1
50
50
150
150
15 16 17 14.5
16 17.5
7.8
8.4
9.0
7.8
8.4
9.0
9 10 11 8.5
10 11.5
7.0
7.6
8.2
7.0
7.6
8.2
100
50
0
0.5
0.5
17
94
47
30
96
48
0.3
0.3
12
36
100
50
0
0.5
0.5
17
%
%
% mA mA mA
V
V
V ns
V
V
V ns
V
V
V
V
Notes :
1. Max package power dissipation limits must be respected; low duty cycle pulse techniques are used during test maintain T j
as close to T amb
as possible.
2. These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trip point of latch with V
PIN2
= 0.
4. Gain defined as :
A =
∆
V
PIN1
∆
V
PIN3
; 0
≤
V
PIN3
≤
0.8 V
5. Adjust V i
above the start threshold before setting at 15 V.
4/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 1: Open Loop Test Circuit.
4.7K
Ω
2N2222
100K
Ω
ERROR AMP.
ADJUST
4.7K
Ω
1K
Ω
I
SENSE
ADJUST
5K
Ω
R
T
COMP
V
FB
I
SENSE
R
T
/C
T
V
REF
8
1
2
3
UC2842B
6
4
7
5
V i
0.1
µ
F
OUTPUT
GROUND
0.1
µ
F
C
T
D95IN343
A
1W
1K
Ω
V
REF
V i
OUTPUT
GROUND
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and
5 K
Ω
potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.
Figure 2: Timing Resistor vs. Oscillator Frequency
RT
(K
Ω
)
50
C
T =200pF
D95IN333
C
T =100pF
20
C
T
=5nF
C
T =500pF
C
T =1nF
10
5
C
T
=2nF
2
1
0.8
10K
V i
=15V
T
A
=25˚C
20K 30K
C
T
=10nF
50K 100K 200K 300K 500K f
OSC
(KHz)
5
3
2
50
30
20
10
Figure 3: Output Dead-Time vs. Oscillator Frequency
D95IN334
%
C
T
=500pF
C
T
=1nF
C
T
=200pF
C
T
=10nF
C
T
=5nF
C
T
=2nF
C
T
=100pF
1
10K 20K 30K 50K 100K
V i
=15V
T
A
=25˚C
200K 300K 500K fOSC(KHz)
5/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 4: Oscillator Discharge Current vs. Temperature.
I dischg
(mA)
D95IN335
V i
=15V
V
OSC
=2V
8.5
8.0
7.5
7.0
-55 -25 0 25 50 75 100 T
A
(˚C)
Figure 6: Error Amp Open-Loop Gain and
Phase vs. Frequency.
(dB)
80
60
Gain
D95IN337
V i
=15V
V
O
=2V to 4V
R
L
=100K
T
A
=25˚C
φ
30
60
40
20
0
Phase
90
120
150
-20
10 100
180
1K 10K 100K 1M f(Hz)
Figure 8: Reference Voltage Change vs.
Source Current.
D95IN339
60
V i
=15V
50
40
T
A
=-40˚C
T
A
=125˚C
30
20
6/15
10
0
0 20 40 60 80 100 I ref
(mA)
Figure 5: Maximum Output Duty Cycle vs. Timing Resistor.
D95IN336
D max
(%)
90
I dischg
=7.5mA
80
I dischg
=8.8mA
70
60
50
40
0.8
1 2 3
V i
=15V
C
T
=3.3nF
T
A
=25˚C
5 R
T
(K
Ω
)
Figure 7: Current Sense Input Threshold vs. Error Amp Output Voltage.
V th
(V)
D95IN338
V i
=15V
1.0
T
A
=25˚C
0.8
T
A
=125˚C
0.6
0.4
0.2
T
A
=-40˚C
0.0
0 2 4 6 V
O
(V)
Figure 9: Reference Short Circuit Current vs.
Temperature.
D95IN340
I
SC
(mA)
100
V i
=15V
R
L
≤
0.1
Ω
90
80
70
60
50
-55 -25 0 25 50 75 100 T
A
(˚C)
Figure 10: Output Saturation Voltagevs. Load
Current.
V sat
(V)
-1
V i
D95IN341
Source Saturation
(Load to Ground)
T
A
=25˚C
T
A
=-40˚C
-2
V i
=15V
80
µ s Pulsed Load 120Hz Rate
3
T
A
=-40˚C
2
T
A
=25˚C
1
0
0 200
Sink Saturation
(Load to V i
)
400 600
GND
I
O
(mA)
Figure 12: Output Waveform.
90%
V i
=15V
C
L
= 1.0nF
T
A
= 25°C
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 11: Supply Current vs. Supply Voltage.
I i
(mA)
D95IN342
20
15
10
5
R
T
=10K
C
T
=3.3nF
V
FB
=0V
I
Sense
=0V
T
A
=25˚C
0
0 10 20 30
Figure 13: Output Cross Conduction
V i
(V)
V
O
V i
=30V
C
L
= 15pF
T
A
= 25°C
20V/DIV
I
CC
10%
50ns/DIV
Figure 14: Oscillator and Output Waveforms.
R
T
8
4
V i
7
5V REG
PWM
I
D
CLOCK
OSCILLATOR
C
T
5
GND
CT
6
OUTPUT
OUTPUT
LARGE R
T
/SMALL C
T
CT
OUTPUT
100ns/DIV
SMALL R
T
/LARGE C
T
D95IN344
100mA/DIV
7/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 15 : Error Amp Configuration.
2.5V
1mA
Z i
Z f
V
FB
COMP
2
1
+
-
D95IN345
Figure 16 : Under Voltage Lockout.
7
V i
ON/OFF COMMAND
TO REST OF IC
V
ON
V
OFF
UC3842B
UC3844B
16V
UC3843B
UC3845B
8.4V
10V 7.6V
<17mA
<0.5mA
I
CC
D95IN346
Figure 17 : Current Sense Circuit .
ERROR
AMPL.
R
S
I
S
R
C
COMP
1
3
CURRENT
SENSE
5
GND
D95IN347
Peak current (i s
) is determined by the formula
I
S max
≈
1.0 V
R
S
A small RC filter may be required to suppress switch transients.
8/15
2R
R
V
CC
V
OFF
V
ON
During UVLO, the Output is low
1V
CURRENT
SENSE
COMPARATOR
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 18 : Slope Compensation Techniques.
I
S
R
SLOPE
R
1
R
S
R
T
R
T
/C
T
C
T
V
REG
I
SENSE
8
4
3
UC3842B
5
GND
I
S
R
SLOPE
R
1
R
S
R
T
R
T
/C
T
C
T
V
REG
I
SENSE
8
4
3
UC3842B
5
GND
D95IN348
Figure 19 : Isolated MOSFET Drive and Current Transformer Sensing.
V
CC
V in
7
5.0Vref
+
-
ISOLATION
BOUNDARY
+
-
S
R
Q
-
+
COMP/LATCH
6
Q1
V
GS
Waveforms
+
0
-
50% DC
+
0
-
25% DC
I pk
=
V
(pin 1)
-1.4
3R
S
N
( )
N
P
3
C
R
R
S
N
S
N
P
D95IN349
9/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 20 : Latched Shutdown.
4
OSC
8
R
BIAS
R
+
1mA
2
+
-
EA
1
2R
R
5
2N
3905
2N
3903
D95IN350
SCR must be selected for a holding current of less than 0.5mA at T
A(min)
.
The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.
Figure 21: Error Amplifier Compensation
From V
O
R i
2.5V
+
1mA
R d
C f
2
+
-
EA
2R
R f
R
1
5
Error Amp compensation circuit for stabilizing any current-mode topology except for boost and flyback converters operating with continuous inductor current.
From V
O
R
P
R i
C
P
R d
2
2.5V
+
-
EA
+
1mA
2R
C f
R f
R
1
5
D95IN351
Error Amp compensation circuit for stabilizing current-mode boost and flyback topologies operating with continuous inductor current.
10/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 22: External Clock Synchronization.
V
REF
8
R
BIAS
R
T
R
4
OSC
+
C
T
EXTERNAL
SYNC INPUT
0.01
µ
F +
-
EA
2R
47
Ω
2
1
R
The diode clamp is required if the Sync amplitude is large enough to cause the bottom side of C
T
to go more than 300mV below ground
5
D95IN352
Figure 23: External Duty Cycle Clamp and Multi Unit Synchronization.
R
A
V
REF
R
B
C
6
5
5K
5K
8
+
-
2
+
-
5K
1
4
R
Q
S
NE555
1.44
f =
(R
A
+ 2R
B
)C
D max
=
R
B
R
A
+ 2R
B
3
7
8
4
+
R
R
BIAS
OSC
2
+
-
EA
1
2R
R
TO ADDITIONAL
UCX84XAs
D95IN353
5
11/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Figure 24: Soft-Start Circuit
C
8
4
1M
Ω
2
1
R
BIAS
R
+
-
EA
+
1mA
OSC
2R
R
5
5V ref
1V
+
-
+
-
D95IN354
S
R
Q
Figure 25: Soft-Start and Error Amplifier Output Duty Cycle Clamp.
C
V
CC
V in
8
4
R2
2
1
R
BIAS
+
-
5V ref
R
+
-
EA
+
1mA
OSC
2R
R
V
Clamp
1V
-
+
S
R
Q
Comp/Latch
5
-
+
R1 BC109
V
CLAMP
=
·
R
1
R
1
+ R
2 where 0 <V
CLAMP
<1V I pk(max)
=
V
CLAMP
R
S
7
7
6
5
D95IN355
R
S
Q1
12/15
C c1
D (1)
E e e3
A a1 a2 a3 b b1
F (1)
L
M
S
DIM.
0.1
mm
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
1.75
0.069
0.25
1.65
0.004
inch
0.010
0.065
0.65
0.35
0.19
0.25
4.8
5.8
0.85
0.026
0.48
0.014
0.25
0.007
0.5
0.010
45
°
(typ.)
5.0
0.189
6.2
0.228
0.033
0.019
0.010
0.020
0.197
0.244
1.27
3.81
0.050
0.150
3.8
0.4
4.0
0.15
1.27
0.016
0.6
8
°
(max.)
0.157
0.050
0.024
(1) D and F do not include mold flash or protrusions. Mold flash or
potrusions shall not exceed 0.15mm (.006inch).
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
OUTLINE AND
MECHANICAL DATA
SO8
13/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
e4
F
I
L
Z
D
E e e3
B b
A a1 b1
DIM.
mm inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
3.32
0.131
0.51
0.020
1.15
0.356
0.204
1.65
0.55
0.304
0.045
0.014
0.008
0.065
0.022
0.012
7.95
10.92
9.75
0.313
0.430
0.384
3.18
2.54
7.62
7.62
6.6
5.08
3.81
1.52
0.125
0.100
0.300
0.300
0.260
0.200
0.150
0.060
OUTLINE AND
MECHANICAL DATA
Minidip
14/15
UC2842B/3B/4B/5B - UC3842B/3B/4B/5B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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© 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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