advertisement
EPXA1 Development Board Hardware Reference Manual
Prototyping Area
Table 36 lists the pin assignments for the prototyping area on the EPXA1
development board.
Table 37. EPXA1 Development Board Prototyping Area Pin-Outs
Row/Column
P
R
K
L
M
N
H
J
F
G
C
D
E
A
B
1
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
VCC_5V GND
2
Board Reference
(EPXA1 Device Pin)
3 4 5 6
VCC_3V3 protoIO_29 (K15) protoIO_19 (L19) protoIO_9 (M22)
VCC_3V3 protoIO_28 (K17) protoIO_18 (L20) protoIO_8 (N16)
VCC_3V3 protoIO_27 (K18) protoIO_17 (L21) protoIO_7 (N20)
VCC_3V3 protoIO_26 (K19) protoIO_16 (L22) protoIO_6 (N22)
VCC_3V3 protoIO_25 (K20) protoIO_15 (M16) protoIO_5 (P16)
VCC_3V3 protoIO_24 (K21) protoIO_14 (M17) protoIO_4 (P17)
VCC_3V3 protoIO_23 (L15) protoIO_13 (M18) protoIO_3 (P20)
VCC_3V3 protoIO_22 (L16) protoIO_12 (M19) protoIO_2 (P22)
VCC_3V3 protoIO_21 (L17) protoIO_11 (M20) protoIO_1 (R22)
VCC_3V3 protoIO_20 (L18) protoIO_10 (M21) NC
VCC_3V3 NC NC NC
VCC_3V3 NC
VCC_3V3 NC
NC
NC protoIO_32 (AA19) protoIO_31 (AA20)
VCC_3V3 NC
VCC_3V3 NC
NC
NC protoIO_30 (AB19)
RESET_n (H4)
46 Altera Corporation
advertisement
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
Related manuals
advertisement
Table of contents
- 9 EPXA1 Development Board
- 9 Features
- 9 Functional Overview
- 10 EPXA1 Development Board Components
- 10 EPXA1 Device
- 11 Prototyping Area
- 13 Interfaces
- 20 Development Board Expansion
- 23 Jumper Configuration
- 24 Clocks
- 26 Jumper Configuration for the Clock Inputs
- 27 Sources for the Stripe Clock Reference
- 28 Sources for CLK3 & CLK
- 28 Device Configuration
- 28 Booting from Flash Memory
- 29 Using the Quartus II Software
- 29 JTAG Interfaces
- 30 Power Supply
- 32 Test Points & Test Pads
- 33 Signals
- 34 Expansion Headers
- 37 Configuration/Debugging Interfaces
- 38 Development Board Pin-Outs
- 39 Configuration
- 40 SDR SDRAM Interface
- 44 UART1 & UART
- 44 Fast I/O Pins
- 45 Test Points
- 45 Test Pads
- 46 Prototyping Area
- 47 Expansion Header I/O Pins
- 48 General Usage Guidelines