TX encoding. STMicroelectronics ST25R3916, ST25R3917
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Description ST25R3916/7
This block encodes the transmit frames according to the selected RF mode and bit rate. The
SOF (start of frame), EOF (end of frame), CRC and parity bits are generated automatically.
The data to transmit are taken from the FIFO.
In Stream mode the framing is bypassed. The FIFO data directly defines the modulation data sent to the transmitter.
In Transparent mode, the framing and FIFO are bypassed, and the MOSI pin directly drives the modulation of the transmitter.
This block decodes received frames according to the selected RF mode and bitrate. The
SOF (start of frame), EOF (end of frame), CRC and parity bits are automatically checked, all of them (except the CRC bit) are removed by this block. The received data is written to the
FIFO.
In Stream mode the framing is bypassed. The digitized subcarrier signal is directly stored in the FIFO.
In Transparent mode the framing and FIFO are bypassed. The digitized subcarrier signal directly drives the MISO pin.
2.2.14 FIFO
The ST25R3916/7 contain a 512-byte FIFO. Depending on the direction of the data transfer, it contains either data which has been received or data which is to be transmitted.
In reader mode the ST25R3916/7 can transmit frames of up to 8191 bytes length and receive frames of arbitrary length.
The control logic contains I/O registers that define the operation of device.
A 4-wire serial peripheral interface (SPI) and a 2-wire I2C interface are available to communicate with an external microcontroller. The pins for the SPI and the I2C interface are shared, and pin I2C_EN is used to select the active interface.
2.2.17 Passive target memory
The devices contain a 48-byte RAM to store configuration data for the passive target and card emulation mode.
2.2.18 P2RAM
The P2RAM stores information on wafer number, die position, device subversion, and I2C address. The P2RAM is programmed during production.
DS12484 Rev 4
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