Instructions
4.6
M95320-A125 M95320-A145
Write to Memory Array (WRITE)
The WRITE instruction is used to write new data in the memory.
As shown in
Figure 10
, to send this instruction to the device, Chip Select (S) is first driven low. The bits of the instruction byte, address bytes, and at least one data byte are then shifted in (MSB first), on Serial Data Input (D). The instruction is terminated by driving Chip
Select (S) high at a data byte boundary.
Figure 10
shows a single byte write.
Figure 10. Byte Write (WRITE) sequence
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1. Depending on the memory size, as shown in
Table 7
, the most significant address bits are Don’t Care.
A Page write is used to write several bytes inside a page, with a single internal Write cycle.
For a Page write, Chip Select (S) has to remain low, as shown in Figure 11 , so that the next
data bytes are shifted in. Each time a new data byte is shifted in, the least significant bits of the internal address counter are incremented. If the address counter exceeds the page boundary (the page size is 32 byte), the internal address pointer rolls over to the beginning of the same page where next data bytes will be written. If more than 32 byte are received, only the last 32 byte are written.
Note:
For both Byte write and Page write, the self-timed Write cycle starts from the rising edge of
Chip Select (S), and continues for a period t
W
(as specified in Table 15
).
The instruction is discarded, and is not executed, under the following conditions:
• if a Write cycle is already in progress
• if the addressed page is in the region protected by the Block Protect (BP1 and BP0) bits
•
if one of the conditions defined in Section 3.4.1
is not satisfied
The self-timed Write cycle t
W
is internally executed as a sequence of two consecutive events: [Erase addressed byte(s)], followed by [Program addressed byte(s)]. An erased bit is read as “0” and a programmed bit is read as “1”.
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Figure 11. Page Write (WRITE) sequence
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1. Depending on the memory size, as shown in Table 7 , the most significant address bits are Don’t Care.
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Instructions
4.7
M95320-A125 M95320-A145
Read Identification Page (RDID)
The Read Identification Page instruction is used to read the Identification Page (additional page of 32 byte which can be written and later permanently locked in Read-only mode).
The Chip Select (S) signal is first driven low, the bits of the instruction byte and address bytes are then shifted in (MSB first) on Serial Data input (D). Address bit A10 must be 0 and the other upper address bits are Don't Care (it might be easier to define these bits as 0, as
shown in Table 7 ). The data byte pointed to by the lower address bits [A4:A0] is shifted out
(MSB first) on Serial Data output (Q).
The first byte addressed can be any byte within the identification page.
If Chip Select (S) continues to be driven low, the internal address register is automatically incremented and the byte of data at the new address is shifted out.
Note that there is no roll over feature in the Identification Page. The address of bytes to read must not exceed the page boundary.
The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time when the data bits are shifted out.
The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.
Figure 12. Read Identification Page sequence
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The first three bytes of the Identification page offer information about the device itself.
Please refer to
Section 3.5: Identification page
for more information.
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4.8 Write Identification Page (WRID)
Instructions
The Write Identification Page instruction is used to write the Identification Page (additional page of 32 byte which can also be permanently locked in Read-only mode).
The Chip Select signal (S) is first driven low, and then the bits of the instruction byte, address bytes, and at least one data byte are shifted in (MSB first) on Serial Data input (D).
Address bit A10 must be 0 and the other upper address bits are Don't Care (it might be
easier to define these bits as 0, as shown in Table 7
). The lower address bits [A4:A0] define the byte address inside the identification page.
The self-timed Write cycle starts from the rising edge of Chip Select (S), and continues for a period t
W
(as specified in
Table 15 ).
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Figure 13. Write Identification Page sequence
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The first three bytes of the Identification page offer the Device Identification code (Please refer to
Section 3.5: Identification page
for more information). Using the WRID command on these first three bytes overwrites the Device Identification code.
The instruction is discarded, and is not executed, under the following conditions:
• If a Write cycle is already in progress
• If the Block Protect bits (BP1,BP0) = (1,1)
•
If one of the conditions defined in Section 3.4.1: Protocol control
is not satisfied.
Read Lock Status (RDLS)
The Read Lock Status instruction is used to read the lock status.
To send this instruction to the device, Chip Select (S) first has to be driven low. The bits of the instruction byte and address bytes are then shifted in (MSB first) on Serial Data input
(D). Address bit A10 must be 1; all other address bits are Don't Care (it might be easier to define these bits as 0, as shown in
Table 7 ). The Lock bit is the LSB (Least Significant Bit) of
the byte read on Serial Data output (Q). It is at ‘1’ when the lock is active and at ‘0’ when the lock is not active. If Chip Select (S) continues to be driven low, the same data byte is shifted out.
The read cycle is terminated by driving Chip Select (S) high. The instruction sequence is
shown in Figure 14 .
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Instructions M95320-A125 M95320-A145
The Read Lock Status instruction is not accepted and not executed if a Write cycle is currently in progress.
Figure 14. Read Lock Status sequence
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The Lock Identification Page (LID) command is used to permanently lock the Identification
Page in Read-only mode.
The LID instruction is issued by driving Chip Select (S) low, sending (MSB first) the instruction code, the address and a data byte on Serial Data input (D), and driving Chip
Select (S) high. In the address sent, A10 must be equal to 1. All other address bits are Don't
Care (it might be easier to define these bits as 0, as shown in
Table 7
). The data byte sent must be equal to the binary value xxxx xx1x, where x = Don't Care. The LID instruction is terminated by driving Chip Select (S) high at a data byte boundary, otherwise, the instruction is not executed.
Figure 15. Lock ID sequence
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Driving Chip Select (S) high at a byte boundary of the input data triggers the self-timed Write cycle which duration is t
Figure 15
.
W
(specified in
Table 15 ). The instruction sequence is shown in
DocID022938 Rev 8
M95320-A125 M95320-A145 Instructions
The instruction is discarded, and is not executed, under the following conditions:
• If a Write cycle is already in progress
• If the Block Protect bits (BP1,BP0) = (1,1)
•
If one of the conditions defined in Section 3.4.1: Protocol control
is not satisfied.
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