Software implementation
4.1
General
At a Glance
Subject of this
Section
What's in this
Section?
This section describes the principles of installing the TSX PBY 100 module.
This section contains the following topics:
Topic
Principle
Physical or logical addressing of inputs/outputs
Mapping IW and QW addresses
Page
39
41
43
38
35015381.01 07/2008
Software implementation
Principle
Introduction When installing Profibus-DP, the physical context of the application into which it will be integrated (rack, supply, processor, modules or devices, etc.) must be defined, and its software must be installed.
This second aspect is done from the various PL7 editors: z z either offline, or in online mode (modification is limited to certain parameters).
35015381.01 07/2008
39
Software implementation
Installation principle
The table below shows the different phases of installation.
Mode
Offline
On or offline
Online
Phase
Module declaration
Configuration (1)
Symbolization
Programming
Transfer
Description z z
Selection: z of geographical position (number and slot when a module is on a rack), z of module type.
Entering the configuration parameters,
Declaring bus configuration using the software
SyCon and creating a *.CNF text file.
Symbolizing variables associated with the Profibus-DP bus using the variables editor.
z z
Bit and word objects associated with the module or the
Profibus-DP link.
Module-specific instructions (OFs).
Transferring the application to the PLC.
An application transfer to a PLC or a cold start of the application configures and starts up the Profibus-DP.
On or offline
Debug
Diagnostics
Documentation z z z z
Different methods are accessible for debugging the application, controlling inputs/outputs and fault diagnostics:
PL7 language objects, the PL7 debugging screen, the SyCon software, module signalization.
Printing the various pieces of information relating to Profibus-DP bus configuration.
(1) When configuring a Profibus-DP installation, SyCon software (available on CD-ROM) needs to be used. This software comprises a library of profiles which describe each device which can be connected to Profibus-DP. For an update, consult our regional office.
40
35015381.01 07/2008
Software implementation
Physical or logical addressing of inputs/outputs
At a Glance
Topology
Inputs/outputs respect the topology used by the PL7 software and can be identified: z z either by physical addressing, or by logical addressing.
Addressing is defined in the following way:
% I or Q
Symbol Type of objects
I = input
Q = output
X, W or D
Format
X = Boolean
W = word
D = double word xy
Rack address x = 0 to 7
Module position y = 0 to 10
.
i .
Channe l no.
i = 0 r :
Position r = 0 to
253
Xj
Bit j = 0 to 15
Block assignment
DP data is exchanged in the form of input/output blocks. All a slave’s input data is indexed by adjacent %IW blocks, and a slave’s output data is indexed by adjacent
%QW blocks. The continuity of %IW and %QW blocks is valid even for a modular slave.
Each data block for a slave or modular slave slot starts with a new %IW or %QW.
As a result, the first I/O word of a slave is always associated to a new %IW or %QW.
In the event where a slave image (%IW or %QW) has a special size (for example 1 byte or 3 bytes), it is completed by unused bytes in order to manipulate the I/O words.
35015381.01 07/2008
41
Software implementation
Example The table below describes an example of assignment:
Input image
Slave 2
2 words
Slave 1
1 byte
%IWm.0.i
%IWm.0.i+1
Unused byte
%IWm.0.j
Only bits 0 to 7 are significant
Output image
Slave 17
2 words
%QWm.0.i %QWm.0.i+1
Slave 17
1 word
%IWm.0.k
Slave 2
1 byte
Unused byte
%QWm.0.j
Only bits 0 to 7 are significant
42
35015381.01 07/2008
Software implementation
Mapping IW and QW addresses
General Mapping input/output data addresses is used to achieve the clearest possible addressing.
A slave can be made up of several modules of different data sizes. In this case, misalignment of addresses can happen.
To avoid this, modules can be physically positioned in the slave rack by: z z z z grouping together input modules of a particular size (e.g.: 1 byte) for each pair, grouping together output modules of a particular size (e.g.: 1 byte) for each pair, positioning a single input module of a particular size (e.g.: 1 byte) at the last input module position, positioning a single output module of a particular size (e.g.: 1 byte) at the last output module position.
Example: nonmapped modules
Slave x in non-mapped modules
Module A
1 input word
Module B
1 input byte
Module C
1 output byte
Module D
1 input word
Module E
1 output word
Module F
1 output byte
Input image
%IWm.0.x
Module A
1 input word
%IWm.0.x+1
Module B
1 input byte
Output image
%IWm.0.x
Module C
1 output byte
%IWm.0.x+2
Module D
1 input word
Unused byte
Module E
1 output word
%IWm.0.x+1
Module F
1 output byte
35015381.01 07/2008
43
Software implementation
Example: mapped modules
Slave x in mapped modules
Module A
1 input word
Module D
1 input word
Module B
1 input byte
Module E
1 output word
Module C
1 output word
Module F
1 output byte
Input image
%IWm.0.x
Module A
1 input word
Output image
%IWm.0.x
Module E
1 output word
%IWm.0.x+1
Module D
1 input word
%IWm.0.x+2
Module B
1 input byte
%IWm.0.x+1
Module C
1 output byte
Unused byte
Module F
1 output byte
44
35015381.01 07/2008
