Optimizing Code. freescale DSP56F80x/DSP56F82x

Freescale Semiconductor, Inc.

C for DSP56800

Optimizing Code

NOTEFor general details about the OMR, see the DSP56800 Family Manual. For specific register details of your chip, see your chip manual.

The CodeWarrior compiler has some requirements about the value contained within this register and the mode in which the DSP56800 core operated. These requirements are described in Table 7.6.

Table 7.6 OMR Bit Requirements

Bit Number

4

5

8

Bit Name

Saturation or SA bit

Rounding or R bit

Condition code or CC bit

Requirements

This bit must be cleared for the compiled code to work properly.

This bit must be cleared for the compiled code to work properly.

This bit must be set for the compiled code to work properly.

NOTEFor general details about the OMR, see the DSP56800 Family Manual. For specific register details of your chip, see your chip manual.

Optimizing Code

Optimizations that are specific to DSP56800 development with the CodeWarrior IDE are:

•Page 0 Register Assignment

•Array Optimizations

•Multiply and Accumulate (MAC) Optimizations

Page 0 Register Assignment

The compiler uses page 0 address locations X: 0x0030 - 0x003F as register

variables. Frequently accessed local variables are assigned to the page 0 registers instead of to stack locations so that load and store instructions are shortened.

Targeting DSP56F80x/DSP56F82x Controllers 157

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