Simulator/Debugger Usage Example. Hitachi SH7032, SH7034, SH7000

Here, standard library (shclib.lib) and low-level library must be specified as default libraries.

Refer to the H-Series Linkage Editor User’s Manual for more information.

3.3 Simulator/Debugger Usage Example

This section describes the command inputs and simulator/debugger outputs for a sample simulator/debugger session.

3.3.1 Creating the CPU Information File

A CPU information file which corresponds to the SH-series device to be used must be created before using the simulator/debugger. Refer to part II, CPU Information Analysis Program, in this manual.

Our example uses the memory map for the SH7000 extended mode with ROM (mode 2). Figure

3-2 gives an overview of the SH7000 mode 2 memory map. Refer to appendix C.1, SH7000

Memory Map for more information.

H'0000000

H'0FFFFFF

Internal ROM area (32 bits, 1 state)

H'5000000

H'5FFFFFF

Internal I/O area (16 bits, 3 states)

H'8000000

H'9000000

H'F000000

H'FFFFFFF

Vector area

Internal ROM area (32 bits, 1 state)

External ROM area (16 bits, 3 states)

Internal RAM area (32 bits, 1 state)

Figure 3-2 SH7000 Memory Map (Mode 2)

The internal ROM areas H'0000000 to H'0FFFFFF and H'8000000 to H'8FFFFFF correspond to the same area in the SH series, but are treated separately by the simulator/debugger. To use the internal ROM area ranging from H'8000000 as the vector area, specify either of the following.

31