Hardware environment. STMicroelectronics STM32 F0 Entry-level

Below you will find brief information for microcontroller STM32 F0 Entry-level. The STM32F0xx microcontroller features a High definition multimedia interface consumer electronics control (HDMI-CEC) controller that supports the HDMI-CEC v1.4 protocol and it provides a hardware support of this protocol, and it supports the whole set of features offered with CEC devices. The application note describes the CEC protocol software and hardware implementation based on the HDMI-CEC controller. You can find details about this STM32F0xx controller as well as the HDMI-CEC protocol software and hardware implementation.

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AN4066 Hardware environment

To be fully compliant with the stringent HDMI 1.4 specification, specially when the CEC device is in the power-off state, a fully integrated ESD protection should be added externally to the STM32F0xx device. For that purpose, the HDMI2C1-5DIJ ensures level-shifting and serves as the signal booster for control links of HDMI 1.4 transmitters. The HDMI2C1- 5DIJ is a bidirectional isolation buffer, integrating hysteresis and signal boosters for maximum system robustness and signal integrity.

In addition to this circuit, the 27 Kohm pull-up resistor on the CEC line should be externally connected to the STM32F0xx.

With these few hardware additions, the STM32F0xx CEC solution (CEC peripheral plus

ESD protection circuit) is fully compliant with the HDMI 1.4 standard.

Two HDMI connectors are available for the STM320518-EVAL board (CN3 and CN4). The

CEC, SCL, SDA and HPD signals are supported and connected to STM32F0xx through

HDMI2C1-5DIJ.

The external hardware component is only needed when the CEC power-off state is necessary in the application. If the power-off state is not necessary, you can directly connect the STM32F0xx CEC line to the CEC bus.

The two HDMI connectors, CN3 and CN4, are available on the STM320518-EVAL board.

● The CN3 connector is an HDMI sink connector with:

– DDC connected to I2C2 of STM32F051R8T6

– HPD controlled by IO PA11 through transistor T3

●

– CEC connected to PB10 through transistor T4

The CN4 connector is an HDMI source connector with:

– DDC connected to I2C1 of STM32F051R8T6

– HPD controlled by IO PA8

– CEC connected to PB10 through transistor T4

– HDMI 5V powered by power switch U5

Only an HDMI vendor-approved connector should be used. The list of HDMI connectors approved is available on the HDMI site. (www.hdmi.org)

The differential impedance of this connector should be equal to 100 ohm +/- 15%. This can be checked by using any Time domain reflectrometry (TDR) equipment.

Doc ID 022911 Rev 1 15/32

Key features

Supports HDMI-CEC v1.4
Supports the whole set of features offered with CEC
Configurable Signal Free Time before of transmission start
Configurable Peripheral Address (OAR), supports multiple addresses
Supports Listen Mode
Configurable Rx-tolerance margin
Receive-Error detection
Configurable Error-Bit Generation
Transmission Error Detection (TXERR)
Arbitration Lost Detection (ARBLST) with automatic transmission retry

Frequently asked questions

HDMI-CEC v1.4 protocol is a consumer electronics control (CEC) protocol that allows communication between audiovisual devices. It allows users to control various devices with a single remote control.

The STM32F0xx microcontroller features a High definition multimedia interface consumer electronics control (HDMI-CEC) controller that supports the HDMI-CEC v1.4 protocol. It supports the whole set of features offered with CEC devices. You can find the list of these features in the application note.

The STM32F0xx microcontroller supports the CEC protocol, allowing for communication between audiovisual devices. It allows users to control various devices with a single remote control.

The STM32F0xx HDMI-CEC controller offers advanced features like configurable Signal Free Time, configurable Peripheral Address, and support for Listen Mode. It also features Rx-tolerance margin, Receive-Error detection, configurable Error-Bit Generation, Transmission Error Detection, Arbitration Lost Detection, Transmission underrun detection, Reception overrun detection, and the ability to work in system stop for ultra low-power applications.