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TMC454 DATASHEET (v. 1.02 / October 5, 2009) 48
9.4 Administration of the different modes of operation and output control
The TMC454 supports all kinds off stepper motors and thus has a number of different modes of operation. The outputs have to be configured differently depending on the mode. Some operation modes need both the digital and the analog outputs. Unused outputs can be used as general purpose output.
The analog outputs are controlled via the module analog motor control.
The registers pmap_dac0, pmap_dac1 and pmap_dac2 allow direct control of the output voltages for all three
DACs.
pmap_dac0: 8 bit rw
(address: 0x90)
Bit Term
0-7 DAC0_REG_DIRECT
Description
Controls the output value for DAC0OUT in direct mode.
pmap_dac1: 8 bit rw
(address: 0x91)
Bit Term
0-7 DAC1_REG_DIRECT
pmap_dac2: 8 bit rw
(address: 0x92)
Bit Term
0-7 DAC2_REG_DIRECT
Description
Controls the output value for DAC1OUT in direct mode.
Description
Controls the output value for DAC2OUT in direct mode.
pmap_mc: 2 bit rw
(address: 0x93)
Bit Term
0,1 MC_REG_DIRECT
Description
Controls the outputs MC0 and MC1 in direct mode.
The register pmap_conf controls, which unit operates the analog outputs (DAC0OUT, DAC1OUT, DAC2OUT).
Copyright © 2009, TRINAMIC Motion Control GmbH & Co. KG
TMC454 DATASHEET (v. 1.02 / October 5, 2009) 49
pmap_conf: 6 bit rw
(address: 0x94)
Bit Term Description
0 ENABLE_DAC0_REG_DIRECT Controls the analog output DAC0OUT.
When sinestep operation is active, (s.register seq_config ) the cosine wave is output.
In microstep mode, the value of the microstep RAM addressed by
mstep_phase0_cnt (s.Register seq_config ) is output.
If neither mode is active this flag selects:
1: The output is controlled by the value in pmap_dac0.
0: The output gives the microstep table contents.
1 ENABLE_DAC1_REG_DIRECT Controls the analog output DAC1OUT.
When sinestep operation is active, (s.register seq_config ) the sine wave is output.
In microstep mode, the value of the microstep RAM addressed by
mstep_phase1_cnt (s.Register seq_config ) is output.
If neither mode is active this flag selects:
1: The output is controlled by the value in pmap_dac1.
0: The output gives the microstep table contents.
2 ENABLE_DAC2_REG_DIRECT Controls the analog output DAC2OUT.
When the ENABLE_STO_VOUT_DIRECT is set, the actual velocity value is output via DAC3. It is output as absolute value (MSB-bound: bits 12-5).
In microstep mode, the value of the microstep RAM addressed by
mstep_phase2_cnt (s.Register seq_config ) is output, when a 3-phase motor is selected.
If neither mode is active this flag selects:
1: The output is controlled by the value in pmap_dac2.
0: The output is controlled by the automatic motor current control unit (described in the chapter on the FIFO).
3 ENABLE_MC0/MC1_REG_DIRE
CT
0: The digital outputs MC0 and MC1 are controlled by the current control unit.
1: The digital outputs MC0 and MC1 are controlled by the register
pmap_mc.
4 ENABLE_DAC2_VOUT_DIRECT 0: DAC2OUT is controlled by the standard functions.
1: The actual absolute velocity value is output via DAC2OUT
This function is useful for servo motor control!
5 ENABLE_STO_VOUT_DIRECT
0: STO0-STO9 is controlled by the standard functions.
1: The actual velocity value is output via STO0-STO9 (MSB-bound: bits 12-
3).
This function is useful for servo motor control!
The digital outputs STO0-STO9 are controlled according to the chosen function:
They are influenced by the following registers:
- seq_sot_output_ select selects the microstep RAM or the sequencer as source.
- ENABLE_STO_VOUT_DIRECT in register
pmap_conf switches the velocity value to the outputs.
The different combinations are shown in the following table:
seq_sto_output_select: 2 bit rw
(address: 0x2D)
Bit Term
0-1 STO_OUTPUT_SELECT
Description
Configures the digital outputs STO0-STO9
With ENABLE_STO_VOUT_DIRECT = 0:
01: 10 bit value from the microstep RAM (bits 9-0)
10: 10 bit value from the microstep RAM (bits 17-8)
11: 10 bit value from the microstep RAM (bits 23-14)
00: Control via sequencer
When ENABLE_STO_VOUT_DIRECT = 1, the actual velocity is output as 10 bit signed integer.
The selection of bit patterns from the microstep RAM is done by the RAM pointers (mstep_phase0_cnt, mstep_phase1_cnt, mstep_phase2_cnt). Each pointer addresses an 8 bit value from the RAM. The
Copyright © 2009, TRINAMIC Motion Control GmbH & Co. KG
TMC454 DATASHEET (v. 1.02 / October 5, 2009) 50 combination of all three values result in a 24 bit wide value. This value can be output at the digital outputs
(STO0-STO9) as chosen via the register seq_sto_output_select.
0
8 Bit 8 Bit
Phase Pattern
Sinuswave
SO_PHASE_OR_SIN
8 Bit
23
[9..0]
[17..8]
[23..14]
Sequencer Output
01
10
11
00 seq_sot_output_select
ENABLE_STO_VOUT_DIRECT
0
STO0-STO9
V_act(13..4)
1
Figure 9.12: Control of the digital outputs STO0-STO9
Copyright © 2009, TRINAMIC Motion Control GmbH & Co. KG
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Table of contents
- 1 Features
- 6 Functional Overview
- 7 Introduction
- 7 Control of Stepper Motors
- 7 Microstepping
- 7 More precision using motor current control
- 7 Conclusion
- 9 Block diagram
- 10 Pinning, Package, and Electrical data of the TMC
- 10 Pinning of TMC
- 13 Pull-Up / Pull-Down Resistances
- 13 Blocking Capacitors
- 15 Package Outlines and Dimensions
- 15 Fine Pitch BGA Package with 144 Balls (FBGA144) of TMC454-BC
- 16 Absolute Maximum Ratings
- 16 Analog Functions - External Low Cost DACs
- 17 Using TRINAMIC Driver (TMC236, TMC239, TMC246, TMC249) via SPI
- 17 Control Signals
- 17 Diagnosis Signals
- 17 with TMC246 or TMC
- 17 PWM DAC for Current Scaling
- 18 External DACs - LTC
- 19 Digital part
- 19 The Bus interface
- 19 Parallel Interface
- 22 Serial Interface
- 23 Description of the COMMAND FIFO
- 23 Accessing the TMC
- 24 General functionality
- 24 Description of the registers of the COMMAND FIFO
- 24 FIFO Commands
- 26 Description of the status bits
- 27 STOP and SLOWDOWN-functions
- 27 Finding the Reference Position
- 28 Programming example for the FIFO
- 29 The Ramp Generator
- 29 General Description
- 29 Principle of Operation
- 32 Programming the Ramp generator
- 32 Automatic Ramp generation
- 33 Programmed / Interactive Ramp generation
- 33 Synchronization of multiple TMC454s
- 34 Ramp adaptive motor current control
- 35 The Incremental Encoder Interface
- 35 General Description
- 35 Registers of the Incremental Encoder Interface
- 37 The Sequencer
- 37 Registers for Sinestep operation
- 38 Programming the Sine Generator
- 41 Full Step and Half Step Operation
- 41 Automatic Phase Pattern Setup
- 42 Manual Phase Pattern Setup
- 45 Registers for Microstep Operation
- 48 Administration of the different modes of operation and output control
- 51 The PID Controller
- 51 General introduction
- 51 Increasing stepping accuracy and stabilizing the position
- 52 Description of the registers of the PID controller
- 56 Interrupt control and Interrupt Sources
- 58 TMC454 Register Overview
- 61 Literature & Links
- 61 Revision History