API specification. STMicroelectronics C90FL2
Below you will find brief information for Flash module C90FL2. This manual describes the Standard Software Driver (SSD) used to program/erase a single C90FL2 Flash module. The SSD contains a set of functions for programming and erasing the Flash module embedded on a microcontroller. This document describes how to use the SSD to program and erase the C90FL2 Flash module. It also includes a user test mode functions for performing array integrity and ECC logic checks.
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Key features
Two sets of driver binaries built on Power Architecture instruction set technology and Variable-Length-Encoding (VLE) instruction set
Drivers released in binary c-array format to provide compiler-independent support for non-debug-mode embedded applications.
Drivers released in s-record format to provide compiler-independent support for debug-mode/JTAG programming tools.
Each driver function is independent of each other so the end user can choose the function subset to meet their particular needs.
Support page-wise programming for fast programming.
Position-independent and ROM-able
Ready-to-use demos illustrating the usage of the driver
Concurrency support via callback
Frequently asked questions
The C90FL2 SSD is a set of API's that enables user application to operate on the Flash module embedded on a microcontroller.
The C90FL2 SSD provides a number of features, including two sets of driver binaries built on Power Architecture instruction set technology and Variable-Length-Encoding (VLE) instruction set, drivers released in binary c-array format, drivers released in s-record format, each driver function is independent of each other, support page-wise programming for fast programming, position-independent and ROM-able, ready-to-use demos illustrating the usage of the driver, concurrency support via callback.
You must call the FlashInit() function prior to any other Flash operations. This function reads the Flash configuration information from the Flash control registers and initializes parameters in the SSD configuration structure.