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Clock Generation
5.4.3
Transconductance Driver Model
The crystal and its load capacitors should be viewed as a transimpedance element, whereby a current applied to one terminal generates a voltage at the other. The transconductance amplifier in BlueCore5‑Multimedia External uses the voltage at its input, XTAL_IN, to generate a current at its output, XTAL_OUT. Therefore, the circuit will oscillate if the transconductance, transimpedance product is greater than unity. For sufficient oscillation amplitude, the product should be greater than three. The transconductance required for oscillation is defined by the relationship
g m
> 3
(2πF x
)
2
R m
((C
0
+ C int
)(C
C t1 t1
+ C
(C t2 t2
+ C
+ C trim
) trim
) + C t1
(C t2
+ C trim
))
Equation 5.5: Transconductance Required for Oscillation
BlueCore5‑Multimedia External guarantees a transconductance value of at least 2mA/V at maximum drive level.
Note:
More drive strength is required for higher frequency crystals, higher loss crystals (larger R m capacitance loading
) or higher
Optimum drive level is attained when the level at XTAL_IN is approximately 1V pk-pk. The drive level is determined by the crystal driver transconductance.
5.4.4
Negative Resistance Model
An alternative representation of the crystal and its load capacitors is a frequency dependent resistive element. The driver amplifier may be considered as a circuit that provides negative resistance. For oscillation, the value of the negative resistance must be greater than that of the crystal circuit equivalent resistance. Although the
BlueCore5‑Multimedia External crystal driver circuit is based on a transimpedance amplifier, an equivalent negative
resistance can be calculated for it using Equation 5.6.
R neg
> g m
(2πF x
)
2
(C
0
+ C int
)((C
C t1
(C t2 t1
+ C
+ C t2 trim
)
+ C trim
) + C t1
(C t2
+ C trim
))
2
Equation 5.6: Equivalent Negative Resistance
This formula shows the negative resistance of the BlueCore5‑Multimedia External driver as a function of its drive strength.
The value of the driver negative resistance may be easily measured by placing an additional resistance in series with the crystal. The maximum value of this resistor (oscillation occurs) is the equivalent negative resistance of the oscillator.
5.4.5
Crystal PS Key Settings
The BlueCore5‑Multimedia External firmware automatically controls the drive level on the crystal circuit to achieve optimum input swing. The PSKEY_XTAL_TARGET_AMPLITUDE is used by the firmware to servo the required amplitude of crystal oscillation. Refer to the software build release note for a detailed description.
BlueCore5‑Multimedia External should be configured to operate with the chosen reference frequency.
CS-121064-DSP4
Production Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2006 - 2010
Page 31 of 104
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Table of contents
- 10 Device Details
- 11 Functional Block Diagram
- 12 Package Information
- 12 3.1 Pinout Diagram
- 13 3.2 Device Terminal Functions
- 21 3.3 Package Dimensions
- 22 3.4 PCB Design and Assembly Considerations
- 22 3.5 Typical Solder Reflow Profile
- 23 Bluetooth Modem
- 23 4.1 RF Ports
- 23 RF_N and RF_P
- 23 4.2 RF Receiver
- 23 Low Noise Amplifier
- 23 RSSI Analogue to Digital Converter
- 23 4.3 RF Transmitter
- 23 IQ Modulator
- 24 Power Amplifier
- 24 Transmit RF Power Control for Class 1 Applications (TX_PWR)
- 25 4.4 Bluetooth Radio Synthesiser
- 25 4.5 Baseband
- 25 Burst Mode Controller
- 25 Physical Layer Hardware Engine
- 25 4.6 Basic Rate Modem
- 25 4.7 Enhanced Data Rate Modem
- 27 Clock Generation
- 27 5.1 Clock Architecture
- 27 5.2 Input Frequencies and PS Key Settings
- 28 5.3 External Reference Clock
- 28 Input (XTAL_IN)
- 28 XTAL_IN Impedance in External Mode
- 28 Clock Start-up Delay
- 28 Clock Timing Accuracy
- 29 5.4 Crystal Oscillator (XTAL_IN, XTAL_OUT)
- 30 Load Capacitance
- 30 Frequency Trim
- 31 Transconductance Driver Model
- 31 Negative Resistance Model
- 31 Crystal PS Key Settings
- 32 Bluetooth Stack Microcontroller
- 32 6.1 Programmable I/O Ports, PIO and AIO
- 32 6.2 TCXO Enable OR Function
- 33 6.3 WLAN Coexistence Interface
- 34 Kalimba DSP
- 35 Memory Interface and Management
- 35 8.1 Memory Management Unit
- 35 8.2 System RAM
- 35 8.3 Kalimba DSP RAM
- 35 8.4 External Memory Driver
- 35 8.5 External Flash Memory (32Mb)
- 35 8.6 Off-chip Program Memory
- 35 © Cambridge Silicon Radio Limited
- 36 Minimum Flash Specification
- 36 Common Flash Interface
- 37 Virtual Machine Requirements
- 38 Memory Timing
- 40 Serial Interfaces
- 40 9.1 UART Interface
- 41 UART Configuration While Reset is Active
- 42 UART Bypass Mode
- 42 Current Consumption in UART Bypass Mode
- 42 9.2 USB Interface
- 43 9.3 Programming and Debug Interface
- 43 Instruction Cycle
- 43 Multi-slave Operation
- 43 9.4 I²C Interface
- 43 Software I²C Interface
- 44 Bit-serialiser Interface
- 45 Audio Interface
- 45 10.1 Audio Input and Output
- 45 10.2 Stereo Audio Codec Interface
- 46 10.2.1 Stereo Audio Codec Block Diagram
- 46 10.2.2 Stereo Codec Set-up
- 47 10.2.3 ADC
- 47 10.2.4 ADC Sample Rate Selection
- 47 10.2.5 ADC Digital Gain
- 47 10.2.6 ADC Analogue Gain
- 48 10.2.7 DAC
- 48 10.2.8 DAC Sample Rate Selection
- 48 10.2.9 DAC Digital Gain
- 49 10.2.10 DAC Analogue Gain
- 49 10.2.11 IEC 60958 Interface
- 50 10.2.12 Microphone Input
- 53 10.2.13 Line Input
- 54 10.2.14 Output Stage
- 55 10.2.15 Mono Operation
- 55 10.2.16 Side Tone
- 55 10.2.17 Integrated Digital Filter
- 56 10.3 PCM Interface
- 56 10.3.1 PCM Interface Master/Slave
- 57 10.3.2 Long Frame Sync
- 57 10.3.3 Short Frame Sync
- 58 10.3.4 Multi-slot Operation
- 58 10.3.5 GCI Interface
- 59 10.3.6 Slots and Sample Formats
- 59 10.3.7 Additional Features
- 60 10.3.8 PCM Timing Information
- 63 10.3.9 PCM_CLK and PCM_SYNC Generation
- 63 10.3.10 PCM Configuration
- 65 10.4 Digital Audio Interface (I²S)
- 70 Power Control and Regulation
- 70 11.1 Power Sequencing
- 71 11.2 External Voltage Source
- 71 11.3 Switch-mode Regulator
- 71 11.4 High-voltage Linear Regulator
- 71 11.5 Low-voltage Linear Regulator
- 70 © Cambridge Silicon Radio Limited
- 72 11.6 Low-voltage Audio Linear Regulator
- 72 11.7 Voltage Regulator Enable Pins
- 72 11.8 Battery Charger
- 73 11.9 LED Drivers
- 74 11.10Reset, RST
- 74 11.10.1 Digital Pin States on Reset
- 75 11.10.2 Status after Reset
- 76 Example Application Schematic
- 77 Electrical Characteristics
- 77 13.1 Absolute Maximum Ratings
- 77 13.2 Recommended Operating Conditions
- 78 13.3 Input/Output Terminal Characteristics
- 78 13.3.1 High-voltage Linear Regulator
- 79 13.3.2 Low-voltage Linear Regulator
- 80 13.3.3 Low-voltage Linear Audio Regulator
- 81 13.3.4 Reset
- 81 13.3.5 Regulator Enable
- 82 13.3.6 Switch-mode Regulator
- 83 13.3.7 Battery Charger
- 84 13.3.8 Digital Terminals
- 85 13.3.9 LED Driver Pads
- 85 13.3.10 USB
- 86 13.3.11 Auxiliary ADC
- 86 13.3.12 Auxiliary DAC
- 87 13.3.13 Clocks
- 88 13.3.14 Stereo Codec: Analogue to Digital Converter
- 89 13.3.15 Stereo Codec: Digital to Analogue Converter
- 89 13.4 ESD Precautions
- 90 Power Consumption
- 91 14.1 Kalimba DSP Typical Average Current Consumption
- 91 14.2 Typical Peak Current at 20°C
- 91 14.3 Conditions
- 92 CSR Green Semiconductor Products and RoHS Compliance
- 92 15.1 RoHS Statement
- 92 15.1.1 List of Restricted Materials
- 93 CSR Synergy and Bluetooth Software Stack
- 93 16.1 BlueCore HCI Stack
- 93 16.1.1 Key Features of the HCI Stack: Standard Bluetooth Functionality
- 95 16.1.2 Key Features of the HCI Stack: Extra Functionality
- 95 16.2 Host-Side Software
- 95 16.3 CSR Development Systems
- 95 16.4 eXtension
- 96 Ordering Information
- 97 Tape and Reel Information
- 97 18.1 Tape Orientation
- 98 18.2 Tape Dimensions
- 99 18.3 Reel Information
- 99 18.4 Moisture Sensitivity Level
- 100 Document References
- 101 Terms and Definitions
- 98 © Cambridge Silicon Radio Limited