The STM6717/18/19/20 and STM6777/78/79/80 supervisors are a family of low-voltage/lowsupply current processor (micro or DSP) supervisors, designed to monitor two (or three) system power supply voltages. They are targeted at applications such as set-top boxes

(STBs), portable, battery-powered systems, networking, and communication systems.

All device options have a push-button-type manual reset input (MR). The

STM6777/78/79/80 also includes an option which enables the user to delay the start of the manual reset process from 6 µs (MRC pin left open) or more with external capacitor. The delay is implemented by connecting the appropriately sized capacitor between the MRC pin and V

(typical 4 s delay with a 3.3 µF capacitor, see

Table 7 on page 21

Two of the three supplies monitored (V factory-trimmed) thresholds (V

RST1

CC1

and V

CC2

) have fixed (customer-selectable,

RST2

). The third voltage is monitored using an externally adjustable RSTIN threshold (0.626 V internal reference).

If any of the three monitored voltages drop below its factory-trimmed or adjustable thresholds, or if MR is asserted to logic low, a RST is asserted (driven low). Once asserted,

RST is maintained at low for a minimum delay period (t rec

) after ALL supplies rise above their respective thresholds and MR returns to high. These devices are guaranteed to be in the correct reset output logic state when V

CC1

and/or V

CC2

is greater than 0.8 V.

These devices are available in standard 5-pin or 6-pin SOT23 packages (see

Table 1 on page 1

Doc ID 11469 Rev 8 5/30

Description STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 1.

Logic diagram (STM6717/18)

CC2

CC1

STM6717

STM6718

RST

Figure 2.

Logic diagram (STM6777/78)

CC2

CC1

MRC

STM6777

STM6778

RST

AI10413

Figure 3.

Logic diagram (STM6719/20)

CC2

CC1

AI10415

Figure 4.

Logic diagram (STM6779/80)

RSTIN

STM6719

STM6720

RST

RSTIN

MRC

STM6779

STM6780

RST

AI10414

AI10416

Table 2.

MRC

RST

CC1

CC2

RSTIN

Signal names

Push-button reset input

Manual reset delay input

Active-low reset output

Primary supply voltage input

Secondary supply voltage input

Adjustable reset comparator input

Ground

6/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780 Description

Figure 5.

STM6717/18 SOT23-5 connections Figure 6.

STM6777/78 SOT23-6 connections

RST

CC1

CC2

RST

CC1

MRC

CC2

AI10417 AI10418

Figure 7.

STM6719/20 SOT23-6 connections Figure 8.

STM6779/80 SOT23-6 connections

RST

CC1

RSTIN

CC2

AI10419

RST

CC1

RSTIN

MRC

AI10420

1.1.2

The RST pin is driven low and stays low whenever V

CC1

or V

CC2

or RSTIN falls below its factory-trimmed or adjustable reset threshold or when MR goes to logic low. It remains low for t rec

after ALL supply voltages being monitored rise above their reset thresholds and MR goes from low to high. (Push-pull outputs are referenced to V

CC1

Active-low, open drain reset output (RST) - STM6717/19/77/79

The RST pin is driven low and stays low whenever V

CC1

or V

CC2

or RSTIN falls below its factory-trimmed or adjustable reset threshold or when MR goes to logic low. It remains low for t rec

after ALL supply voltages being monitored rise above their reset thresholds and MR goes from low to high. Connect an external pull-up resistor to V

CC1

. A 10 k

Ω pull-up resistor should be sufficient for most applications.

1.1.3 Push-button reset input (MR)

When MR goes low the RST output is driven low. RST remains low as long as MR is low and for t rec

after MR returns to high. This active-low input has an internal 50 k

Ω pull-up resistor to

Doc ID 11469 Rev 8 7/30

Description

1.1.4

1.1.5

1.1.6

STM6717/6718/6719/6720/STM6777/6778/6779/6780

CC1

. It can be driven from a TTL or CMOS logic line, or with open drain/collector outputs, or connected to V

through a switch. If unused, leave this pin open or connect it to V

CC1

Connect a normally open momentary switch from MR to V

; external debounce circuitry is not required. (If MR is driven from long cables or if the device is used in noisy environments, connecting a 0.1µF capacitor from MR to V

provides additional noise immunity.

Manual reset delay input (MRC) - STM6777/78/79/80)

This pin is either left open or connected to V

via a capacitor. By selecting the appropriate capacitor, the manual reset process, initiated by pressing the push-button manual reset

input, can be delayed by any value from 6 µs or more (see

Table 7 on page 21

Primary supply voltage monitoring input (V

CC1

)

It also is the input for the primary reset threshold monitor. Available fixed (customerselectable, factory-programmed) reset thresholds include 4.63 V to 1.58 V.

Secondary supply voltage monitoring input (V

CC2

)

This function is available on the STM6717/18/19/20/77/78. Fixed (customer-selectable, factory-programmed) reset thresholds include 3.08 V to 0.79 V.

This is a high impedance input. RST is driven low when the voltage at the RSTIN pin falls below 0.626 V (internal reference voltage at this comparator). The monitored voltage reset threshold is set with an external resistor-divider network.

Table 3.

Pin functions

Pin

STM6717

STM6718

STM6719

STM6720

STM6777

STM6778

STM6779

STM6780

Name

—

Function

RST Active-low reset output

MR Push-button reset input

MRC Manual reset delay input

CC1

Primary supply voltage input

CC2

Secondary supply voltage input

RSTIN Adjustable reset comparator input

Ground

8/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 9.

Block diagram

VCC1

VCC2

(1)

RSTIN

(2)

VRST1 COMPARE

VRST2

COMPARE

VCC1

VREF/2 = 0.626

COMPARE

Logic MR

MRC

(3)

CC2

input is available on STM6717/18/19/20/77/78.

RSTIN available only on STM6719/20/79/80.

MRC available only on STM6777/78/79/80.

Figure 10.

Hardware hookup

From DC/DC Converter

VCC2(1) VCC1

VCC3 = (626.5mV)

( R1 + R2

)

0.1µF

VCC1

STM67xx

VCC2

VCC3

0.1µF

Push-button

Switch

RSTIN

(2)

RST

MRC

(3)

VSS

C trec

Generator

RST

Description

RST (To Processor Reset)

AI10421

AI10422

CC2

is available only on STM6717/18/19/20/77/78.

RSTIN available only on STM6719/20/79/80.

MRC available only on STM6777/78/79/80.

Doc ID 11469 Rev 8 9/30

Operation

2 Operation

STM6717/6718/6719/6720/STM6777/6778/6779/6780

10/30

Interfacing to processors with bi-directional reset pins

Most processors with bi-directional reset pins can interface directly to the open drain

RST outputs (STM6717/19/77/79). Systems simultaneously requiring a push-pull RST output and a bi-directional reset interface can be in logic contention. To prevent this contention, connect a 4.7 k

Ω resistor between RST and the processor’s reset I/O as shown in

Figure 11

2. Ensuring a valid RST output down to V

= 0 V

The STM67xx supervisors are guaranteed to be in the correct RST output logic state when V

CC1

and/or V

CC2

is greater than 0.8 V. In applications which require valid reset levels down to V

= 0, a pull-down resistor to active-low outputs (push-pull only, see

Figure 12

) will ensure that the reset line is valid while the reset output can no longer sink or source current. This scheme does NOT work with the open drain outputs of the

STM6717/19/77/79.

The resistor value used is not critical, but it must be large enough not to load the reset output when V

is above the reset threshold. For most applications, 100 k

Ω is adequate.

Figure 11.

STM67xx interface to processor with bi-directional reset pins

VCC2

VCC1

STM67xx Processor

VCC1

VCC2

To other system components

VSS

RST

4.7k

RESET

VSS

AI10425

Figure 12.

Ensuring RST valid to V

= 0 (active-low, push-pull outputs)

STM67xx

VCC1

RST

VSS

AI10426

Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780

3 Typical operating characteristics

Typical operating characteristics

Note: Typical values are at T

= 25 °C unless otherwise noted.

Figure 13.

Supply current vs. temperature (V

CC1

= 5.5 V; V

CC2

= 3.6 V)

–40

ITOTAL

–20

ICC1

ICC2

0 20

Temperature (

°C)

40 60 80

Figure 14.

Supply current vs. temperature (V

CC1

= 3.6 V; V

CC2

= 2.75 V)

AI11843

–40

ITOTAL

–20

ICC1

ICC2

0 20

Temperature (

°C)

40 60 80

AI11844

Doc ID 11469 Rev 8 11/30

Typical operating characteristics STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 15.

Supply current vs. temperature (V

CC1

= 3.0 V; V

CC2

= 2.0 V)

–40

ITOTAL

–20

ICC1

ICC2

0 20

Temperature (

°C)

40 60 80

AI11845

Figure 16.

Supply current vs. temperature (V

CC1

= 2.0 V; V

CC2

= 1.0 V)

–40

ITOTAL

–20

ICC1

ICC2

0 20

Temperature (

°C)

40 60 80

AI11846

12/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780 Typical operating characteristics

Figure 17.

Normalized V

reset time-out period vs. temperature

1.07

1.05

1.03

1.01

0.99

0.97

–40 –20 0 20

Temperature (

°C)

40 60 80

Figure 18.

Maximum V

transient duration vs. reset threshold overdrive

1000

AI11847

100

1 10 100

Reset threshold overdrive (mV)

1000

AI11848

Doc ID 11469 Rev 8 13/30

Typical operating characteristics STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 19.

Normalized V

RST1

threshold vs. temperature

1.004

1.002

1.000

0.998

0.996

–40 –20 0 20 40

Temperature (

°C)

Figure 20.

Normalized V

RST2

threshold vs. temperature

1.004

60 80

1.002

AI11849

1.000

0.998

0.996

–40 –20 0 20

Temperature (

°C)

40 60 80

AI11850

14/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 21.

Reset input threshold vs. temperature

630

629

628

627

626

625

624

–40 –20 0 20

Temperature (

°C)

Typical operating characteristics

60 80

AI11851

Figure 22.

CC1

-to-reset delay vs. temperature

–40 –20 0 20

Temperature (

°C)

40 60 80

AI11852

Doc ID 11469 Rev 8 15/30

Typical operating characteristics STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 23.

Reset input-to-reset output delay vs. temperature

29.0

28.5

28.0

27.5

27.0

26.5

26.0

25.5

25.0

–40 –20 0 20

Temperature (

°C)

40 60 80

Figure 24.

MR-to-reset output delay vs. temperature (V

CC1

= 3.6V)

500

AI11853

480

460

440

420

400

–40 –20 0 20

Temperature (

°C)

40 60 80

AI11854

16/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780 Maximum rating

Stressing the device above the rating listed in the Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE

Program and other relevant quality documents.

Table 4.

Symbol

Absolute maximum ratings

Parameter Value

STG

SLD

(1)

CC1,

CC2

Storage temperature (V

Lead solder temperature for 10 seconds

Input or output voltage

Supply voltage

off)

Input or output current (all pins)

Power dissipation

SOT23-5

SOT23-6

–55 to 150

260

–0.3 to V

CC1

+ 0.3

–0.3 to V

CC2

+ 0.3

–0.3 to 7.0

654

675

Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.

Unit

V mA mW mW

°C

Doc ID 11469 Rev 8 17/30

DC and AC parameters

5

STM6717/6718/6719/6720/STM6777/6778/6779/6780

DC and AC parameters

18/30

This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in

Table 5: Operating and AC measurement conditions

. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters.

Table 5.

Operating and AC measurement conditions

Parameter STM67xx

supply voltage

Ambient operating temperature (T

)

Input rise and fall times

Input pulse voltages

Input and output timing ref. voltages

0.8 to 5.5

–40 to 85

≤ 5

0.2 to 0.8V

0.3 to 0.7V

Unit

°C ns

Figure 25.

AC testing input/output waveforms

0.8VCC

0.7VCC

0.3VCC

0.2VCC

AI02568

Figure 26.

MR timing waveform (STM6717/18/19/20)

MLMH

MR t

MLRL

RST t rec

AI10423a

Figure 27.

MR timing waveform (STM6777/78/79/80)

MLMH

(1)

MR t

MLRL

RST trec

AI10424c

By connecting a certain capacitor between the MRC pin and V

SS more (t

MLMH

, see

Table 7 on page 21

, the RST can be delayed from 6 µs or

Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780 DC and AC parameters

Table 6.

Sym

DC and AC characteristics

Alternative

Description

CC1

CC2

(2)

OH t

(3)

Test condition

(1)

Min

Operating voltage

CC1

CC2

supply current

Input leakage current

Open drain RST output leakage current

Output low voltage (RST; push-pull or open drain)

Output high voltage (RST; push-pull only)

Push-pull RST rise time

(STM6718/20/78/80)

0.8

CC1

< 5.5 V, all I/O pins open

CC1

< 3.6 V, all I/O pins open

CC2

< 3.6 V, all I/O pins open

CC2

< 2.75 V, all I/O pins open

0 V = V

= V

CC1

> V

RST1

, V

CC2

> V

RST2

;

RST not asserted

–1

CC1

or V

CC2

≥ 0.8 V,

SINK

= 1 µA, RST asserted

CC1

or V

CC2

≥ 1.0 V,

SINK

= 50 µA, RST asserted

CC1

or V

CC2

≥ 1.2 V,

SINK

= 100 µA, RST asserted

CC1

or V

CC2

≥ 2.7 V,

SINK

= 1.2 mA, RST asserted

CC1

or V

CC2

≥ 4.5 V,

SINK

= 3.2 mA, RST asserted

CC1

≥ 1.8 V, I

SOURCE

= 200 µA,

RST not asserted

CC1

≥ 2.7 V, I

SOURCE

= 500 µA,

RST not asserted

0.8V

CC1

0.8V

CC1

≥ 4.5 V, I

SOURCE

= 800 µA,

RST not asserted

0.8V

CC1

Rise time measured from 10% to

90% of V

;

= 5 pF, V

= 3.3 V

Reset thresholds

Typ Max Unit

2.5

5.5

0.5

0.3

0.4

µA

V ns

µA

RST

(4)

TH1

CC1

reset threshold

L (falling)

M (falling)

T (falling)

S (falling)

R (falling)

Z (falling)

Y (falling)

W (falling)

V (falling)

4.500

4.625

4.750

4.250

4.375

4.500

3.000

3.075

3.150

2.850

2.925

3.000

2.550

2.625

2.700

2.250

2.313

2.375

2.125

2.188

2.250

1.620

1.665

1.710

1.530

1.575

1.620

Doc ID 11469 Rev 8 19/30

DC and AC parameters STM6717/6718/6719/6720/STM6777/6778/6779/6780

Table 6.

Sym

DC and AC characteristics (continued)

Alternative

Description Test condition

(1)

RST2

(4)

V t t

HYST

RD rec

V t

TH2

CC2

Reset threshold hysteresis

reset threshold

to RST delay

RST pulse width

T (falling)

S (falling)

R (falling)

Z (falling)

Y (falling)

W (falling)

V (falling)

I (falling)

H (falling)

G (falling)

F (falling)

K (falling)

J (falling)

E (falling)

D (falling)

Referenced to V

RST

typical

CC1

= (V

RST1

+ 100 mV) to

RST

– 100 mV)

CC2

= (V

RST2

+ 75 mV) to

RST2

– 75 mV) blank

Adjustable reset comparator input (STM6719/20/79/80)

RSTIN

RSTIND

RSTIN input threshold

RSTIN input current

RSTIN hysteresis

RSTIN to RST output delay

RSTIN

to (V

RSTIN

– 30 mV)

Min Typ Max Unit

3.000

3.075

3.150

2.850

2.925

3.000

2.550

2.625

2.700

2.250

2.313

2.375

2.125

2.188

2.250

1.620

1.665

1.710

1.530

1.575

1.620

1.350

1.388

1.425

1.275

1.313

1.350

1.080

1.110

1.140

1.020

1.050

1.080

0.895

0.925

0.955

0.845

0.875

0.905

0.810

0.833

0.855

0.765

0.788

0.810

0.5

20 µs

140

8.8

600

210 280

13.2

17.6

900 1200

µs ms

611

–25

626.5

642

+25

22 mV nA mV

µs

20/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780 DC and AC parameters

Table 6.

Sym

DC and AC characteristics (continued)

Alternative

Description Test condition

(1)

Min Typ Max Unit

Manual (push-button) reset input

0.3V

MR input voltage

0.7V

CC1

V t

MLMH t

MR minimum pulse width

(STM6717/18/19/20)

MR minimum pulse width

(STM6777/78/79/80)

MRC connected via capacitor to V

6 t

MLRL t

MRD

MR to RST output delay

MR glitch immunity

(STM6717/18/19/20)

MR pull-up resistance

200

100

25 50 80

Valid for ambient operating temperature: T

A noted).

= –40 to 85 °C; V

CC1

= 0.8 to 5.5 V and V

CC2

= 0.8 to 3.6 V (except where

Input leakage for the MRC pin is not tested.

Guaranteed by design.

The leakage current measured on the RST pin is tested with the reset de-asserted (output high impedance).

µs

µs ns ns k

Table 7.

MLMH

minimum pulse width

CC1

1.6 V

2.0 V

3.0 V

4.0 V

5.0 V

At 25 °C (typical)

100 pF

120 µs

122 µs

125 µs

128 µs

130 µs

0.1 µF

120 ms

122 ms

125 ms

129 ms

130 ms

Capacitor value

(1)

2.2 µF

2.6 s

2.7 s

2.8 s

3.3 µF

4.0 s

4.1 s

4.2 s

4.3 s

4.7 µF

5.6 s

5.8 s

5.9 s

6.0 s

6.1 s

6.8 µF

8.2 s

8.3 s

8.5 s

8.7 s

8.8 s

Doc ID 11469 Rev 8 21/30

Package mechanical data

6

STM6717/6718/6719/6720/STM6777/6778/6779/6780

Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK

packages, depending on their level of environmental compliance. ECOPACK

® specifications, grade definitions and product status are available at:

www.st.com

ECOPACK

is an ST trademark.

22/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780

Note:

Package mechanical data

Figure 28.

SOT23-5 – 5-lead small outline transistor package mechanical drawing

A1 e

1 e1 D

5x b

0.20

C A B

Datum A

0.20

C 0.10

0133778

E1 e e1

N b

Drawing is not to scale.

Table 8.

SOT23-5 – 5-lead small outline transistor package mechanical data mm inches

Symb

Min

—

0.90

0.30

0.08

—

0.30

0°

Typ

2.80

1.60

0.95

1.90

0.45

4°

—

1.15

—

2.90

Max

1.45

0.15

1.30

0.50

0.22

—

0.60

8°

Min

—

0.035

0.012

0.003

—

0.012

0°

Typ

0.110

0.063

0.037

0.075

0.018

4°

—

0.045

—

0.114

Max

0.057

0.006

0.051

0.020

0.009

—

0.024

8°

Note: Dimensions per JEDEC SOT/SOP product outline MO-178C, variation AA

Doc ID 11469 Rev 8 23/30

Package mechanical data STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 29.

SOT23-6 – 6-lead small outline transistor package mechanical drawing

1 e1 e

Note:

6x b

0.10

C A B

C 0.10

Datum A

0.20

A2 b e e1

Drawing is not to scale.

Table 9.

SOT23-6 – 6-lead small outline transistor package mechanical data mm inches

Symb

Min

0.08

—

0.90

0.30

—

0.30

0°

Typ

—

2.90

2.80

1.60

—

1.15

—

0.95

1.90

0.45

4°

Max

—

0.60

8°

0.22

—

1.45

0.15

1.30

0.50

Min

—

0.035

0.012

0.003

—

0.012

0°

Typ

—

0.045

—

0.114

0.110

0.063

0.037

0.075

0.018

4°

Max

0.057

0.006

0.051

0.020

0.009

—

0.024

8°

Dimensions per JEDEC SOT/SOP product outline MO-178C variation AB

7049714

24/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780

Figure 30.

Carrier tape for SOT23-5L and SOT23-6L

TOP COVER

TAPE

Package mechanical data

Note:

CENTER LINES

OF CAVITY

USER DIRECTION OF FEED

AM03073v1

Part pin 1 indicator is on bottom left for shipping method “F” and is on top right for shipping

method “R” see Section 7 .

Table 10.

Carrier tape dimensions for SOT23-5L and SOT23-6L

Package W D E P

F A

T Unit

Bulk

Qty

SOT23-5

SOT23-6

8.00

+0.30/

–0.10

1.50

+0.10/

–0.00

1.75

±0.10

4.00

±0.10

2.00

±0.10

3.50

±0.05

3.23

±0.10

3.17

±0.10

1.37

±0.10

4.00

±0.10

0.254

±0.013

mm 3000

Doc ID 11469 Rev 8 25/30

Part numbering STM6717/6718/6719/6720/STM6777/6778/6779/6780

Table 11.

Ordering information scheme

Example: STM67xx

Device type

STM67xx

Reset thresholds (V

RST1

and V

RST2

) for V

CC1

and V

CC2

STM6717/18/19/20/77/78 (V

RST1

and V

RST2

) STM6779/80 (V

RST1

only)

Suffix

(1)

RST1

4.625

4.375

3.075

RST2

3.075

2.925

2.625

2.313

1.665

1.388

1.110

Suffix V

L–

(1)

T–

(1)

S–

(1)

Y–

(1)

V–

(1)

R–

Z–

RST1

4.625

3.075

2.925

2.188

1.575

2.625

2.313

(1)

(2)

(1)

(3)

3.075

2.925

2.188

0.925

0.833

2.188

1.575

1.313

1.050

0.875

0.788

1.575

1.313

1.050

Reset pulse width

2.188

1.575

0.875

0.788

1.313

1.050

0.875

0.788

blank: t rec

= 140 ms to 280 ms

B: t rec

= 8.8 ms to 17.6 ms

G: t rec

= 600 ms to 1200 ms

Package

WY = SOT23-5

WB = SOT23-6

Temperature range

6 = –40 to 85°C

Shipping method

E = ECOPACK

package, tubes

F = ECOPACK

package, tape and reel

(4)

= ECOPACK

package, tape and reel (pin 1 at top right).

LT WY 6 F

These are standard versions and are typically held in stock. A non-standard version may require a higher minimum volumes, and/or longer delivery times. For other options, or for more information on any aspect of this device, please contact the ST sales office nearest you.

Available in STM6719 version only.

Available in STM6717 version only.

Available for STM6720SY, STM6719SF and STM6719SFB versions only.

26/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780 Part numbering

Table 12.

Marking description

Part number

STM6717SD

RST1

threshold (V) V

RST2

threshold (V)

2.925

0.788

STM6719TG

STM6719SH

STM6719TW

STM6719SV

STM6719SY

STM6719TZ

STM6720SF

STM6720TG

STM6720TW

STM6720SV

STM6720SY

STM6720TZ

STM6717SJ

STM6717SF

STM6717TG

STM6717TGG

STM6717TW

STM6717SV

STM6717SY

STM6717TZ

STM6718SF

STM6718TG

STM6718TW

STM6718SV

STM6718SY

STM6718TZ

STM6719SF

STM6719SFB

STM6777SF

STM6777TG

STM6777TW

STM6777SV

STM6777SY

STM6777TZ

2.925

3.075

2.925

3.075

2.925

3.075

2.925

3.075

2.925

3.075

2.925

3.075

2.925

3.075

2.925

3.075

2.925

3.075

2.925

3.075

1.050

1.110

1.665

1.575

2.188

2.313

1.110

1.313

1.665

1.575

2.188

2.313

1.050

1.110

1.665

1.575

2.188

2.313

1.050

1.110

1.665

1.575

2.188

2.313

1.050

0.875

1.050

1.110

1.665

1.575

2.188

2.313

Topside marking Bottomside marking

7SF4

7TG4

7TW4

7SV4

7SY4

7TZ4

7TG3

7SH3

7TW3

7SV3

7SY3

7TZ3

7SF5

7TG5

7TW5

7SV5

7SY5

7TZ5

7SY1

7TZ1

7SF2

7TG2

7TW2

7SV2

7SY2

7TZ2

7SF3

7SFB

7SD1

7SJ1

7SF1

7TG1

7TG9

7TW1

7SV1

PYWW

Doc ID 11469 Rev 8 27/30

Part numbering STM6717/6718/6719/6720/STM6777/6778/6779/6780

Table 12.

Marking description (continued)

Part number

STM6778SF

RST1

threshold (V) V

RST2

threshold (V)

2.925

1.050

STM6778TG

STM6778TW

STM6778SV

STM6778SY

STM6778TZ

STM6779L

STM6779T

STM6779S

STM6779Y

STM6779V

STM6780L

STM6780T

STM6780S

STM6780Y

STM6780V

2.188

1.575

4.625

3.075

2.925

2.188

1.575

3.075

2.925

3.075

4.625

3.075

2.925

—

1.110

1.665

1.575

2.188

2.313

—

Topside marking Bottomside marking

7Tx7

7Sx7

7Yx7

7Vx7

7Lx8

7Tx8

7Sx8

7Yx8

7Vx8

7SF6

7TG6

7TW6

7SV6

7SY6

7TZ6

7Lx7

PYWW

Note: For topside marking, “7” is the family number, followed by the V

RST1

threshold, V

RST2 threshold and device number (1,9 = STM6717, 2 = 6718, 3 = 6719, 4 = 6720, 5 = 6777,

6 = 6778, 7 = 6779, 8 = 6780).

For bottomside marking, “P” = assembly site, “Y” = 1-digit year, and “WW” = 2-digit work week.

28/30 Doc ID 11469 Rev 8

STM6717/6718/6719/6720/STM6777/6778/6779/6780 Revision history

Table 13.

Document revision history

Date Revision

18-Oct-2004

25-Oct-2004

14-Jan-2005

09-Feb-2005

08-Apr-2005

28-Jul-2005

13-Sep-2005

07-Oct-2005

07-Feb-2007

12-Jun-2007

05-Dec-2007

22-Mar-2010

02-Aug-2011

1.1

1.2

1.3

1.4

1.5

Changes

First draft

Descriptive text, sales types (

Table 11

)

Update characteristics, pin functions (

Table 2

)

Update characteristics (

Figure 9

;

Table 3

)

Update characteristics and mechanical dimensions; add table

Table 4

Update characteristics, reset delay (

Figure 10

;

Table 4

)

Add operating characteristics; update timings, document status, Lead-

free text (Figure

Figure 13

;

Table 11

)

Marked STM6779/6780 as availability request parts (

Table 1

)

Updated STM6779/6780 availability (cover page,

Table 1

)

Updated

Table 11

, added

Table 12: Marking description

Updated cover page,

Table 6

, and

Updated

Features

;

Table 6

; footnote

Table 4

;

Section 6: Package mechanical data

; added tape and reel

, footnote

); reformatted document.

Removed footnote from

Table 6: DC and AC characteristics

Doc ID 11469 Rev 8 29/30

STM6717/6718/6719/6720/STM6777/6778/6779/6780

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30/30 Doc ID 11469 Rev 8

नमस्ते! मैं एक AI चैटबॉट हूँ जिसे विशेष रूप से STMicroelectronics STM6777 Datasheet के साथ आपकी सहायता करने के लिए प्रशिक्षित किया गया है. मैंने दस्तावेज़ की अच्छी तरह से समीक्षा की है और आपको आवश्यक सटीक जानकारी का पता लगाने या सामग्री को स्पष्ट और सरल शब्दों में समझाने में मदद कर सकता हूँ. चाहे आप विशिष्ट सुविधाओं, समस्या निवारण चरणों या सामान्य उपयोग पर मार्गदर्शन की तलाश कर रहे हों, अपने प्रश्न पूछने के लिए स्वतंत्र महसूस करें. आप अपनी चिंताओं या ज़रूरतों के बारे में जितनी अधिक जानकारी प्रदान करेंगे, मैं उतनी ही सटीकता और प्रभावी ढंग से आपकी सहायता कर सकता हूँ!

सहायक टाइपिंग कर रहा है

सहायक कीबोर्ड से बाहर है. कृपया, बाद में फिर से प्रयास करें.

ऐसा लगता है कि आप एक ऐसे दस्तावेज़ पर पहुँच गए हैं जो कई भाषाओं में लिखा गया है, जिसमें एक ऐसी भाषा भी शामिल है जो आपकी मूल भाषा नहीं है. आप अपनी पसंद की भाषा के बिना पृष्ठों को अस्थायी रूप से छिपाने के लिए निम्न लिंक का उपयोग कर सकते हैं.