Texas Instruments TMS320C54x Assembly Language Tools User’s Guide

TMS320C54x
Assembly Language Tools
User’s Guide
Literature Number: SPRU102E
June 2001
Printed on Recycled Paper
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Copyright  2001, Texas Instruments Incorporated
Preface
Read This First
About This Manual
The TMS320C54x Assembly Language Tools User’s Guide tells you how to
use these assembly language tools:
-
Assembler
Archiver
Linker
Absolute lister
Cross-reference lister
Hex conversion utility
How to Use This Manual
The goal of this book is to help you learn how to use the Texas Instruments
assembly language tools specifically designed for the TMS320C54xt DSPs.
This book is divided into four parts:
- Introductory information gives you an overview of the assembly
language development tools and also discusses common object file
format (COFF), which helps you to use the TMS320C54x tools more
efficiently. Read Chapter 2, Introduction to Common Object File Format,
before using the assembler and linker.
- Assembler description contains detailed information about using the
assembler. This section explains how to invoke the assembler and
discusses source statement format, valid constants and expressions,
assembler output, and assembler directives. It also describes macro
elements.
- Additional assembly language tools describes in detail each of the
tools provided with the assembler to help you create assembly language
source files. For example, Chapter 7 explains how to invoke the linker, how
the linker operates, and how to use linker directives. Chapter 10 explains
how to use the hex conversion utility.
iii
Notational Conventions
Reference material provides supplementary information. This section
contains technical data about the internal format and structure of COFF
object files. It discusses symbolic debugging directives that the C/C++
compiler uses. Finally, it includes hex conversion utility examples,
assembler and linker error messages, and a glossary.
Notational Conventions
This document uses the following conventions:
Program listings, program examples, and interactive displays appear in a
special typeface. Examples use a bold version of the special
typeface for emphasis; interactive displays use a bold version of the
special typeface to distinguish commands that you enter from items that
the system displays (such as prompts, command output, error messages,
etc.).
Here is a sample program listing:
2 0001
3 0002
4 0003
2f
32
x
z
.byte
.byte
.text
47
50
In syntax descriptions, the instruction, command, or directive is in a bold
typeface font and parameters are in an italic typeface. Portions of a syntax
that are in bold should be entered as shown; portions of a syntax that are
in italics describe the type of information that should be entered. Here is
an example of command line syntax:
abs500 filename
abs500 is a command. The command invokes the absolute lister and has
one parameter, indicated by filename. When you invoke the absolute
lister, you supply the name of the file that the absolute lister uses as input.
Square brackets ( [ and ] ) identify an optional parameter. If you use an
optional parameter, you specify the information within the brackets; you
don’t enter the brackets themselves. This is an example of a command
that has an optional parameter:
hex500 [–options] filename
The hex500 command has two parameters. The first parameter, –options,
is optional. Since options is plural, you may select several options. The
second parameter, filename, is required.
iv
Notational Conventions
In assembler syntax statements, column 1 is reserved for the first
character of a label or symbol. If the label or symbol is optional, it is usually
not shown. If it is a required parameter, then it will be shown starting
against the left margin of the shaded box, as in the example below. No
instruction, command, directive, or parameter, other than a symbol or
label, should begin in column 1.
symbol .usect ”section name”, size in words [, blocking flag]
[, alignment flag]
The symbol is required for the .usect directive and must begin in column 1.
The section name must be enclosed in quotes and the section size in
words must be separated from the section name by a comma. The
blocking flag and alignment flag are optional and, if used, must be
separated by commas.
Some directives can have a varying number of parameters. For example,
the .byte directive can have up to 100 parameters. The syntax for this
directive is:
.byte value1 [, ... , valuen ]
Note that .byte does not
begin in column 1.
This syntax shows that .byte must have at least one value parameter, but
you have the option of supplying additional value parameters, separated
by commas.
Following are other symbols and abbreviations used throughout this
document.
Symbol
Definition
Symbol
Definition
AR0–AR7
Auxiliary Registers
0 through 7
PC
Program counter
register
B,b
Suffix — binary integer
Q,q
Suffix — octal integer
H,h
Suffix — hexadecimal
integer
SP
Stack pointer register
LSB
Least significant bit
ST
Status register
MSB
Most significant bit
C54x is used throughout this manual to collectively refer to all supported
C54x devices.
Read This First
v
Related Documentation From Texas Instruments/Trademarks
Related Documentation From Texas Instruments
The following books describe the TMS320C54x devices and related support
tools. To obtain a copy of any of these TI documents, call the Texas
Instruments Literature Response Center at (800) 477–8924. When ordering,
please identify the book by its title and literature number.
TMS320C54x Optimizing C Compiler User’s Guide (literature number
SPRU103) describes the TMS320C54x C compiler. This C compiler
accepts ANSI standard C source code and produces assembly language
source code for the TMS320C54x generation of devices.
TMS320C54x DSP Reference Set, Volume 1: CPU (literature number
SPRU131) describes the TMS320C54x 16-bit fixed-point
general-purpose digital signal processors. Covered are its architecture,
internal register structure, data and program addressing, and the
instruction pipeline. Also includes development support information,
parts lists, and design considerations for using the XDS510 emulator.
TMS320C54x DSP Reference Set, Volume 2: Mnemonic Instruction Set
(literature number SPRU172) describes the TMS320C54x digital
signal processor mnemonic instructions individually. Also includes a
summary of instruction set classes and cycles.
TMS320C54x DSP Reference Set, Volume 3: Algebraic Instruction Set
(literature number SPRU179) describes the TMS320C54x digital
signal processor algebraic instructions individually. Also includes a
summary of instruction set classes and cycles.
TMS320C54x DSP Reference Set, Volume 4: Applications Guide
(literature number SPRU173) describes software and hardware
applications for the TMS320C54x digital signal processor. Also
includes development support information, parts lists, and design
considerations for using the XDS510 emulator.
Code Composer User’s Guide (literature number SPRU328) explains how to
use the Code Composer development environment to build and debug
embedded real-time DSP applications.
Trademarks
Code Composer Studio, TMS320C54x, and C54x are trademarks of Texas
Instruments Incorporated.
vi
Contents
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Provides an overview of the software development tools.
1.1
1.2
2
Introduction to Common Object File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
Discusses the basic COFF concept of sections and how they can help you use the assembler
and linker more efficiently. Common object file format, or COFF, is the object file format used
by the tools.
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
3
Software Development Tools Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Tools Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
COFF File Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
How the Assembler Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.3.1 Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.3.2 Initialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.3.3 Named Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.3.4 Subsections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.3.5 Section Program Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.3.6 An Example That Uses Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
How the Linker Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.4.1 Default Memory Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2.4.2 Placing Sections in the Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2.5.1 Relocation Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
Runtime Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
Loading a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
Symbols in a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2.8.1 External Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2.8.2 The Symbol Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
Assembler Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Explains how to invoke the assembler and discusses source statement format, valid constants
and expressions, and assembler output.
3.1
3.2
3.3
Assembler Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Invoking the Assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
vii
Contents
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
4
Assembler Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
Describes the directives according to function, and presents the directives in alphabetical order.
4.1
4.2
4.3
4.4
4.5
4.6
4.7
viii
Naming Alternate Files and Directories for Assembler Input . . . . . . . . . . . . . . . . . . . . . . 3-8
3.4.1 Using the – i Assembler Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3.4.2 Using Environment Variables (C54X_A_DIR and A_DIR) . . . . . . . . . . . . . . . . . 3-9
Source Statement Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.5.1 Source Statement Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.5.2 Label Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.5.3 Mnemonic Instruction Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.5.4 Algebraic Instruction Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
3.5.5 Comment Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.6.1 Binary Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.6.2 Octal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.6.3 Decimal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3.6.4 Hexadecimal Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3.6.5 Character Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
3.6.6 Floating-Point Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
Character Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18
Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.8.1 Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.8.2 Symbolic Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.8.3 Defining Symbolic Constants (–d Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.8.4 Predefined Symbolic Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.8.5 Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
3.8.6 Local Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22
Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-25
3.9.1 Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
3.9.2 Expression Overflow and Underflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
3.9.3 Well-Defined Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27
3.9.4 Conditional Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27
3.9.5 Relocatable Symbols and Legal Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-28
Built-in Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-30
Loading Values into Extended Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-32
Source Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33
Cross-Reference Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-37
Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives . . . . . . . . . . . 4-8
Directives That Define Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
Directives That Initialize Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
Directives That Align the Section Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
Directives That Format the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-17
Directives That Reference Other Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-19
Contents
4.8
4.9
4.10
4.11
5
5.4
5.5
5.6
5.7
5.8
5.9
5.10
Using Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
Defining Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
Macro Parameters/Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6
5.3.1 Directives That Define Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7
5.3.2 Built-In Substitution Symbol Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
5.3.3 Recursive Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
5.3.4 Forced Substitution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
5.3.5 Accessing Individual Characters of Subscripted Substitution Symbols . . . . . 5-12
5.3.6 Substitution Symbols as Local Variables in Macros . . . . . . . . . . . . . . . . . . . . . . 5-13
Macro Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
Using Conditional Assembly in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
Using Labels in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17
Producing Messages in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19
Formatting the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
Using Recursive and Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22
Macro Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
Archiver Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
Contains instructions for invoking the archiver, creating new archive libraries, and modifying
existing libraries.
6.1
6.2
6.3
6.4
7
4-20
4-21
4-23
4-25
Macro Language . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
Describes macro directives, substitution symbols used as macro parameters, and how to
create macros.
5.1
5.2
5.3
6
Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Assembly-Time Symbol Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Miscellaneous Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Directives Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Archiver Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invoking the Archiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Archiver Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6-2
6-3
6-4
6-6
Linker Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
Explains how to invoke the linker, provides details about linker operation, discusses linker
directives, and presents a detailed linking example.
7.1
7.2
7.3
7.4
Linker Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
Invoking the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
7.4.1 Relocation Capabilities (– a and – r Options) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8
7.4.2 Disable Merge of Symbolic Debugging Information (–b Option) . . . . . . . . . . . 7-10
7.4.3 C Language Options (–c and –cr Options) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10
7.4.4 Define an Entry Point (–e global_symbol Option) . . . . . . . . . . . . . . . . . . . . . . . 7-11
Contents
ix
Contents
7.4.5
7.4.6
7.4.7
7.4.8
7.4.9
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
x
Set Default Fill Value (–f cc Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Make a Symbol Global (–g global_symbol Option) . . . . . . . . . . . . . . . . . . . . . .
Make All Global Symbols Static (–h Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Define Heap Size (–heap constant Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Alter the Library Search Algorithm (–l Option, –i Option, and
C54X_C_DIR/C_DIR Environment Variables) . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.10 Disable Conditional Linking (–j Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.11 Ignore Alignment Flags (–k Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.12 Create a Map File (–m filename Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.13 Name an Output Module (–o filename Option) . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.14 Specify a Quiet Run (–q Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.15 Strip Symbolic Information (–s Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.16 Define Stack Size (–stack constant Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.17 Introduce an Unresolved Symbol (–u symbol Option) . . . . . . . . . . . . . . . . . . . .
7.4.18 Specify a COFF Format (–v Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4.19 Display a Message for Output Section Information (–w Option) . . . . . . . . . . .
7.4.20 Exhaustively Read Libraries (–x Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.5.1 Reserved Names in Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.5.2 Constants in Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Object Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.7.1 Default Memory Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.7.2 MEMORY Directive Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.8.1 Default Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.8.2 SECTIONS Directive Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.8.3 Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specifying a Section’s Runtime Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.9.1 Specifying Load and Run Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.9.2 Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.9.3 Referring to the Load Address by Using the .label Directive . . . . . . . . . . . . . .
Using UNION and GROUP Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.10.1 Overlaying Sections With the UNION Statement . . . . . . . . . . . . . . . . . . . . . . . .
7.10.2 Grouping Output Sections Together . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.10.3 Nesting UNIONs and GROUPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.10.4 Checking the Consistency of Allocators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.11.1 Using the MEMORY Directive to Define Overlay Pages . . . . . . . . . . . . . . . . . .
7.11.2 Using Overlay Pages With the SECTIONS Directive . . . . . . . . . . . . . . . . . . . .
7.11.3 Page Definition Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Default Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.12.1 Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.12.2 General Rules for Output Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7-11
7-12
7-12
7-12
7-13
7-16
7-16
7-16
7-17
7-17
7-17
7-18
7-18
7-19
7-19
7-20
7-21
7-24
7-24
7-25
7-27
7-27
7-27
7-32
7-32
7-32
7-35
7-44
7-44
7-45
7-45
7-48
7-48
7-50
7-51
7-52
7-53
7-53
7-55
7-56
7-58
7-58
7-59
Contents
7.13
7.14
7.15
7.16
7.17
7.18
8
7-61
7-62
7-62
7-63
7-63
7-65
7-65
7-66
7-66
7-66
7-68
7-69
7-70
7-72
7-72
7-72
7-73
7-73
7-75
7-76
Absolute Lister Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1
Explains how to invoke the absolute lister to obtain a listing of the absolute addresses of an
object file.
8.1
8.2
8.3
9
Special Section Types (DSECT, COPY, and NOLOAD) . . . . . . . . . . . . . . . . . . . . . . . . .
Assigning Symbols at Link Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.14.1 Syntax of Assignment Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.14.2 Assigning the SPC to a Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.14.3 Assignment Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.14.4 Symbols Defined by the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.14.5 Symbols Defined Only For C Support (–c or –cr Option) . . . . . . . . . . . . . . . . .
Creating and Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.15.1 Initialized and Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.15.2 Creating Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.15.3 Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.15.4 Explicit Initialization of Uninitialized Sections . . . . . . . . . . . . . . . . . . . . . . . . . . .
Partial (Incremental) Linking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linking C/C++ Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.17.1 Runtime Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.17.2 Object Libraries and Runtime Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.17.3 Setting the Size of the Stack and Heap Sections . . . . . . . . . . . . . . . . . . . . . . . .
7.17.4 Autoinitialization (ROM and RAM Models) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.17.5 The –c and –cr Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linker Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Producing an Absolute Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
Invoking the Absolute Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
Absolute Lister Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-5
Cross-Reference Lister Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
Explains how to invoke the cross-reference lister to obtain a listing of symbols, their definitions,
and their references in the linked source files.
9.1
9.2
9.3
Producing a Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
Invoking the Cross-Reference Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
Cross-Reference Listing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
10 Hex Conversion Utility Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
Explains how to invoke the hex utility to convert a COFF object file into one of several standard
hexadecimal formats suitable for loading into an EPROM programmer.
10.1
10.2
10.3
10.4
Hex Conversion Utility Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
Invoking the Hex Conversion Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Command File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-7
10.3.1 Examples of Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-8
Understanding Memory Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9
10.4.1 Target Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-10
Contents
xi
Contents
10.4.2 Data Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.4.3 Memory Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.4.4 ROM Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.4.5 A Memory Configuration Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.4.6 Specifying Word Order for Output Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.5 The ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.5.1 When to Use the ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.5.2 An Example of the ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.5.3 Creating a Map File of the ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.6 The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.7 Output Filenames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.7.1 Assigning Output Filenames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.8 Image Mode and the –fill Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.8.1 The –image Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.8.2 Specifying a Fill Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.8.3 Steps to Follow in Image Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9 Building a Table for an On-Chip Boot Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9.1 Description of the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9.2 The Boot Table Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9.3 How to Build the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9.4 Booting From a Device Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9.5 Setting the Entry Point for the Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.9.6 Using the C54x Boot Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.10 Controlling the ROM Device Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.10.1 Controlling the Starting Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.10.2 Controlling the Address Increment Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.10.3 The –byte Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.10.4 Dealing With Address Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.11 Description of the Object Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.11.1 ASCII-Hex Object Format (–a Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.11.2 Intel MCS-86 Object Format (–i Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.11.3 Motorola Exorciser Object Format (–m1, –m2, –m3 Options) . . . . . . . . . . . .
10.11.4 Texas Instruments SDSMAC Object Format (–t Option) . . . . . . . . . . . . . . . . .
10.11.5 Extended Tektronix Object Format (–x Option) . . . . . . . . . . . . . . . . . . . . . . . .
10.12 Hex Conversion Utility Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10-10
10-10
10-11
10-14
10-14
10-16
10-18
10-19
10-21
10-22
10-24
10-24
10-26
10-26
10-27
10-27
10-28
10-28
10-28
10-29
10-32
10-32
10-33
10-35
10-35
10-37
10-37
10-37
10-39
10-40
10-41
10-42
10-43
10-44
10-45
11 Mnemonic-to-Algebraic Translator Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1
Explains how to invoke the mnemonic-to-algebraic translator utility to convert a source file
containing mnemonic instructions to a source file containing algebraic instructions.
11.1
11.2
11.3
xii
Translator Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.1.1 What the Translator Does . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11.1.2 What the Translator Does Not Do . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Translator Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invoking the Translator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11-2
11-2
11-2
11-3
11-4
Contents
11.4
11.5
Translation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
11.4.1 Literal Mode (–t Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
11.4.2 About Symbol Names in Literal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
11.4.3 Expansion Mode (–e Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-6
How the Translator Works With Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
11.5.1 Directives in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
11.5.2 Macro Local Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9
11.5.3 Defining Labels When Invoking A Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10
A
Common Object File Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1
Contains supplemental technical data about the internal format and structure of COFF object
files.
A.1 COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A.1.1 Impact of Switching Operating Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4
A.2 File Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
A.3 Optional File Header Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
A.4 Section Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
A.5 Structuring Relocation Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
A.6 Line-Number Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
A.7 Symbol Table Structure and Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
A.7.1 Special Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16
A.7.2 Symbol Name Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A.7.3 String Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A.7.4 Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19
A.7.5 Symbol Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20
A.7.6 Section Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-21
A.7.7 Type Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-21
A.7.8 Auxiliary Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-23
B
Symbolic Debugging Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1
Discusses symbolic debugging directives that the C compiler uses.
C
Hex Conversion Utility Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1
Illustrates command file development for a variety of memory systems and situations.
C.1 Base Code for the Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
C.2 Example 1: Building A Hex Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . C-3
C.3 Example 2: Avoiding Holes With Multiple Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-8
C.4 Example 3: Generating a Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-10
C.5 Example 4: Generating a Boot Table for LP Core Devices . . . . . . . . . . . . . . . . . . . . . . . C-17
D
Assembler Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1
Lists the error messages that the assembler and linker issue, and gives a description of the
condition(s) that caused each error.
E
Linker Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-1
Lists the error messages that the assembler and linker issue, and gives a description of the
condition(s) that caused each error.
F
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F-1
Defines terms and acronyms used in this book.
Contents
xiii
Figures
Figures
1–1
2–1
2–2
2–3
3–1
4–1
4–2
4–3
4–4
4–5
4–6
4–7
6–1
7–1
7–2
7–3
7–4
7–5
7–6
7–7
7–8
8–1
8–2
8–3
9–1
10–1
10–2
10–3
10–4
10–5
10–6
10–7
10–8
10–9
10–10
10–11
xiv
TMS320C54x Software Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Partitioning Memory Into Logical Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Object Code Generated by the File in Example 2–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
Combining Input Sections to Form an Executable Object Module . . . . . . . . . . . . . . . . . . . 2-14
Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
The .space and .bes Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
The .field Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12
Initialization Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14
The .align Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16
Allocating .bss Blocks Within a Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-31
The .field Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-49
The .usect Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-97
Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
Memory Map Defined in Example 7–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-31
Section Allocation Defined by Example 7–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-34
Runtime Execution of Example 7–6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-47
Memory Allocation Shown in Example 7–7 and Example 7–8 . . . . . . . . . . . . . . . . . . . . . . 7-49
Overlay Pages Defined by Example 7–11 and Example 7–12 . . . . . . . . . . . . . . . . . . . . . . 7-54
RAM Model of Autoinitialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-74
ROM Model of Autoinitialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-74
Absolute Lister Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
module1.lst . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9
module2.lst . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9
Cross-Reference Lister Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
Hex Conversion Utility Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2
Hex Conversion Utility Process Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9
Data and Memory Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-11
Data, Memory, and ROM Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-13
C54x Memory Configuration Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-14
Varying the Word Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-15
The infile.out File From Example 10–1 Partitioned Into Four Output Files . . . . . . . . . . . 10-20
Sample Command File for Booting From a C54x EPROM . . . . . . . . . . . . . . . . . . . . . . . . 10-34
Hex Command File for Avoiding a Hole at the Beginning of a Section . . . . . . . . . . . . . . 10-38
ASCII-Hex Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-40
Intel Hex Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-41
Contents
10–12
10–13
10–14
11–1
11–2
11–3
11–4
11–5
A–1
A–2
A–3
A–4
A–5
A–6
A–7
A–8
A–9
C–1
C–2
C–3
C–4
Motorola-S Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-42
TI-Tagged Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-43
Extended Tektronix Object Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-44
Translator Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3
Literal Mode Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
Expansion Mode Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-6
Defining Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10
Rewritten Source Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10
COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
COFF Object File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
Section Header Pointers for the .text Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-9
Line-Number Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
Line-Number Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-13
Symbol Table Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
Symbols for Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17
Symbols for Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-17
String Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A Two 8-Bit EPROM System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-3
Data From Output File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-6
EPROM System for a C54x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-10
EPROM System for a C54xLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-17
Contents
xv
Tables
Tables
3–1
3–2
3–3
3–4
4–1
4–2
5–1
5–2
5–3
5–4
5–5
5–6
7–1
9–1
10–1
10–2
10–3
A–1
A–2
A–3
A–4
A–5
A–6
A–7
A–8
A–9
A–10
A–11
A–12
A–13
A–14
A–15
A–16
A–17
A–18
A–19
xvi
Operators Used in Expressions (Precedence) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
Expressions With Absolute and Relocatable Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-28
Assembler Built-In Math Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-30
Symbol Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-38
Assembler Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Memory-Mapped Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-71
Functions and Return Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
Creating Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
Manipulating Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
Conditional Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
Producing Assembly-Time Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
Formatting the Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
Operators Used in Expressions (Precedence) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-64
Symbol Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6
Hex Conversion Utility Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
Boot-Loader Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-29
Options for Specifying Hex Conversion Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-39
File Header Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
File Header Flags (Bytes 18 and 19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
Optional File Header Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
Section Header Contents for COFF1 Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
Section Header Contents for COFF2 Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
Section Header Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-8
Relocation Entry Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
Relocation Types (Bytes 8 and 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11
Line-Number Entry Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
Symbol Table Entry Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-15
Special Symbols in the Symbol Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16
Symbol Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19
Special Symbols and Their Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20
Symbol Values and Storage Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-20
Section Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-21
Basic Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-22
Derived Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-22
Auxiliary Symbol Table Entries Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-23
Filename Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-24
Contents
A–20
A–21
A–22
A–23
A–24
A–25
A–26
A–27
Section Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tag Name Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
End-of-Structure Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Function Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Array Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
End-of-Blocks/Functions Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . . . . . . .
Beginning-of-Blocks/Functions Format for Auxiliary Table Entries . . . . . . . . . . . . . . . . . . .
Structure, Union, and Enumeration Names Format for Auxiliary Table Entries . . . . . . . .
Contents
A-24
A-24
A-25
A-25
A-26
A-26
A-27
A-27
xvii
Examples
Examples
2–1
2–2
3–1
3–2
3–3
3–4
3–5
4–1
5–1
5–2
5–3
5–4
5–5
5–6
5–7
5–8
5–9
5–10
5–11
5–12
5–13
5–14
5–15
5–16
7–1
7–2
7–3
7–4
7–5
7–6
7–7
7–8
7–9
7–10
7–11
xviii
Using Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
Code That Generates Relocation Entries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
$n Local Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22
name? Local Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-24
Well-Defined Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-27
Assembler Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-35
Sample Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-37
Sections Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
Macro Definition, Call, and Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
Calling a Macro With Varying Numbers of Arguments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7
The .asg Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
The .eval Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
Using Built-In Substitution Symbol Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
Recursive Substitution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
Using the Forced Substitution Operator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
Using Subscripted Substitution Symbols to Redefine an Instruction . . . . . . . . . . . . . . . . . 5-12
Using Subscripted Substitution Symbols to Find Substrings . . . . . . . . . . . . . . . . . . . . . . . . 5-13
The .loop/.break/.endloop Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
Nested Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
Built-In Substitution Symbol Functions Used in a Conditional
Assembly Code Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
Unique Labels in a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17
Producing Messages in a Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-20
Using Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22
Using Recursive Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-23
Linker Command File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-22
Command File With Linker Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-23
The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-28
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-34
The Most Common Method of Specifying Section Contents . . . . . . . . . . . . . . . . . . . . . . . . 7-38
Copying a Section From ROM to RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-46
The UNION Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-48
Separate Load Addresses for UNION Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-48
Allocate Sections Together . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-50
Nesting GROUP and UNION statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-51
Memory Directive With Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-53
Contents
7–12
7–13
7–14
7–15
10–1
10–2
11–1
11–2
11–3
11–4
C–1
C–2
C–3
C–4
C–5
C–6
C–7
C–8
C–9
C–10
C–11
C–12
C–13
C–14
C–15
C–16
C–17
C–18
SECTIONS Directive Definition for Overlays in Figure 7–6 . . . . . . . . . . . . . . . . . . . . . . . . . 7-55
Default Allocation for TMS320C54x Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-58
Linker Command File, demo.cmd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-77
Output Map File, demo.map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-78
A ROMS Directive Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-19
Map File Output From Example 10–1 Showing Memory Ranges . . . . . . . . . . . . . . . . . . 10-21
Treatment of Symbol Names in Literal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
Expansion Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7
Directives in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-8
Macro Local Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9
Assembly Code for Hex Conversion Utility Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
A Linker Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-4
A Hex Command File for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-5
Map File Resulting From Hex Command File in Example C–3 on page C-5 . . . . . . . . . . . C-7
Method One for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-8
Method Two for Avoiding Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-9
C Code for Example 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-10
Linker Command File to Form a Single Boot Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-12
Section Allocation Portion of Map File Resulting From the Command File . . . . . . . . . . . C-13
Hex Command File for Converting a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-15
Map File Resulting From the Command File in Example C–10 . . . . . . . . . . . . . . . . . . . . . C-16
Hex Conversion Utility Output File Resulting From the Command File
in C–10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-16
C Code for a C54xLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-17
Linker Command File for a C54xLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-19
Section Allocation Portion of Map File Resulting From the Command File
in Example C–14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-19
Hex Command File for Converting a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-22
Map File Resulting From the Command File in Example C–16 . . . . . . . . . . . . . . . . . . . . . C-23
Hex Conversion Utility Output File Resulting From the
Command File in C–16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-23
Contents
xix
Chapter 1
Introduction
The TMS320C54xt DSPs are supported by the following assembly language
tools:
-
Assembler
Archiver
Linker
Absolute lister
Cross-reference utility
Hex conversion utility
Mnemonic-to-algebraic translator utility
This chapter shows how these tools fit into the general software tools development flow and gives a brief description of each tool. For convenience, it also
summarizes the C compiler and debugging tools. For detailed information on
the compiler and debugger and for complete descriptions of the TMS320C54x
devices, refer to the books listed in Related Documentation From Texas
Instruments on page vi.
The assembly language tools create and use object files in common object file
format (COFF) to facilitate modular programming. Object files contain
separate blocks (called sections) of code and data that you can load into
C54xt memory spaces. You can program the C54x more efficiently if you
have a basic understanding of COFF. Chapter 2, Introduction to Common
Object File Format, discusses this object format in detail.
Topic
Page
1.1
Software Development Tools Overview . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2
Tools Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Introduction
1-1
Software Development Tools Overview
1.1 Software Development Tools Overview
Figure 1–1 illustrates the C54x software development flow. The shaded
portion of the figure highlights the most common path of software
development; the other portions are optional.
Figure 1–1. TMS320C54x Software Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
1-2
Assembler
source
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Assembly
translation
assistant
Absolute lister
Cross-reference
lister
C54x
Tools Descriptions
1.2 Tools Descriptions
The following list describes the tools that are shown in Figure 1–1:
The C/C++ compiler translates C/C++ source code into C54x assembly
language source code. The compiler package includes the library-build
utility, with which you can build your own runtime libraries.
The assembler translates assembly language source files into machine
language COFF object files. Source files can contain instructions, assembler directives, and macro directives. You can use assembler directives to
control various aspects of the assembly process, such as the source listing format, data alignment, and section content.
The linker combines relocatable COFF object files (created by the
assembler) into a single executable COFF object module. As it creates the
executable module, it binds symbols to memory locations and resolves all
references to those symbols. It also accepts archiver library members and
output modules created by a previous linker run. Linker directives allow
you to combine object file sections, bind sections or symbols to addresses
or within memory ranges, and define or redefine global symbols.
The archiver collects a group of files into a single archive file. For
example, you can collect several macros into a macro library. The
assembler searches the library and uses the members that are called as
macros by the source file. You can also use the archiver to collect a group
of object files into an object library. The linker includes in the library the
members that resolve external references during the link.
The mnemonic-to-algebraic assembly translator utility converts an
assembly language source file containing mnemonic instructions to an
assembly language source file containing algebraic instructions.
The library-build utility builds your own customized C/C++ runtime-support library. Standard runtime-support library functions are provided as
source code in rts.src and as object code in rts.lib.
The TMS320C54x DSP accepts COFF files as input, but most EPROM
programmers do not. The hex conversion utility converts a COFF object
file into TI-tagged, Intel, Motorola, or Tektronix object format. The
converted file can be downloaded to an EPROM programmer.
Introduction
1-3
Tools Descriptions
The absolute lister accepts linked object files as input and creates .abs
files as output. You assemble .abs files to produce a listing that contains
absolute rather than relative addresses. Without the absolute lister,
producing such a listing would be tedious and require many manual operations.
The cross-reference lister uses object files to produce a cross-reference
listing showing symbols, their definitions, and their references in the linked
source files.
The purpose of this development process is to produce a module that can be
executed in a C54x target system. You can use one of several debugging tools
to refine and correct your code. Available products include:
An instruction-accurate software simulator
An evaluation module (EVM)
An XDS emulator
These debugging tools are accessed within Code Composer Studio. For more
information, see the Code Composer Studio User’s Guide.
1-4
Chapter 2
Introduction to Common Object File Format
The assembler and linker create object files that can be executed by a
TMS320C54xt device. The format for these object files is called common
object file format (COFF).
COFF makes modular programming easier, because it encourages you to
think in terms of blocks of code and data when you write an assembly language
program. These blocks are known as sections. Both the assembler and the
linker provide directives that allow you to create and manipulate sections.
This chapter provides an overview of COFF sections. For additional
information, see Appendix A, Common Object File Format, which explains the
COFF structure.
Topic
Page
2.1
COFF File Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.2
Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.3
How the Assembler Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.4
How the Linker Handles Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.5
Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2.6
Runtime Relocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2.7
Loading a Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2.8
Symbols in a COFF File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
Introduction to Common Object File Format
2-1
COFF File Types
2.1 COFF File Types
The following types of COFF files exist:
- COFF0
- COFF1
- COFF2
Each COFF file type has a different header format. The data portions of the
COFF files are identical. For details about the COFF file structure, see
Appendix A, Common Object File Format.
The TMS320C54x assembler and C compiler create COFF2 files. The linker
can read and write all types of COFF files. By default, the linker creates
COFF2 files. Use the –v linker option to specify a different format. The linker
supports COFF0 and COFF1 files for older versions of the assembler and C
compiler only.
2-2
Sections
2.2
Sections
The smallest unit of an object file is called a section. A section is a block of code
or data that will ultimately occupy contiguous space in the memory map. Each
section of an object file is separate and distinct. COFF object files always contain three default sections:
.text section
usually contains executable code
.data section
usually contains initialized data
.bss section
usually reserves space for uninitialized variables
In addition, the assembler and linker allow you to create, name, and link
named sections that are used like the .data, .text, and .bss sections.
There are two basic types of sections:
initialized sections
contain data or code. The .text and .data sections
are initialized; named sections created with the
.sect assembler directive are also initialized.
uninitialized sections
reserve space for uninitialized data. The .bss section is uninitialized; named sections created with
the .usect assembler directive are also uninitialized.
Several assembler directives allow you to associate various portions of code
and data with the appropriate sections. The assembler builds these sections
during the assembly process, creating an object file organized as shown in
Figure 2–1.
One of the linker’s functions is to relocate sections into the target memory
map; this function is called allocation. Because most systems contain several
types of memory, using sections can help you use target memory more efficiently. All sections are independently relocatable; you can place any section
into any allocated block of target memory. For example, you can define a section that contains an initialization routine and then allocate the routine into a
portion of the memory map that contains ROM.
Introduction to Common Object File Format
2-3
Sections
Figure 2–1 shows the relationship between sections in an object file and a
hypothetical target memory.
Figure 2–1. Partitioning Memory Into Logical Blocks
Object File
Target Memory
.bss
RAM
.data
EEPROM
.text
ROM
2-4
How the Assembler Handles Sections
2.3
How the Assembler Handles Sections
The assembler identifies the portions of an assembly language program that
belong in a section. The assembler has several directives that support this
function:
-
.bss
.usect
.text
.data
.sect
The .bss and .usect directives create uninitialized sections; the other
directives create initialized sections.
You can create subsections of any section to give you tighter control of the
memory map. Subsections are created using the .sect and .usect directives.
Subsections are identified with the base section name and a subsection name
separated by a colon. See subsection 2.3.4, Subsections, page 2-9, for more
information.
Note:
Default Section Directive
If you don’t use any of the sections directives, the assembler assembles
everything into the .text section.
2.3.1
Uninitialized Sections
Uninitialized sections reserve space in processor memory; they are usually
allocated into RAM. These sections have no actual contents in the object file;
they simply reserve memory. A program can use this space at runtime for
creating and storing variables.
Uninitialized data areas are built by using the .bss and .usect assembler
directives.
- The .bss directive reserves space in the .bss section.
- The .usect directive reserves space in a specific, uninitialized named
section.
Each time you invoke the .bss directive, the assembler reserves more space
in the appropriate section. Each time you invoke the .usect directive, the
assembler reserves more space in the specified named section.
Introduction to Common Object File Format
2-5
How the Assembler Handles Sections
The syntax for these directives is:
.bss symbol, size in words [, [blocking flag] [, alignment flag]]
symbol .usect ”section name ”, size in words [, [blocking flag] [, alignment flag]]
symbol
points to the first word reserved by this invocation of the
.bss or .usect directive. The symbol corresponds to the
name of the variable that you’re reserving space for. It can
be referenced by any other section and can also be declared as a global symbol (with the .global assembler directive).
size in words
is an absolute expression.
- The .bss directive reserves size words in the .bss sec-
tion.
- The .usect directive reserves size words in section
name.
blocking flag
is an optional parameter. If you specify a value other than
0 for this parameter, the assembler associates size words
contiguously; the allocated space will not cross a page
boundary, unless size is greater than a page, in which case
the object will start on a page boundary.
alignment flag
is an optional parameter. If you specify a value other than
0 for this parameter, the section is aligned to a long word
boundary.
section name
tells the assembler which named section to reserve space
in. For more information about named sections, see
subsection 2.3.3, Named Sections, on page 2-8.
The .text, .data, and .sect directives tell the assembler to stop assembling into
the current section and begin assembling into the indicated section. The .bss
and .usect directives, however, do not end the current section and begin a new
one; they simply escape temporarily from the current section. The .bss and
.usect directives can appear anywhere in an initialized section without
affecting its contents.
Uninitialized subsections can be created with the .usect directive. The assembler treats uninitialized subsections in the same manner as uninitialized
sections. See subsection 2.3.4, Subsections, on page 2-9 for more information on creating subsections.
2-6
How the Assembler Handles Sections
2.3.2
Initialized Sections
Initialized sections contain executable code or initialized data. The contents
of these sections are stored in the object file and placed in processor memory
when the program is loaded. Each initialized section is independently relocatable and may reference symbols that are defined in other sections. The linker
automatically resolves these section-relative references.
Three directives tell the assembler to place code or data into a section. The
syntaxes for these directives are:
.text [value]
.data [value]
.sect ”section name” [, value]
When the assembler encounters one of these directives, it stops assembling
into the current section (acting as an implied end-current-section command).
It then assembles subsequent code into the designated section until it encounters another .text, .data, or .sect directive. The value, if present, specifies the
starting value of the section program counter. The starting value of the section
program counter can be specified only once; it must be done the first time the
directive for that section is encountered. By default, the SPC starts at 0.
Sections are built through an iterative process. For example, when the assembler first encounters a .data directive, the .data section is empty. The statements following this first .data directive are assembled into the .data section
(until the assembler encounters a .text or .sect directive). If the assembler
encounters subsequent .data directives, it adds the statements following
these .data directives to the statements already in the .data section. This
creates a single .data section that can be allocated contiguously into memory.
Initialized subsections can be created with the .sect directive. The assembler
treats initialized subsections in the same manner as initialized sections. See
subsection 2.3.4, Subsections, on page 2-9 for more information on creating
subsections.
Introduction to Common Object File Format
2-7
How the Assembler Handles Sections
2.3.3
Named Sections
Named sections are sections that you create. You can use them like the default .text, .data, and .bss sections, but they are assembled separately.
For example, repeated use of the .text directive builds up a single .text section
in the object file. When linked, this .text section is allocated into memory as
a single unit. Suppose there is a portion of executable code (perhaps an initialization routine) that you don’t want allocated with .text. If you assemble this
segment of code into a named section, it is assembled separately from .text,
and you can allocate it into memory separately. You can also assemble initialized data that is separate from the .data section, and you can reserve space
for uninitialized variables that is separate from the .bss section.
The following directives let you create named sections:
- The .usect directive creates sections that are used like the .bss section.
These sections reserve space in RAM for variables.
- The .sect directive creates sections, like the default .text and .data
sections, that can contain code or data. The .sect directive creates named
sections with relocatable addresses.
The syntax for these directives is shown below:
symbol .usect ”section name”, size in words [, [blocking flag] [, alignment flag]]
.sect ”section name”
The section name parameter is the name of the section. You can create up to
32 767 separate named sections. A section name can be up to 200 characters. For the .sect and .usect directives, a section name can refer to a subsection (see subsection 2.3.4, Subsections, for details).
Each time you invoke one of these directives with a new name, you create a
new named section. Each time you invoke one of these directives with a name
that was already used, the assembler assembles code or data (or reserves
space) into the section with that name. You cannot use the same names with
different directives. That is, you cannot create a section with the .usect directive and then try to use the same section with .sect.
2-8
How the Assembler Handles Sections
2.3.4
Subsections
Subsections are smaller sections within larger sections. Like sections,
subsections can be manipulated by the linker. Subsections give you tighter
control of the memory map. You can create subsections by using the .sect or
.usect directive. The syntax for a subsection name is:
section name:subsection name
A subsection is identified by the base section name followed by a colon, then
the name of the subsection. A subsection can be allocated separately or
grouped with other sections using the same base name. For example, to
create a subsection called _func within the .text section, enter the following:
.sect ”.text:_func”
You can allocate _func separately or with other .text sections.
You can create two types of subsections:
- Initialized subsections are created using the .sect directive. See
subsection 2.3.2, Initialized Sections, on page 2-7.
- Uninitialized subsections are created using the .usect directive. See
subsection 2.3.1, Uninitialized Sections, on page 2-5.
Subsections are allocated in the same manner as sections. See Section 7.8,
The SECTIONS Directive, on page 7-32 for more information.
2.3.5
Section Program Counters
The assembler maintains a separate program counter for each section. These
program counters are known as section program counters, or SPCs.
An SPC represents the current address within a section of code or data.
Initially, the assembler sets each SPC to 0. As the assembler fills a section with
code or data, it increments the appropriate SPC. If you resume assembling
into a section, the assembler remembers the appropriate SPC’s previous value and continues incrementing the SPC at that point.
The assembler treats each section as if it began at address 0; the linker
relocates each section according to its final location in the memory map. For
more information, see Section 2.5, Relocation, on page 2-16.
Introduction to Common Object File Format
2-9
How the Assembler Handles Sections
2.3.6
An Example That Uses Sections Directives
Example 2–1 shows how you can build COFF sections incrementally, using
the sections directives to swap back and forth between the different sections.
You can use sections directives to begin assembling into a section for the first
time, or to continue assembling into a section that already contains code. In
the latter case, the assembler simply appends the new code to the code that
is already in the section.
The format in Example 2–1 is a listing file. Example 2–1 shows how the SPCs
are modified during assembly. A line in a listing file has four fields:
2-10
Field 1
contains the source code line counter.
Field 2
contains the section program counter.
Field 3
contains the object code.
Field 4
contains the original source statement.
How the Assembler Handles Sections
Example 2–1. Using Sections Directives
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
000000
000000 0011
000001 0022
000002 0033
000000
000003 0123
000000
000000
000001
000002
21 000003
000004
22
23
24
25 000004
26 000004
000005
000006
27
28
29
30 000000
31 000001
32
33
34
35 000005
36 000005
37 000006
000007
38 000008
000009
39
40
41
42 000000
43 000000
44 000001
Field 1
Field 2
100f
f010
0001
f842
0001’
00aa
00bb
00cc
110a
f166
000a
f868
0006’
0011
0033
Field 3
************************************************
** Assemble an initialized table into .data. **
************************************************
.data
coeff
.word
011h,022h,033h
************************************************
**
Reserve space in .bss for a variable.
**
************************************************
.bss
buffer,10
************************************************
**
Still in .data.
**
************************************************
ptr
.word
0123h
************************************************
**
Assemble code into the .text section.
**
************************************************
.text
add:
LD
0Fh,A
aloop:
SUB
#1,A
BC
aloop,AGEQ
************************************************
**
Another initialized table into .data.
**
************************************************
.data
ivals
.word
0AAh, 0BBh, 0CCh
************************************************
** Define another section for more variables. **
************************************************
var2
.usect
”newvars”, 1
inbuf
.usect
”newvars”, 7
************************************************
**
Assemble more code into .text.
**
************************************************
.text
mpy:
LD
0Ah,B
mloop:
MPY
#0Ah,B
BC
mloop,BNOV
************************************************
** Define a named section for int. vectors. **
************************************************
.sect
”vectors”
.word
011h, 033h
Field 4
Introduction to Common Object File Format
2-11
How the Assembler Handles Sections
As Figure 2–2 shows, the file in Example 2–1 creates five sections:
.text
contains ten 16-bit words of object code.
.data
contains seven words of object code.
vectors
is a named section created with the .sect directive; it contains
two words of initialized data.
.bss
reserves 10 words in memory.
newvars
is a named section created with the .usect directive; it reserves
eight words in memory.
The second column shows the object code that is assembled into these
sections; the first column shows the line numbers of the source statements
that generated the object code.
Figure 2–2. Object Code Generated by the File in Example 2–1
Line Numbers
19
20
20
21
21
36
37
37
38
38
6
6
6
14
26
26
26
2-12
Object Code
100f
f010
0001
f842
0001’
110a
f166
000a
f868
0006’
Section
.text
0011
0022
0033
0123
00aa
00bb
00cc
.data
43
44
0011
0033
No data—
10 words
reserved
.bss
10
30
31
No data—
eight words
reserved
newvars
vectors
How the Linker Handles Sections
2.4
How the Linker Handles Sections
The linker has two main functions related to sections. First, the linker uses the
sections in COFF object files as building blocks; it combines input sections
(when more than one file is being linked) to create output sections in an executable COFF output module. Second, the linker chooses memory addresses for
the output sections.
Two linker directives support these functions:
- The MEMORY directive allows you to define the memory map of a target
system. You can name portions of memory and specify their starting
addresses and their lengths.
- The SECTIONS directive tells the linker how to combine input sections
into output sections and where to place these output sections in memory.
Subsections allow you to manipulate sections with greater precision. You can
specify subsections with the linker’s SECTIONS directive. If you do not specify
a subsection explicitly, then the subsection is combined with the other sections
with the same base section name.
It is not always necessary to use linker directives. If you don’t use them, the
linker uses the target processor’s default allocation algorithm described in
Section 7.12, Default Allocation Algorithm, on page 7-58. When you do use
linker directives, you must specify them in a linker command file.
Refer to the following sections for more information about linker command files
and linker directives:
Section Number
Section Name
Page
7.5
Linker Command Files
7-21
7.7
The MEMORY Directive
7-27
7.8
The SECTIONS Directive
7-32
7.12
Default Allocation Algorithm
7-58
Introduction to Common Object File Format
2-13
How the Linker Handles Sections
2.4.1
Default Memory Allocation
Figure 2–3 illustrates the process of linking two files.
Figure 2–3. Combining Input Sections to Form an Executable Object Module
ÏÏÏÏÏÏ
ÏÏÏÏÏÏ
Program Memory
file1.obj
.text
file 1
.text
.data
file 2
.text
.bss
file 1
.data
table_1
(initialized
named section)
file 2
.data
u_vars
(uninitialized
named section)
file 1
table_1
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
Data Memory
unconfigured
file1
.bss
file2
.bss
file1
U_vars
file2
U_vars
file2.obj
file 2
table_1
.text
file2
FFT
.data
.bss
table_1
(initialized
named section)
unused
ÏÏÏÏÏ
ÏÏÏÏÏ
ÏÏÏÏÏ
unconfigured
unused
u_vars
(uninitialized
named section)
FFT
(initialized
named section)
In Figure 2–3, file1.obj and file2.obj have been assembled to be used as linker
input. Each contains the .text, .data, and .bss default sections; in addition,
each contains named sections. The executable output module shows the
combined sections. The linker combines file1.text with file2.text to form one
.text section, then combines the .data sections, then the .bss sections, and
finally places the named sections at the end. The memory map shows how the
sections are put into memory; by default, the linker begins at address 080h and
places the sections one after the other as shown.
2-14
How the Linker Handles Sections
2.4.2
Placing Sections in the Memory Map
Figure 2–3 illustrates the linker’s default methods for combining sections.
Sometimes you may not want to use the default setup. For example, you may
not want all of the .text sections to be combined into a single .text section. Or
you may want a named section placed where the .data section would normally
be allocated. Most memory maps contain various types of memory (RAM,
ROM, EPROM, etc.) in varying amounts; you may want to place a section in
a specific type of memory.
For further explanation of section placement within the memory map, see
Section 7.7, The MEMORY Directive, on page 7-27 and Section 7.8, The
SECTIONS Directive, on page 7-32.
Introduction to Common Object File Format
2-15
Relocation
2.5 Relocation
The assembler treats each section as if it began at address 0. All relocatable
symbols (labels) are relative to address 0 in their sections. Of course, all
sections can’t actually begin at address 0 in memory, so the linker relocates
sections by:
- Allocating them into the memory map so that they begin at the appropriate
address
- Adjusting symbol values to correspond to the new section addresses
- Adjusting references to relocated symbols to reflect the adjusted symbol
values
The linker uses relocation entries to adjust references to symbol values. The
assembler creates a relocation entry each time a relocatable symbol is referenced. The linker then uses these entries to patch the references after the
symbols are relocated. Example 2–2 contains a code segment for the C54x
that generates relocation entries.
Example 2–2. Code That Generates Relocation Entries
(a) Mnemonic example
1
2
3 000000
4 000000 F073
000001 0006’
5 000002 F073
000003 0000!
6 000004 F020
000005 0000!
5 000006 F7E0
.ref
X
.ref
Z
.text
B Y
; Generates a Relocation Entry
B
Z
; Generates a Relocation Entry
LD #X, A
; Generates a Relocation Entry
Y: RESET
(b) Algebraic example
1
2
3 000000
4 000000 F073
000001 0006’
5 000002 F073
000003 0000!
6 000004 F020
000005 0000!
7 000006 F7E0
2-16
.ref
X
.ref
Z
.text
goto
Y
; Generates a Relocation Entry
B
; Generates a Relocation Entry
Z
A = #X
Y: reset
; Generates a Relocation Entry
Relocation
In Example 2–2, both symbols X, Y, and Z are relocatable. Y is defined in the
.text section of this module; X and Z are defined in another module. When the
code is assembled, X and Z have a value of 0 (the assembler assumes all undefined external symbols have values of 0), and Y has a value of 6 (relative
to address 0 in the .text section). The assembler generates relocation entries
for X, Y, and Z. The references to X and Z are external references (indicated
by the ! character in the listing). The reference to Y is to an internally defined
relocatable symbol (indicated by the ’ character in the listing).
After the code is linked, suppose that X is relocated to address 7100h.
Suppose also that the .text section is relocated to begin at address 7200h; Y
now has a relocated value of 7204h. The linker uses the two relocation entries
to patch the two references in the object code:
f073 B Y
0004’
f020 LD #X,A
0000!
becomes
becomes
f073
7204’
f020
7100!
Each section in a COFF object file has a table of relocation entries. The table
contains one relocation entry for each relocatable reference in the section.
The linker usually removes relocation entries after it uses them. This prevents
the output file from being relocated again (if it is relinked or when it is loaded).
A file that contains no relocation entries is an absolute file (all its addresses
are absolute addresses). If you want the linker to retain relocation entries, invoke the linker with the –r option.
2.5.1
Relocation Issues
The linker may warn you about certain relocation issues.
In an assembly program, if an instruction with a PC-relative field contains a
reference to a symbol, label, or address, the relative displacement is expected
to fit in the instruction’s field. If the displacement doesn’t fit into the field (because the referenced item’s location is too far away), the linker issues an error.
For example, the linker will issue an error message when an instruction with
an 8-bit, unsigned, PC-relative field references a symbol located 256 or more
bytes away from the instruction.
Introduction to Common Object File Format
2-17
Relocation
Similarly, if an instruction with an absolute address field contains a reference
to a symbol, label, or address, the referenced item is expected to be located
at an address that will fit in the instruction’s field. For example, if a function is
linked at 0x10000, its address cannot be encoded into a 16-bit instruction field.
In both cases, the linker truncates the high bits of the value.
To deal with these issues, examine your link map and linker command file. You
may be able to rearrange output sections to put referenced symbols closer to
the referencing instruction.
Alternatively, consider using a different assembly instruction with a wider field.
Or, if you only need the lower bits of a symbol, use a mask expression to mask
off the lower bits.
2-18
Runtime Relocation
2.6
Runtime Relocation
At times, you may want to load code into one area of memory and run it in
another. For example, you may have performance-critical code in a ROMbased system. The code must be loaded into ROM, but it would run faster in
RAM.
The linker provides a simple way to handle this. Using the SECTIONS
directive, you can optionally direct the linker to allocate a section twice: first
to set its load address, and again to set its run address. Use the load keyword
for the load address and the run keyword for the run address.
The load address determines where a loader will place the raw data for the
section. Any references to the section (such as labels in it) refer to its run
address. The application must copy the section from its load address to its run
address; this does not happen automatically simply because you specify a
separate run address. For an example that illustrates how to move a block of
code at runtime, see Example 7–6 on page 7-46.
If you provide only one allocation (either load or run) for a section, the section
is allocated only once and will load and run at the same address. If you provide
both allocations, the section is actually allocated as if it were two different
sections of the same size.
Uninitialized sections (such as .bss) are not loaded, so the only significant
address is the run address. The linker allocates uninitialized sections only
once: if you specify both run and load addresses, the linker warns you and
ignores the load address.
For a complete description of runtime relocation, see Section 7.9, Specifying
a Section’s Runtime Address, on page 7-44.
Introduction to Common Object File Format
2-19
Loading a Program
2.7 Loading a Program
The linker produces executable COFF object modules. An executable object
file has the same COFF format as object files that are used as linker input; the
sections in an executable object file, however, are combined and relocated so
that they can be loaded directly into target memory.
Several methods can be used for loading a program, depending on the execution environment. Two common situations are described below.
- The TMS320C54x debugging tools, including the software simulator,
XDS51x emulator, and software development system, have built-in loaders. Each of these tools contains a LOAD command that invokes a loader;
the loader reads the executable file and copies the program into target
memory.
- You can use the hex conversion utility (hex500, which is shipped as part
of the assembly language package) to convert the executable COFF
object module into one of several object file formats. You can then use the
converted file with an EPROM programmer to burn the program into an
EPROM.
2-20
Symbols in a COFF File
2.8
Symbols in a COFF File
A COFF file contains a symbol table that stores information about symbols in
the program. The linker uses this table when it performs relocation. Debugging
tools can also use the symbol table to provide symbolic debugging.
2.8.1
External Symbols
External symbols are symbols that are defined in one module and referenced
in another module. You can use the .def, .ref, or .global directives to identify
symbols as external:
.def
Defined in the current module and used in another module
.ref
Referenced in the current module, but defined in another
module
.global
May be either of the above
The following code segment illustrates these definitions.
x:
ADD
B
.def
.ref
#56h, A
y
x
y
;
;
;
;
Define x
Reference y
DEF of x
REF of y
The .def definition of x says that it is an external symbol defined in this module
and that other modules can reference x. The .ref definition of y says that it is
an undefined symbol that is defined in another module.
The assembler places both x and y in the object file’s symbol table. When the
file is linked with other object files, the entry for x defines unresolved
references to x from other files. The entry for y causes the linker to look
through the symbol tables of other files for y’s definition.
The linker must match all references with corresponding definitions. If the
linker cannot find a symbol’s definition, it prints an error message about the
unresolved reference. This type of error prevents the linker from creating an
executable object module.
Introduction to Common Object File Format
2-21
Symbols in a COFF File
2.8.2
The Symbol Table
The assembler always generates an entry in the symbol table when it encounters an external symbol (both definitions and references). The assembler also
creates special symbols that point to the beginning of each section; the linker
uses these symbols to resolve the address of and references symbols that are
defined in the section.
The assembler does not usually create symbol table entries for any symbols
other than those described above, because the linker does not use them. For
example, labels are not included in the symbol table unless they are declared
with .global. For symbolic debugging purposes, it is sometimes useful to have
entries in the symbol table for each symbol in a program. To accomplish this,
invoke the assembler with the –s option.
2-22
Chapter 3
Assembler Description
The assembler translates assembly language source files into machine
language object files. These files are in common object file format (COFF),
which is discussed in Chapter 2, Introduction to Common Object File Format,
and Appendix A, Common Object File Format. Source files can contain the
following assembly language elements:
Assembler directives
described in Chapter 4
Macro directives
described in Chapter 5
Assembly language instructions
described in the TMS320C54xt
Instruction Set Reference Guides
Topic
Page
3.1
Assembler Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3.2
Assembler Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3.3
Invoking the Assembler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3.4
Naming Alternate Files and Directories for Assembler Input . . . . . . . 3-8
3.5
Source Statement Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.6
Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.7
Character Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18
3.8
Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.9
Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-25
3.10 Built-In Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-30
3.11 Loading Values into Extended Program Memory . . . . . . . . . . . . . . . . 3-32
3.12 Source Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33
3.13 Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-37
Assembler Description
3-1
Assembler Overview
3.1 Assembler Overview
This two-pass assembler does the following:
- Processes the source statements in a text file to produce a relocatable
C54x object file
- Produces a source listing (if requested) and provides you with control over
this listing
- Allows you to segment your code into sections and maintain an SPC
(section program counter) for each section of object code
- Defines and references global symbols and appends a cross-reference
listing to the source listing (if requested)
- Assembles conditional blocks
- Supports macros, allowing you to define macros inline or in a library
3-2
Assembler Development Flow
3.2 Assembler Development Flow
Figure 3–1 illustrates the assembler’s role in the assembly language development flow. The assembler accepts assembly language source files as input,
whether created by the assembler itself or by the C/C++ compiler.
Figure 3–1. Assembler Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
Assembler
source
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Translator
utility
Absolute lister
Cross-reference
lister
C54x
Assembler Description
3-3
Invoking the Assembler
3.3 Invoking the Assembler
To invoke the assembler, enter the following:
asm500 [input file [object file [listing file ] ] ] [–options ]
asm500
is the command that invokes the assembler.
input file
names the assembly language source file. If you do not supply
an extension, the assembler uses the default extension .asm,
unless the –f assembler option is used. If you do not supply an
input filename, the assembler prompts you for one.
The source file can contain mnemonic or algebraic instructions,
but not both. The default instruction set is mnemonic. To specify
the algebraic instruction set, use the –mg option.
object file
names the C54x object file that the assembler creates. If you do
not supply an extension, the assembler uses .obj as a default.
If you do not supply an object file, the assembler creates a file
that uses the input filename with the .obj extension.
listing file
names the optional listing file that the assembler can create.
- If you do not supply a listing file, the assembler does not
create one unless you use the –l (lowercase L) option or the
–x option. In this case, the assembler uses the input filename with a .lst extension and places the listing file in the input file directory.
- If you supply a listing file but do not supply an extension, the
assembler uses .lst as the default extension.
options
identifies the assembler options that you want to use. Options
are not case-sensitive and can appear anywhere on the command line, following the assembler name. Precede each option
with a hyphen. Single-letter options without parameters can be
combined: for example, –lc is equivalent to –l –c. Options that
have parameters, such as –i, must be specified separately.
–@
3-4
–@filename appends the contents of filename to
the command line. You can use this option to avoid
the limitations on command line length imposed by
the host operating system. Within a command file,
filenames or option parameters containing embedded spaces or hyphens must be surrounded
with quotation marks.
For example: “this-file.asm”
Invoking the Assembler
–a
creates an absolute listing. When you use –a, the
assembler does not produce an object file. The –a
option is used in conjunction with the absolute
lister.
–c
makes case insignificant in the assembly
language files. For example, –c will make the symbols ABC and abc equivalent. If you do not use this
option, case is significant (default). Case significance is enforced primarily with symbol names,
not with mnemonics and register names.
–d
–dname [=value] sets the name symbol. This is
equivalent to inserting name .set value at the
beginning of the assembly file. If value is omitted,
the symbol is set to 1. For more information, see
subsection 3.8.3, Defining Symbolic Constants
(–d Option), on page 3-20.
–f
suppresses the assembler’s default behavior of
adding a .asm extension to a source file name that
does not already include an extension.
–g
enables assembler source debugging in the
source debugger. Line information is output to the
COFF file for every line of source in the assembly
language source file. Note that you cannot use the
–g option on assembly code that already contains
.line directives (i.e., code that was generated by
the C/C++ compiler run with –g).
–h
–help
–?
any of these options displays a listing of the
available assembler options.
–hc
–hcfilename tells the assembler to copy the specified file for the assembly module. The file is
inserted before source file statements. The copied file appears in the assembly listing files.
–hi
–hifilename tells the assembler to include the
specified file for the assembly module. The file is
included before source file statements. The included file does not appear in the assembly listing files.
Assembler Description
3-5
Invoking the Assembler
3-6
–i
specifies a directory where the assembler can find
files named by the .copy, .include, or .mlib directives. The format of the –i option is –ipathname.
For more information, see subsection 3.4.1, –i Assembler Option, on page 3-8.
–l
(lowercase L) produces a listing file.
–mf
specifies that assembly calls use extended addressing.
–mg
specifies that the source file contains algebraic
instructions.
–q
(quiet) suppresses the banner and all progress
information.
–r
–r[num] suppresses the assembler remark identified by num. A remark is an informational
assembler message that is less severe than a
warning. If you do not specify a value for num, all
remarks will be suppressed.
–pw
generates warnings for some assembly code pipeline conflicts. The assembler cannot detect all
pipeline conflicts. Pipeline conflicts are detected in
straight-line code only. Upon detection of a pipeline conflict, the assembler will print a warning, and
report the latency slots (words) that need to be
filled (by NOPs or other instructions) in order to resolve the conflict.
–s
puts all defined symbols in the object file’s symbol
table. The assembler usually puts only global symbols into the symbol table. When you use –s, symbols defined as labels or as assembly-time constants are also placed in the table.
–u
–uname undefines the predefined constant name,
which overrides any –d options for the specified
constant.
Invoking the Assembler
–v
–vvalue determines the processor for which instructions are built. Use one of the following for
value: 541, 542, 543, 545, 545lp, 546lp, 548,
549.
–x
produces a cross-reference table and appends it
to the end of the listing file; also adds cross-reference information to the object file for use by the
cross-reference utility. If you do not request a listing file, the assembler creates one anyway.
Assembler Description
3-7
Naming Alternate Files and Directories for Assembler Input
3.4 Naming Alternate Files and Directories for Assembler Input
The .copy, .include, and .mlib directives tell the assembler to use code from
external files. The .copy and .include directives tell the assembler to read
source statements from another file, and the .mlib directive names a library
that contains macro functions. Chapter 4, Assembler Directives, contains
examples of the .copy, .include, and .mlib directives. The syntax for these
directives is:
.copy ”filename”
.include ”filename”
.mlib ”filename”
The filename names a copy/include file that the assembler reads statements
from or a macro library that contains macro definitions. The filename may be
a complete pathname, a partial pathname, or a filename with no path information. The assembler searches for the file in the following order:
1) The directory that contains the current source file. The current source file
is the file being assembled when the .copy, .include, or .mlib directive is
encountered.
2) Any directories named with the –i assembler option
3) Any directories set with the environment variables C54X_A_DIR and
A_DIR
4) Any directories set with the environment variables C54X_C_DIR and
C_DIR
You can augment the assembler’s directory search algorithm by using the –i
assembler option or the C54X_A_DIR and A_DIR environment variables.
3.4.1
Using the –i Assembler Option
The –i assembler option names an alternate directory that contains copy/
include files or macro libraries. The format of the –i option is as follows:
asm500 –ipathname
source filename
Each –i option names one pathname. There is no limit to the number of paths
that you can specify. In assembly source, you can use the .copy, .include, or
.mlib directive without specifying path information. If the assembler doesn’t
3-8
Naming Alternate Files and Directories for Assembler Input
find the file in the directory that contains the current source file, it searches the
paths designated by the –i options.
For example, assume that a file called source.asm is in the current directory;
source.asm contains the following directive statement:
.copy ”copy.asm”
Assume that the file is stored in the following directory:
Windows
c:\tools\files\copy.asm
UNIX
/tools/files/copy.asm
Operating System
Enter
Windows
asm500 –ic:\tools\files source.asm
UNIX
asm500 –i/tools/files source.asm
The assembler first searches for copy.asm in the current directory because
source.asm is in the current directory. Then the assembler searches in the
directory named with the –i option.
3.4.2
Using Environment Variables (C54X_A_DIR and A_DIR)
An environment variable is a system symbol that you define and assign a
string to. The assembler uses the environment variables C54X_A_DIR and
A_DIR to name alternate directories that contain copy/include files or macro
libraries.
The assembler looks for the C54X_A_DIR environment variable first and then
reads and processes it. If it does not find this variable, it reads the A_DIR environment variable and processes it. If both variables are set, the settings of the
processor-specific variable are used. The processor-specific variable is useful
when you are using Texas Instruments tools for different processors at the
same time.
If the assembler doesn’t find C54X_A_DIR and/or A_DIR, it will then search
for C54X_C_DIR and C_DIR.
The command for assigning the environment variable is as follows:
Operating System
Enter
Windows
set A_DIR= pathname;another pathname ...
UNIX
setenv A_DIR ”pathname;another pathname ...”
Assembler Description
3-9
Naming Alternate Files and Directories for Assembler Input
The pathnames are directories that contain copy/include files or macro
libraries. You can separate the pathnames with a semicolon or with blanks. In
assembly source, you can use the .copy, .include, or .mlib directive without
specifying path information. If the assembler doesn’t find the file in the directory that contains the current source file or in directories named by –i, it
searches the paths named by the environment variable.
For example, assume that a file called source.asm contains these statements:
.copy ”copy1.asm”
.copy ”copy2.asm”
Assume that the files are stored in the following directories:
Windows
UNIX
c:\tools\files\copy1.asm
c:\dsys\copy2.asm
/tools/files/copy1.asm
/dsys/copy2.asm
You could set up the search path with the commands shown in the following
table:
Operating System
Enter
Windows
set A_DIR=c:\dsys
asm500 –ic:\tools\files source.asm
UNIX
setenv A_DIR ”/dsys”
asm500 –i/tools/files source.asm
The assembler first searches for copy1.asm and copy2.asm in the current
directory because source.asm is in the current directory. Then the assembler
searches in the directory named with the –i option and finds copy1.asm.
Finally, the assembler searches the directory named with A_DIR and finds
copy2.asm.
Note that the environment variable remains set until you reboot the system or
reset the variable by entering one of these commands:
3-10
Operating System
Enter
Windows
set A_DIR=
UNIX
unsetenv A_DIR
Source Statement Format
3.5 Source Statement Format
TMS320C54x assembly language source programs consist of source statements that can contain assembler directives, assembly language instructions,
macro directives, and comments. Source statement lines can be as long as
the source file format allows.
Example source statements are shown below.
(a) Mnemonic instructions
SYM1
Begin:
.set
LD
.word
2
#SYM1, AR1
016h
; Symbol SYM1 = 2.
; Load AR1 with 2.
; Initialize word (016h)
(b) Algebraic instructions
SYM1
Begin:
3.5.1
.set
2
AR1 = #SYM1
.data
.byte
016h
; Symbol SYM1 = 2.
; Load AR1 with 2.
; Initialize word (016h)
Source Statement Syntax
A source statement can contain four ordered fields. The general syntax for
source statements is as follows:
Mnemonic syntax:
[label ] [:]
mnemonic
[operand list ]
[;comment ]
Algebraic syntax:
[label ] [:]
instruction
[;comment ]
Follow these guidelines:
- All statements must begin with a label, a blank, an asterisk, or a semico-
lon.
- A statement containing an assembler directive must be specified entirely
on one line.
- Labels are optional; if used, they must begin in column 1.
- One or more blanks must separate each field. Tab characters are
equivalent to blanks.
- Comments are optional. Comments that begin in column 1 can begin with
an asterisk or a semicolon (* or ;), but comments that begin in any other
column must begin with a semicolon.
Assembler Description
3-11
Source Statement Format
3.5.2
Label Field
Labels are optional for all assembly language instructions and for most (but
not all) assembler directives. When used, a label must begin in column 1 of
a source statement. A label can contain up to 32 alphanumeric characters
(A –Z, a–z, 0–9, _, and $). Labels are case sensitive, and the first character
cannot be a number. A label can be followed by a colon (:); the colon is not
treated as part of the label name. If you don’t use a label, the first character
position must contain a blank, a semicolon, or an asterisk.
When you use a label, its value is the current value of the section program
counter (the label points to the statement it’s associated with). If, for example,
you use the .word directive to initialize several words, a label would point to
the first word. In the following example, the label Start has the value 40h.
.
.
.
.
.
.
9 000000
10 000040 000A
000041 0003
000042 0007
.
.
.
.
.
.
; Assume some other code was assembled.
Start: .word 0Ah,3,7
A label on a line by itself is a valid statement. The label assigns the current
value of the section program counter to the label; this is equivalent to the following directive statement:
label .set $
; $ provides the current value of the SPC.
When a label appears on a line by itself, it is assigned to the address of the
instruction on the next line (the SPC is not incremented):
3
4
3.5.3
000043
000043 0003
Here:
.word 3
Mnemonic Instruction Fields
In mnemonic assembly, the label field is followed by the mnemonic and operand fields. These fields are described in the next two sections.
3.5.3.1
Mnemonic Field
The mnemonic field follows the label field. The mnemonic field must not start
in column 1; if it does, it will be interpreted as a label. The mnemonic field can
contain one of the following opcodes:
-
3-12
Machine-instruction mnemonic (such as ABS, MPYU, STH)
Assembler directive (such as .data, .list, .set)
Macro directive (such as .macro, .var, .mexit)
Macro call
Source Statement Format
3.5.3.2
Operand Field
The operand field is a list of operands that follow the mnemonic field. An
operand can be a constant (see Section 3.6, Constants, on page 3-15), a
symbol (see Section 3.8, Symbols, on page 3-19), or a combination of constants and symbols in an expression (see Section 3.9, Expressions, on page
3-25). You must separate operands with commas.
- Operand Prefixes for Instructions
The assembler allows you to specify that a constant, symbol, or expression should be used as an address, an immediate value, or an indirect
value. The following rules apply to the operands of instructions.
J
# prefix — the operand is an immediate value. If you use the # sign
as a prefix, the assembler treats the operand as an immediate value.
This is true even when the operand is a register or an address; the
assembler treats the address as a value instead of using the contents
of the address. This is an example of an instruction that uses an operand with the # prefix:
Label:
ADD #123, B
The operand #123 is an immediate value. The assembler adds 123
(decimal) to the contents of the specified accumulator.
J
* prefix — the operand is an indirect address. If you use the * sign
as a prefix, the assembler treats the operand as an indirect address;
that is, it uses the contents of the operand as an address. This is an
example of an instruction that uses an operand with the * prefix:
Label:
LD *AR4,A
The operand *AR4 specifies an indirect address. The assembler goes
to the address specified by the contents of register AR4 and then
moves the contents of that location to the specified accumulator.
- Immediate Value for Directives
The immediate value mode is primarily used with instructions. In some
cases, it can also be used with the operands of directives.
It is not usually necessary to use the immediate value mode for directives.
Compare the following statements:
ADD #10, A
.byte 10
In the first statement, the immediate value mode is necessary to tell the
assembler to add the value 10 to accumulator A. In the second statement,
however, immediate value is not used; the assembler expects the operand
to be a value and initializes a byte with the value 10.
Assembler Description
3-13
Source Statement Format
3.5.4
Algebraic Instruction Field
In algebraic assembly, the instruction field is a combination of the mnemonic
and operand fields used in mnemonic syntax. You generally do not have a
mnemonic followed by operands. Rather, the operands are part of the overall
statement. The following items describe how to use the instruction field for algebraic syntax:
- Generally, operands are not separated by commas. Some algebraic
instructions, however, consist of a mnemonic and operands. For
algebraic statements of this type, commas are used to separate operands. For example, lms(Xmem, Ymem).
- Expressions that have more than one term that is used as a single oper-
and must be delimited with parentheses. This rule does not apply to statements using a function call format, since they are already set off with
parentheses. For example, consider A = B & #(1 << sym) << 5. The
expression 1 << sym is used as a single operand and is therefore set off
with parentheses.
- All register names are reserved.
- For algebraic instructions that consist of a mnemonic and operands, the
mnemonic word is reserved.
3.5.5
Comment Field
A comment can begin in any column and extends to the end of the source line.
A comment can contain any ASCII character, including blanks. Comments are
printed in the assembly source listing, but they do not affect the assembly.
A source statement that contains only a comment is valid. If it begins in column
1, it can start with a semicolon (;) or asterisk (*). Comments that begin anywhere else on the line must begin with a semicolon. The asterisk identifies a
comment only if it appears in column 1.
3-14
Constants
3.6 Constants
The assembler supports six types of constants:
-
Binary integer
Octal integer
Decimal integer
Hexadecimal integer
Character
Assembly time
Floating-point
The assembler maintains each constant internally as a 32-bit quantity.
Constants are not sign-extended. For example, the constant 0FFH is equal
to 00FF (base 16) or 255 (base 10); it does not equal –1.
3.6.1
Binary Integers
A binary integer constant is a string of up to 16 binary digits (0s and 1s)
followed by the suffix B (or b). If fewer than 16 digits are specified, the
assembler right justifies the value and zero fills the unspecified bits. These are
examples of valid binary constants:
3.6.2
00000000B
Constant equal to 010 or 016
0100000b
Constant equal to 3210 or 2016
01b
Constant equal to 110 or 116
11111000B
Constant equal to 24810 or 0F816
Octal Integers
An octal integer constant is a string of up to 6 octal digits (0 through 7) prefixed
with a 0 (zero) or suffixed with Q or q. These are examples of valid octal
constants:
10Q
Constant equal to 810 or 816
100000Q
Constant equal to 32 76810 or 8 00016
226q
Constant equal to 15010 or 9616
Or, you can use C notation for octal constants:
010
Constant equal to 810 or 816
0100000
Constant equal to 32 76810 or 8 00016
0226
Constant equal to 15010 or 9616
Assembler Description
3-15
Constants
3.6.3
Decimal Integers
A decimal integer constant is a string of decimal digits, ranging from –32 768
to 65 535. These are examples of valid decimal constants:
3.6.4
1000
Constant equal to 100010 or 3E816
–32768
Constant equal to –32 76810 or 8 00016
25
Constant equal to 2510 or 1916
Hexadecimal Integers
A hexadecimal integer constant is a string of up to four hexadecimal digits
followed by the suffix H (or h). Hexadecimal digits include the decimal values
0–9 and the letters A–F and a–f. A hexadecimal constant must begin with a
decimal value (0–9). If fewer than four hexadecimal digits are specified, the
assembler right-justifies the bits. These are examples of valid hexadecimal
constants:
78h
Constant equal to 12010 or 007816
0FH
Constant equal to 1510 or 000F16
37ACh
Constant equal to 14 25210 or 37AC16
Or, you can use C notation for hexadecimal constants:
3.6.5
0x78
Constant equal to 12010 or 007816
0x0F
Constant equal to 1510 or 000F16
0x37AC
Constant equal to 14 25210 or 37AC16
Character Constants
A character constant is a string of one or two characters enclosed in single
quotes. The characters are represented internally as 8-bit ASCII characters.
Two consecutive single quotes are required to represent each single quote
that is part of a character constant. A character constant consisting only of two
single quotes is valid and is assigned the value 0. If only one character is specified, the assembler right-justifies the bits. These are examples of valid character constants:
3-16
’a’
Represented internally as 6116
’C’
Represented internally as 4316
’’’D’
Represented internally as 2 74416
Constants
Note the difference between character constants and character strings
(Section 3.7, Character Strings, on page 3-18, discusses character strings).
A character constant represents a single integer value; a string is a list of characters.
3.6.6
Floating-Point Constants
A floating-point constant is a string of decimal digits, followed by an optional
decimal point, fractional portion, and exponent portion. The syntax for a
floating-point number is:
[ +|– ] [ nnn ] . [ nnn [ E|e [ +|– ] nnn ] ]
Replace nnn with a string of decimal digits. You can precede nnn with a + or
a –. You must specify a decimal point. For example, 3.e5 is valid, but 3e5 is
not valid. The exponent indicates a power of 10. These are examples of valid
constants:
3.0
3.14
.3
–0.314e13
+314.59e–2
Assembler Description
3-17
Character
CharacterStrings
Strings
3.7 Character Strings
A character string is a string of characters enclosed in double quotes. Double
quotes that are part of character strings are represented by two consecutive
double quotes. The maximum length of a string varies and is defined for each
directive that requires a character string. Characters are represented
internally as 8-bit ASCII characters.
These are examples of valid character strings:
”sample program”
defines the 14-character string sample program.
”PLAN ””C”””
defines the 8-character string PLAN ”C”.
Character strings are used for the following:
-
3-18
Filenames, as in .copy ”filename”
Section names, as in .sect ”section name”
Data initialization directives, as in .byte ”charstring”
Operands of .string directives
Symbols
3.8 Symbols
Symbols are used as labels, constants, and substitution symbols. A symbol
name is a string of up to 200 alphanumeric characters (A–Z, a–z, 0–9, $,
and _ ). The first character in a symbol cannot be a number, and symbols cannot contain embedded blanks. The symbols you define are case sensitive; for
example, the assembler recognizes ABC, Abc, and abc as three unique
symbols. You can override case sensitivity with the –c assembler option. A
symbol is valid only during the assembly in which it is defined, unless you use
the .global directive to declare it as an external symbol.
3.8.1
Labels
Symbols used as labels become symbolic addresses associated with locations in the program. Labels used locally within a file must be unique.
Mnemonic opcodes and assembler directive names (without the ”.” prefix) are
valid label names.
Labels can also be used as the operands of .global, .ref, .def, or .bss directives; for example:
label2
3.8.2
.global
label1
NOP
ADD
B
label1,B
label2
Symbolic Constants
Symbols can be set to constant values. By using constants, you can equate
meaningful names with constant values. The .set and .struct/.tag/.endstruct
directives enable you to set constants to symbolic names. Symbolic constants
cannot be redefined. The following example shows how these directives can
be used:
K
maxbuf
value
delta
.set
1024
.set
2*K
.set . 0
.set . 1
item
;constant definitions
.struct
.int
value
.int
delta
i_len .endstruct
;item structure definition
;constant offsets value = 0
;constant offsets delta = 1
array
;array declaration
.tag
.bss
item
array, i_len*K
The assembler also has several predefined symbolic constants; these are
discussed in the next section.
Assembler Description
3-19
Symbols
3.8.3
Defining Symbolic Constants (–d Option)
The –d option equates a constant value with a symbol. The symbol can then
be used in place of a value in assembly source. The format of the –d option
is as follows:
asm500 –dname=[value ]
The name is the name of the symbol you want to define. The value is the value
you want to assign to the symbol. If the value is omitted, the symbol is set to 1.
Within assembler source, you may test the symbol with the following directives:
Type of Test
Directive Usage
Existence
.if $isdefed(”name”)
Nonexistence
.if $isdefed(”name”) = 0
Equal to value
.if name = value
Not equal to value
.if name != value
Note that the argument to the $isdefed built-in function must be enclosed in
quotes. The quotes cause the argument to be interpreted literally rather than
as a substitution symbol.
3.8.4
Predefined Symbolic Constants
The assembler has several predefined symbols, including the following:
- $, the dollar sign character, represents the current value of the section
program counter (SPC).
- Register symbols, including AR0 – AR7
- Memory-mapped registers are set up as symbols by the assembler.
3-20
Symbols
3.8.5
Substitution Symbols
Symbols can be assigned a string value (variable). This enables you to alias
character strings by equating them to symbolic names. Symbols that
represent character strings are called substitution symbols. When the
assembler encounters a substitution symbol, its string value is substituted for
the symbol name. Unlike symbolic constants, substitution symbols can be
redefined.
A string can be assigned to a substitution symbol anywhere within a program;
for example:
.asg
.asg
.asg
”errct”,
”*+”,
”*–”,
AR2
INC
DEC
;register 2
;indirect auto-increment
;indirect auto-decrement
When you are using macros, substitution symbols are important because
macro parameters are actually substitution symbols that are assigned a macro
argument. The following code shows how substitution symbols are used in
macros:
add2
.macro
ADDRA,ADDRB ;add2 macro definition
LD ADDRA, A
ADD ADDRB, A
STL A, ADDRB
.endm
; add2 invocation
add2 LOC1, LOC2
;
;
;
;
;add ”LOC1” argument to a
;second argument ”LOC2”.
instructions for expanded macro:
LD LOC1, A
ADD LOC2, A
STL A, LOC2
For more information about macros, see Chapter 5, Macro Language.
Assembler Description
3-21
Symbols
3.8.6
Local Labels
Local labels are special labels whose scope and effect are temporary. A local
label can be defined in two ways:
- $n, where n is a decimal digit in the range of 0–9. For example, $4 and $1
are valid local labels.
- name?, where name is any legal symbol name as described above. The
assembler replaces the question mark with a period followed by a unique
number. When the source code is expanded, you will not see the unique
number in the listing file. Your label appears with the question mark as it
did in the macro definition. You cannot declare this label as global.
Normal labels must be unique (they can be declared only once), and they can
be used as constants in the operand field. Local labels, however, can be
undefined and defined again or automatically generated. Local labels cannot
be defined by directives.
A local label can be undefined, or reset, in one of four ways:
-
By using the .newblock directive
By changing sections (using a .sect, .text, or .data directive)
By entering an include file (specifying the .include or .copy directive)
By leaving an include file (reaching the end of an included file)
Example 3–1 demonstrates the $n form of local labels. This example assumes
that symbols ADDRA, ADDRB, ADDRC have been defined previously.
Example 3–1. $n Local Labels
(a) Code that uses a local label legally
Label1:
$1
$2
$1
3-22
LD ADDRA, A
; Load Address A to Accumulator A.
SUB ADDRB, A
; Subtract Address B.
BC $1, ALT
; If less than zero, branch to $1;
LD ADDRB, A
; otherwise, load ADDRB to A
B $2
; and branch to $2.
LD ADDRA, A
; $1: load ADDRA to Accumulator A.
ADD ADDRC, A
; $2: add ADDRC.
.newblock
; Undefine $1 so it can be used
; again.
BC $1, ALT
; If less than zero, branch to $1.
STL A, ADDRC
; Store ACC low in ADDRC.
NOP
Symbols
(b) Code that uses a local label illegally
Label1:
$1
$2
$1
LD ADDRA, A
; Load Address A to Accumulator A.
SUB ADDRB, A
; Subtract Address B.
BC $1, ALT
; If less than zero, branch to $1;
LD ADDRB, A
; otherwise, load ADDRB To A
B $2
; and Branch to $2.
LD ADDRA, A
; $1: Load ADDRA To Accumulator A.
ADD ADDRC, A
; $2: Add ADDRC.
BC $1, ALT
; If less than 0, branch to $1.
STL A, ADDRC
; Store Acc low in ADDRC.
NOP
; WRONG: $1 is multiply defined.
Local labels are especially useful in macros. If a macro contains a normal label
and is called more than once, the assembler issues a multiple-definition error.
If you use a local label and .newblock within a macro, however, the local label
is used and reset each time the macro is expanded.
Up to ten local labels of the $n form can be in effect at one time. Local labels
of the form name? are not limited. After you undefine a local label, you can
define it and use it again. Local labels do not appear in the object code symbol
table.
The maximum label length is shortened to allow for the unique suffix. If the
macro is expanded fewer than 10 times, the maximum label length is 126 characters. If the macro is expanded from 10 to 99 times, the maximum label length
is 125.
Example 3–2 demonstrates the name? form of a local label.
Assembler Description
3-23
Symbols
Example 3–2. name? Local Labels
;*********************************************************
; First definition of local label ’mylab’
;*********************************************************
nop
mylab?
nop
b mylab?
;*********************************************************
; Include file has second definition of ’mylab’
;*********************************************************
.copy ”a.inc”
;*********************************************************
;Third definition of ’mylab’, reset upon exit from include
;*********************************************************
mylab?
nop
b mylab?
;*********************************************************
; Fourth definition of ’mylab’ in macro, macros use
; different namespace to avoid conflicts
;*********************************************************
mymac
.macro
mylab?
nop
b mylab?
.endm
;*********************************************************
; Macro invocation
;*********************************************************
mymac
;*********************************************************
; Reference to third definition of ’mylab’, note that
; definition is not reset by macro invocation nor
; conflicts with same name defined in macro
;*********************************************************
b mylab?;
*********************************************************
; Changing section, allowing fifth definition of ’mylab’
;*********************************************************
.sect ”Secto_One”
nop
mylab?
.word 0
nop
nop
b mylab?
;*********************************************************
;.newblock directive, allowing sixth definition of ’mylab’
;*********************************************************
.newblock
mylab?
.word 0
nop
nop
b mylab?
3-24
Expressions
3.9 Expressions
An expression is a constant, a symbol, or a series of constants and symbols
separated by arithmetic operators. The range of valid expression values is
–32 768 to 32 767. Three main factors influence the order of expression
evaluation:
Parentheses
Expressions that are enclosed in parentheses are
always evaluated first.
8 / (4 / 2) = 4, but 8 / 4 / 2 = 1
You cannot substitute braces ( { } ) or brackets ( [ ] )
for parentheses.
Precedence groups
The C54x assembler uses the same order of precedence as the C language does as summarized
in Table 3–1. This differs from the order of precedence of other TMS320 assemblers. When parentheses do not determine the order of expression
evaluation, the highest precedence operation is
evaluated first.
8 + 4 / 2 = 10 (4 / 2 is evaluated first)
Left-to-right evaluation When parentheses and precedence groups do not
determine the order of expression evaluation, the
expressions are evaluated as happens in the C
language.
8 / 4*2 = 4 , but 8 / (4*2) = 1
Assembler Description
3-25
Expressions
3.9.1
Operators
Table 3–1 lists the operators that can be used in expressions.
Note:
Differences in Precedence From Other TMS320 Assemblers
Some other TMS320 processors use a different order of precedence than
the TMS320C54x, and occasionally different results may be produced from
the same source code for this reason. The C54x uses the same order of precedence as the C language.
Table 3–1. Operators Used in Expressions (Precedence)
Symbols
Operators
Evaluation
Unary plus, minus, 1s complement,
logical negation
Right to left
Multiplication, division, modulo
Left to right
Addition, subtraction
Left to right
Left shift, right shift
Left to right
Less than, LT or equal, greater than,
GT or equal
Left to right
!=, =[=]
Not equal to, equal to
Left to right
&
Bitwise AND
Left to right
^
Bitwise exclusive OR
Left to right
|
Bitwise OR
Left to right
+
–
~
*
/
%
+
–
<<
<
Note:
3.9.2
!
>>
<=
>
>=
Unary +, –, and * have higher precedence than the binary forms.
Expression Overflow and Underflow
The assembler checks for overflow and underflow conditions when arithmetic
operations are performed at assembly time. It issues a Value Truncated warning whenever an overflow or underflow occurs. The assembler does not check
for overflow or underflow in multiplication.
3-26
Expressions
3.9.3
Well-Defined Expressions
Some assembler directives require well-defined expressions as operands.
Well-defined expressions contain only symbols or assembly-time constants
that are defined before they are encountered in the expression. The evaluation
of a well-defined expression must be absolute.
Example 3–3. Well-Defined Expressions
label2
.data
.word 0
.word 1
.word 2
.word 3
X
.set
label1
50h
goodsym1 .set
100h + X
: Because value of X is defined before
; referenced, this is a valid well-defined
; expression
goodsym2 .set
goodsym3 .set
$
label1
; All references to previously defined local
: labels, including the current SPC ($), are
; considered to be well-defined.
goodsym4 .set
label2 – label1
;
;
;
;
;
;
3.9.4
Although label1 and label2 are not
absolute symbols, because they are local
labels defined in the same section, their
difference can be computed by the assembler.
The difference is absolute, so the
expression is well-defined.
Conditional Expressions
The assembler supports relational operators that can be used in any
expression; they are especially useful for conditional assembly. Relational
operators include the following:
=
!=
<
>
Equal to
Not equal to
Less than
Greater than
==
Equal to
<=
>=
Less than or equal to
Greater than or equal to
Conditional expressions evaluate to 1 if true and 0 if false; they can be used
only on operands of equivalent types, for example, absolute value compared
to absolute value, but not absolute value compared to relocatable value.
Assembler Description
3-27
Expressions
3.9.5
Relocatable Symbols and Legal Expressions
Table 3–2 summarizes valid operations on absolute, relocatable, and external
symbols. An expression cannot contain multiplication or division by a
relocatable or external symbol. An expression cannot contain unresolved
symbols that are relocatable to other sections.
Symbols or registers that have been defined as global with the .global directive
can also be used in expressions; in Table 3–2, these symbols and registers
are referred to as external.
Relocatable registers can be used in expressions; the addresses of these
registers are relocatable with respect to the register section they were defined
in, unless they have been declared as external.
Table 3–2. Expressions With Absolute and Relocatable Symbols
If A is...
and
If B is...
, then
A + B is...
and
A – B is...
absolute
absolute
absolute
absolute
absolute
external
external
illegal
absolute
relocatable
relocatable
illegal
relocatable
absolute
relocatable
relocatable
relocatable
relocatable
illegal
absolute †
relocatable
external
illegal
illegal
external
absolute
external
external
external
relocatable
illegal
illegal
external
external
illegal
illegal
† A and B must be in the same section; otherwise, this is illegal.
Following are examples of expressions that use relocatable and absolute symbols. These examples use four symbols that are defined in the same section:
.global extern_1
; Defined in an external module
intern_1: .word ’”D’ ; Relocatable, defined in current module
LAB1: .set 2
; LAB1 = 2
intern_2
; Relocatable, defined in current module
- Example 1
The statements in this example use an absolute symbol, LAB1 (which is
defined above to have a value of 2). The first statement loads the value 51
into the accumulator:
LD
LD
3-28
#LAB1
#LAB1
+
+
((4+3) * 7), A
4 + (3*7), A
;
;
ACC A = 51
ACC A = 27
Expressions
- Example 2
All legal expressions can be reduced to one of two forms:
relocatable symbol ± absolute symbol
or
absolute value
Unary operators can be applied only to absolute values; they cannot be
applied to relocatable symbols. Expressions that cannot be reduced to
contain only one relocatable symbol are illegal. The first statement in the
following example is valid; the statements that follow it are invalid.
LD
LD
LD
LD
LD
extern_1 – 10, B
10–extern_1, B
–(intern_1), B
extern_1/10, B
intern_1 + extern_1, B
;
;
;
;
;
Legal
Can’t negate reloc. symbol
Can’t negate reloc. symbol
/ isn’t additive operator
Multiple relocatables
- Example 3
The first statement below is legal; although intern_1 and intern_2 are
relocatable, their difference is absolute because they’re in the same
section. Subtracting one relocatable symbol from another reduces the
expression to relocatable symbol + absolute value. The second statement
is illegal because the sum of two relocatable symbols is not an absolute
value.
LD intern_1 – intern_2 + extern_1, B
LD intern_1 + intern_2 + extern_1, B
; Legal
; Illegal
- Example 4
An external symbol’s placement is important to expression evaluation.
Although the statement below is similar to the first statement in the
previous example, it is illegal because of left-to-right operator precedence;
the assembler attempts to add intern_1 to extern_1.
LD intern_1 + extern_1 – intern_2, B
; Illegal
Assembler Description
3-29
Built-in Functions
3.10 Built-in Functions
The assembler supports built-in functions for conversions and various math
computations. Table 3–3 describes the built-in functions. Note that expr must
be a constant value. See Table 5–1 for a description of the assembler’s nonmathematical built-in functions.
Table 3–3. Assembler Built-In Math Functions
3-30
Function
Description
$acos(expr)
returns the arc cosine of expr as a floating-point value
$asin(expr)
returns the arc sine of expr as a floating-point value
$atan(expr)
returns the arc tangent of expr as a floating-point value
$atan2(expr)
returns the arc tangent of expr as a floating-point value
(–pi to pi)
$ceil(expr)
returns the smallest integer that is not less than the
expression
$cosh(expr)
returns the hyperbolic cosine of expr as a floating-point
value
$cos(expr)
returns the cosine of expr as a floating-point value
$cvf(expr)
converts expr to floating-point value
$cvi(expr)
converts expr to integer value
$exp(expr)
returns the result of raising e to the expr power
$fabs(expr)
returns absolute value of expr as a floating-point value
$floor(expr)
returns the largest integer that is not greater than the
expression
$fmod(expr1, expr2)
returns the remainder after dividing expr1 and expr2
$int(expr)
returns 1 if expr has an integer result
$ldexp(expr1, expr2)
returns the result of expr1 multiplied by 2 raised to the
expr2 power
$log10(expr)
returns the base 10 logarithm of expr
$log(expr)
returns the natural logarithm of expr
$max(expr1, expr2)
returns the maximum of 2 expressions
$min(expr1, expr2)
returns the minimum of 2 expressions
Built-in Functions
Table 3–3. Assembler Built-In Math Functions (Continued)
Function
Description
$pow(expr1, expr2)
raises expr1 to the power expr 2
$round(expr)
returns the result of expr rounded to the nearest integer
$sgn(expr)
returns the sign of expr
$sin(expr)
returns the sine of expr as a floating-point value
$sinh(expr)
returns the hyperbolic sine of expr as a floating-point
value
$sqrt(expr)
returns the square root of expr as a floating-point value
$tan(expr)
returns the tangent of expr as a floating-point value
$tanh(expr)
returns the hyperbolic tangent of expr as a floating-point
value
$trunc(expr)
returns the result of expr rounded toward zero
Assembler Description
3-31
Loading Values into Extended Program Memory
3.11 Loading Values into Extended Program Memory
The assembler accepts a pseudo-op, LDX, for loading the value of a label,
function, etc. that resides (or may reside) in extended program memory. LDX
is used to load the upper 8 bits of a 24-bit address.
For example, if a function, F1, is in extended program memory (which is 24
bits instead of 16), the value or address of F1 may be loaded as follows:
LDX
#F1,16,A
OR
#F1,A,A
BACC
A
;loads the upper 8 bits of the 24-bit
;address of F1
;adds in the lower 16 bits of the
;address of F1
;all 24 bits of F1 have been loaded
;into accumulator A
Note that it is necessary to use both LDX and OR to load the entire 24-bit
address.
3-32
Source Listings
3.12 Source Listings
A source listing shows source statements and the object code they produce.
To obtain a listing file, invoke the assembler with the –l (lowercase L) option.
Two banner lines, a blank line, and a title line are at the top of each source listing page. Any title supplied by a .title directive is printed on the title line; a page
number is printed to the right of the title. If you don’t use the .title directive, the
name of the source file is printed. The assembler inserts a blank line below the
title line.
Each line in the source file may produce a line in the listing file that shows a
source statement number, an SPC value, the object code assembled, and the
source statement. A source statement may produce more than one word of
object code. The assembler lists the SPC value and object code on a separate
line for each additional word. Each additional line is listed immediately
following the source statement line.
Field 1: Source Statement Number
Line Number
The source statement number is a decimal. The assembler numbers
source lines as it encounters them in the source file; some statements increment the line counter but are not listed. (For example,
.title statements and statements following a .nolist are not listed.)
The difference between two consecutive source line numbers indicates the number of intervening statements in the source file that are
not listed.
Include File Letter
The assembler may precede a line with a letter; the letter indicates
that the line is assembled from an included file.
Nesting Level Number
The assembler may precede a line with a number; the number indicates the nesting level of macro expansions or loop blocks.
Field 2: Section Program Counter
This field contains the section program counter (SPC) value, which
is hexadecimal. All sections (.text, .data, .bss, and named sections)
maintain separate SPCs. Some directives do not affect the SPC and
leave this field blank.
Assembler Description
3-33
Source Listings
Field 3: Object Code
This field contains the hexadecimal representation of the object
code. All machine instructions and directives use this field to list
object code. This field also indicates the relocation type by
appending one of the following characters to the end of the field:
!
undefined external reference
’
.text relocatable
”
.data relocatable
+
.sect relocatable
–
.bss, .usect relocatable
%
complex relocation expression
Field 4: Source Statement Field
This field contains the characters of the source statement as they
were scanned by the assembler. Spacing in this field is determined
by the spacing in the source statement.
Example 3–4 shows an assembler listing with each of the four fields identified.
3-34
Source Listings
Example 3–4. Assembler Listing
(a) Mnemonic example
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
1
1
1
1
1
.global
.global
.global
.global
000000
000000
000001
000002
000003
000004
000005
000006
000007
initmac .macro
* initialize macro
SSBX OVM
; disable oflow
LD #0, DP
; dp = 0
LD #7, ARP
; arp = ar7
LD #037h, A
; acc = 03fh
RSBX INTM
; enable ints
.endm
*******************************************
*
Reset and interrupt vectors
*
*******************************************
.sect ”reset”
RESET: B init
INT0:
B
ISR0
INT1:
B
ISR1
INT2:
B
ISR2
*
000000
000000
000001
000002
000003
000004
000005
000006
000007
F073
0000!
F073
0000!
F073
0000!
F073
0000!
000008
000008
000009
00000a
00000b
00000c
Field 1
F073
0008+
F073
0000!
F073
0000!
F073
0000!
RESET, INT0, INT1, INT2
TINT, RINT, XINT, USER
ISR0, ISR1, ISR2
time, rcv, xmt, proc
F7B9
EA00
F4A7
E837
F6BB
Field 2 Field 3
TINT
.sect ”ints”
B time
RINT
B
rcv
XINT
B
xmt
USER
B
proc
*******************************************
*
Initialize processor.
*
*******************************************
init:
initmac
* initialize macro
SSBX OVM
; disable oflow
LD #0, DP
; dp = 0
LD #7, ARP
; arp = ar7
LD #037h, A
; acc = 03fh
RSBX INTM
; enable ints
Field 4
Assembler Description
3-35
Source Listings
Example 3–4. Assembler Listing (Continued)
(b) Algebraic example
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 000000
18 000000
000001
19 000002
000003
20 000004
000005
21 000006
000007
22
23
24 000000
25 000000
000001
26 000002
000003
27 000004
000005
28 000006
000007
29
30
31
32 000008
1
1
000008
1
000009
1
00000a
1
00000b
1
00000c
Field 1
3-36
.global
.global
.global
.global
F073
0008+
F073
0000!
F073
0000!
F073
0000!
RESET, INT0, INT1, INT2
TINT, RINT, XINT, USER
ISR0, ISR1, ISR2
time, rcv, xmt, proc
initmac .macro
* initialize macro
OVM = 1
; disable oflow
DP = #0
; dp = 0
ARP = #7
; arp = ar7
A = #037h
; acc = 03fh
INTM = 0
; enable ints
.endm
*******************************************
*
Reset and interrupt vectors
*
*******************************************
.sect ”reset”
RESET: goto init
INT0:
goto
ISR0
INT1:
goto
ISR1
INT2:
goto
ISR2
*
F073
0000!
F073
0000!
F073
0000!
F073
0000!
F7B9
EA00
F4A7
E837
F6BB
Field 2 Field 3
TINT
.sect ”ints”
goto time
RINT
goto
rcv
XINT
goto
xmt
USER
goto
proc
*******************************************
*
Initialize processor.
*
*******************************************
init:
initmac
* initialize macro
OVM = 1
; disable oflow
DP = #0
; dp = 0
ARP = #7
; arp = ar7
A = #037h
; acc = 03fh
INTM = 0
; enable ints
Field 4
Cross-Reference Listings
3.13 Cross-Reference Listings
A cross-reference listing shows symbols and their definitions. To obtain a
cross-reference listing, invoke the assembler with the –x option or use the
.option directive. The assembler will append the cross-reference to the end of
the source listing.
Note that when the assembler generates a cross–reference listing for an
assembly file that contains .include directives, it keeps a record of the include
file and line number in which a symbol is defined/referenced. It does this by
assigning a letter reference (A, B, C, etc.) for each include file. The letters are
assigned in the order in which the .include directives are encountered in the
assembly source file.
Example 3–5. Sample Cross-Reference Listing
LABEL
VALUE
DEFN
INT0
INT1
INT2
ISR0
ISR1
ISR2
RESET
RINT
TINT
VECS
XINT
init
0002+
0004+
0006+
REF
REF
REF
0000+
0002+
0000+
0006+
0004+
0000+
14
15
16
REF
2
2
2
4
4
4
13
24
23
26
27
34
14
15
16
2
3
3
3
13
Label
column contains each symbol that was defined or referenced
during the assembly.
Value
column contains a hexadecimal number, which is the value
assigned to the symbol or a name that describes the symbol’s
attributes. A value may also be followed by a character that
describes the symbol’s attributes. Table 3–4 lists these characters and names.
Definition
(DEFN) column contains the statement number that defines
the symbol. This column is blank for undefined symbols.
Reference
(REF) column lists the line numbers of statements that reference the symbol. A blank in this column indicates that the symbol was never used.
Assembler Description
3-37
Cross-Reference Listings
Table 3–4. Symbol Attributes
Character or Name
Meaning
REF
External reference (.global symbol)
UNDF
Undefined
’
Symbol defined in a .text section
”
Symbol defined in a .data section
+
Symbol defined in a .sect section
–
Symbol defined in a .bss or .usect section
For example, the following source files:
(a) incl0.asm
.global
nop
nop
ABC
(b) incl1.asm
.global
ABC
ld ABC, A
(c) incl2.asm
.global
ABC
stl
A,ABC
(d) xref.asm
start:
.include “incl0.asm”
.include “incl1.asm”
add #10,A
.include “incl2.asm”
nop
nop
b start
.global
.bss
3-38
start
ABC,2
Cross-Reference Listings
produce the cross–reference listing below. The A in the cross–reference listing
refers to incl0.asm (the first file included). B refers to incl1.asm; C refers to
incl2.asm.
xref.asm
PAGE
1
1 000000
start:
2
.include ”incl0.asm”
3
.include ”incl1.asm”
4 000003 F000
add #10,A
000004 000A
5
.include ”incl2.asm”
6
7 000006 F495
nop
8 000007 F495
nop
9 000008 F073
b start
000009 0000!
10
11
.global start
12
13 000000
.bss ABC,2
xref.asm
LABEL
VALUE
.TMS320C540
000001
.TMS320C541
000000
.TMS320C542
000000
.TMS320C543
000000
.TMS320C544
000000
.TMS320C545
000000
.TMS320C545LP
000000
.TMS320C546
000000
.TMS320C546LP
000000
.TMS320C548
000000
.start
000000’
ABC
000000–
__far_mode
__lflags
start
000000
000000
REF
PAGE
2
DEFN
REF
0
0
0
0
0
0
0
0
0
0
1
12
A
C
1
1
B
C
1
2
9
11
B
2
0
0
Assembler Description
3-39
Chapter 4
Assembler Directives
Assembler directives supply data to the program and control the assembly
process. Assembler directives enable you to do the following:
-
Assemble code and data into specified sections
Reserve space in memory for uninitialized variables
Control the appearance of listings
Initialize memory
Assemble conditional blocks
Declare global variables
Specify libraries from which the assembler can obtain macros
Examine symbolic debugging information
This chapter is divided into two parts: the first part (Sections 4.1 through 4.10)
describes the directives according to function, and the second part
(Section 4.11) is an alphabetical reference.
Topic
Page
4.1
Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4.2
Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler
Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
4.3
Directives That Define Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
4.4
Directives That Initialize Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
4.5
Directives That Align the Section Program Counter . . . . . . . . . . . . . 4-15
4.6
Directives That Format the Output Listing . . . . . . . . . . . . . . . . . . . . . . 4-17
4.7
Directives That Reference Other Files . . . . . . . . . . . . . . . . . . . . . . . . . 4-19
4.8
Conditional Assembly Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-20
4.9
Assembly-Time Symbol Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21
4.10 Miscellaneous Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23
4.11 Directives Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25
Assembler Directives
4-1
Directives Summary
4.1 Directives Summary
This section summarizes the assembler directives.
Assembler directives and their parameters must be specified entirely on one
line.
Besides the assembler directives documented here, the TMS320C54xt
software tools support the following directives:
- The assembler uses several directives for macros. The macro directives
are listed in this chapter, but they are described in detail in Chapter 5,
Macro Language.
- The absolute lister also uses directives. Absolute listing directives are not
entered by the user but are inserted into the source program by the
absolute lister. Chapter 8, Absolute Lister Description, discusses these
directives; they are not discussed in this chapter.
- The C/C++ compiler uses directives for symbolic debugging. Unlike other
directives, symbolic debugging directives are not used in most assembly
language programs. Appendix B, Symbolic Debugging Directives,
discusses these directives; they are not discussed in this chapter.
Note:
Labels and Comments in Syntax
In most cases, a source statement that contains a directive may also contain
a label and a comment. Labels begin in the first column (they are the only
elements, except comments, that can appear in the first column), and comments must be preceded by a semicolon or an asterisk if the comment is the
only statement on the line. To improve readability, labels and comments are
not shown as part of the directive syntax. For some directives, however, a
label is required and will be shown in the syntax.
Table 4–1. Assembler Directives Summary
(a) Directives that define sections
Mnemonic and Syntax
Description
Page
.bss symbol, size in words [, blocking]
[, alignment ]
Reserve size words in the .bss (uninitialized data)
section
4-30
.clink [”section name”]
Enables conditional linking for the current or specified
section
4-34
.data
Assemble into the .data (initialized data) section
4-39
.sect ”section name”
Assemble into a named (initialized) section
4-80
.text
Assemble into the .text (executable code) section
4-90
symbol .usect ”section name”, size in words
[, blocking] [,alignment]
Reserve size words in a named (uninitialized) section
4-95
4-2
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(b) Directives that initialize constants (data and memory)
Mnemonic and Syntax
Description
Page
.bes size in bits
Reserve size bits in the current section; note that a
label points to the last addressable word in the
reserved space
4-82
.byte value1 [, ... , valuen ]
.char value1 [, ... , valuen ]
Initialize one or more successive words in the current
section
4-33
.double value1 [, ... , valuen ]
.ldouble value1 [, ... , valuen ]
Initialize one or more 64-bit, IEEE double-precision,
floating-point constants
4-40
.field value [, size in bits]
Initialize a variable-length field
4-47
.float value [, ... , valuen ]
Initialize one or more 32-bit, IEEE single-precision,
floating-point constants
4-50
.half value1 [, ... , valuen ]
.short value1 [, ... , valuen ]
Initialize one or more 16-bit integers
4-54
.int value1 [, ... , valuen ]
Initialize one or more 16-bit integers
4-58
.long value1 [, ... , valuen ]
Initialize one or more 32-bit integers
4-64
.pstring ”string1 ” [, ... ,”stringn ”]
Initialize one or more text strings (packed).
4-85
.space size in bits;
Reserve size bits in the current section; note that a
label points to the beginning of the reserved space
4-82
.string ”string1 ” [, ... , ”stringn ”]
Initialize one or more text strings
4-85
.ubyte value1 [, ... , valuen ]
.uchar value1 [, ... , valuen ]
Initialize one or more successive words in the current
section
4-33
.uhalf value1 [, ... , valuen ]
.ushort value1 [, ... , valuen ]
Initialize one or more unsigned 16-bit integers
4-54
.uint value1 [, ... , valuen ]
Initialize one or more unsigned 16-bit integers
4-58
.ulong value1 [, ... , valuen ]
Initialize one or more unsigned 32-bit integers
4-64
.uword value1 [, ... , valuen ]
Initialize one or more unsigned16-bit integers.
4-58
.word value1 [, ... , valuen ]
Initialize one or more 16-bit integers.
4-58
.xfloat value1 [, ...,valuen ]
Initialize one or more 32-bit, IEEE single-precision,
floating-point constants, but do not align on long
word boundary.
4-50
.xlong value1 [, ...,valuen ]
Initialize one or more 32-bit integers, but do not
align on long word boundary.
4-64
Assembler Directives
4-3
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(c) Directives that align the section program counter (SPC)
Mnemonic and Syntax
Description
Page
.align [size in words]
Align the SPC on a word boundary specified by the
parameter; the parameter must be a power of 2, or
default to page boundary. Aligns to word (1), even (2),
etc.
4-27
.even
Align the SPC to a word boundary.
4-27
Mnemonic and Syntax
Description
Page
.drlist
Enable listing of all directive lines (default)
4-41
.drnolist
Suppress listing of certain directive lines
4-41
.fclist
Allow false conditional code block listing (default)
4-46
.fcnolist
Suppress false conditional code block listing
4-46
.length page length
Set the page length of the source listing
4-61
.list
Restart the source listing
4-62
.mlist
Allow macro listings and loop blocks (default)
4-70
.mnolist
Suppress macro listings and loop blocks
4-70
.nolist
Stop the source listing
4-62
.option {B | L | M | R | T | W | X}
Select output listing options
4-76
.page
Eject a page in the source listing
4-78
.sslist
Allow expanded substitution symbol listing
4-83
.ssnolist
Suppress expanded substitution symbol listing
(default)
4-83
.tab size
Set tab size
4-89
.title ”string”
Print a title in the listing page heading
4-91
.width page width
Set the page width of the source listing
4-61
(d) Directives that format the output listing
4-4
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(e) Directives that reference other files
Mnemonic and Syntax
Description
Page
.copy [”]filename[”]
Include source statements from another file
4-36
.def symbol1 [, ... , symboln ]
Identify one or more symbols that are defined in the
current module and may be used in other modules
4-51
.global symbol1 [, ... , symboln ]
Identify one or more global (external) symbols
4-51
.include [”]filename[”]
Include source statements from another file
4-36
.ref symbol1 [, ... , symboln ]
Identify one or more symbols that are used in the current module but may be defined in another module
4-51
Mnemonic and Syntax
Description
Page
.macro
Identify the source statement as the first line of a
macro definition. You must place .macro in the opcode
field
4-67
.mlib [”]filename[”]
Define macro library
4-68
.mexit
Go to .endm. This directive is useful when error testing confirms that macro expansion will fail.
5-3
.endm
End .macro code block
4-44
.var
Define a local macro substitution symbol
4-98
Mnemonic and Syntax
Description
Page
.break [well-defined expression]
End .loop assembly if condition is true. The .break
construct is optional.
4-66
.else
Assemble code block if the .if condition is false. The
.else construct is optional. This directive can be used
as the default case in a conditional block.
4-56
.elseif well-defined expression
Assemble code block if the .if condition is false and the
.elseif condition is true. The .elseif construct is
optional.
4-56
.endif
End .if code block
4-56
.endloop
End .loop code block
4-66
.if well-defined expression
Assemble code block if the condition is true
4-56
.loop [well-defined expression]
Begin repeatable assembly of a code block. The welldefined expression is a loop count.
4-66
(f) Directives that define macros
(g) Directives that control conditional assembly
Assembler Directives
4-5
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(h) Directives that define symbols at assembly time
Mnemonic and Syntax
Description
Page
.asg [”]character string[”],
substitution symbol
Assign a character string to a substitution symbol
4-28
.endstruct
End structure definition
4-86
.endunion
End union definition
4-92
.equ
Equate a value with a symbol
4-81
.eval well-defined expression,
substitution symbol
Perform arithmetic on numeric substitution
symbols
4-28
.label symbol
Define a load-time relocatable label in a section
4-60
.set
Equate a value with a symbol
4-81
.struct
Begin structure definition
4-86
.tag
Assign structure attributes to a label
4-86
.union
Begin union definition
4-92
4-6
Directives Summary
Table 4–1. Assembler Directives Summary (Continued)
(i) Miscellaneous directives
Mnemonic and Syntax
Description
Page
.algebraic
Signifies that the file contains algebraic assembly
source
4-26
.c_mode
Signifies that calls and branches are within the normal
16-bit address range.
4-35
.emsg string
Send user-defined error messages to the output
device
4-42
.end
End program
4-44
.far_mode
Signifies that calls and branches are far calls
4-45
.mmregs
Enter memory-mapped registers into the symbol table
4-71
.mmsg string
Send user-defined messages to the output device
4-42
.newblock
Undefine local labels
4-74
.noremark [num]
Identify the beginning of a block of code in which the
assember will suppress the assembler remark identified by num. If num is not specified, all remarks are
suppressed.
4-75
.remark [num]
Resume the default behavior of generating the remark(s) previously suppressed by .noremark.
4-75
.sblock [”]section name[”]
[, ... , ”section name”]
Designates sections for blocking
4-79
.version [value]
Specify the device for which processor instructions
are being built
4-99
.wmsg string
Send user-defined warning messages to the output
device
4-42
Assembler Directives
4-7
Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives
4.2 Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives
This section explains how the TMS320C54x assembler directives differ from
the TMS320C1x/C2x/C2xx/C5x assembler directives.
- The ’C54x .long and .float directives place the most significant word of the
value at the lower address, while the ’C1x/C2x/C2xx/C5x assembler directives place the least significant word at the lower address. Also, the ’C54x
.long and .float directives automatically align the SPC on an even word
boundary, while the ’C1x/C2x/C2xx/C5x assembler directives do not.
- Without arguments, the ’C54x and the ’C1x/C2x/C2xx/C5x assemblers
both align the SPC at the next 128-word boundary. However, the ’C54x
.align directive also accepts a constant argument, which must be a power
of 2, and this argument causes alignment of the SPC on that word boundary. The .align directive for the ’C1x/C2x/C2xx/C5x assembler does not
accept this constant argument.
- The .field directive for the ’C54x packs fields into words starting at the most
significant bit of the word. The ’C1x/C2x/C2xx/C5x assembler .field directive places fields into words starting at the least significant bit of the word.
- The .field directive for the ’C54x handles values of 1 to 32 bits, contrasted
with the ’C1x/C2x/C2xx/C5x assembler which handles values of 1 to 16
bits. With the ’C54x assembler, objects that are 16 bits or larger start on
a word boundary and are placed with the most significant bits at the lower
address.
- The ’C54x .bss and .usect directives have an additional flag called the
alignment flag which specifies alignment on an even word boundary. The
’C1x/C2x/C2xx/C5x .bss and .usect directives do not use this flag.
- The .string directive for the ’C54x initializes one character per word, unlike
the ’C1x/C2x/C2xx/C5x assembler .string, which packs two characters
per word. The new .pstring directive packs two characters per word, as the
former .string did.
- The following directives are new with the ’C54x assembler and are not
supported by the ’C1x/C2x/C2xx/C5x assembler:
4-8
Directive
Usage
.xfloat
Same as .float without automatic alignment
.xlong
Same as .long without automatic alignment
.pstring
Same as .string, but packs two chars/word
Directives That Define Sections
4.3 Directives That Define Sections
These directives associate portions of an assembly language program with
the appropriate sections:
- .bss reserves space in the .bss section for uninitialized variables.
- .clink sets the STYP_CLINK flag in the type field for the named section.
The .clink directive can be applied to initialized or uninitialized sections.
The STYP_CLINK flag enables conditional linking by telling the linker to
leave the section out of the final COFF output of the linker if there are no
references found to any symbol in the section.
- .data identifies portions of code in the .data section. The .data section
usually contains initialized data.
- .sect defines initialized named sections and associates subsequent code
or data with that section. A section defined with .sect can contain executable code or data.
- .text identifies portions of code in the .text section. The .text section
usually contains executable code.
- .usect reserves space in an uninitialized named section. The .usect
directive is similar to the .bss directive, but it allows you to reserve space
separately from the .bss section.
Chapter 2, Introduction to Common Object File Format, discusses COFF
sections in detail.
Example 4–1 shows how you can use sections directives to associate code
and data with the proper sections. This is an output listing; column 1 shows line
numbers, and column 2 shows the SPC values. (Each section has its own program counter, or SPC.) When code is first placed in a section, its SPC equals
0. When you resume assembling into a section after other code is assembled,
the section’s SPC resumes counting as if there had been no intervening code.
The directives in Example 4–1 perform the following tasks:
.text
initializes words with the values 1, 2, 3, 4, 5, 6, 7, and 8.
.data
initializes words with the values 9, 10, 11, 12, 13, 14, 15,
and 16.
var_defs
initializes words with the values 17 and 18.
.bss
reserves 19 words.
.usect
reserves 20 words.
The .bss and .usect directives do not end the current section or begin new
sections; they reserve the specified amount of space, and then the assembler
resumes assembling code or data into the current section.
Assembler Directives
4-9
Directives That Define Sections
Example 4–1. Sections Directives
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
4-10
000000
000000
000001
000002
000003
**************************************************
*
Start assembling into the .text section
*
**************************************************
.text
0001
.word 1,2
0002
0003
.word 3,4
0004
000000
000000
000001
000002
000003
**************************************************
*
Start assembling into the .data section
*
**************************************************
.data
0009
.word 9, 10
000A
000B
.word 11, 12
000C
**************************************************
*
Start assembling into a named,
*
*
initialized section, var_defs
*
**************************************************
000000
.sect ”var_defs”
000000 0011
.word 17, 18
000001 0012
000004
000004
000005
000000
000006
000007
**************************************************
*
Resume assembling into the .data section
*
**************************************************
.data
000D
.word 13, 14
000E
.bss
sym, 19
; Reserve space in .bss
000F
.word 15, 16
; Still in .data
0010
000004
000004
000005
000000
000006
000007
**************************************************
*
Resume assembling into the .text section
*
**************************************************
.text
0005
.word 5, 6
0006
usym
.usect ”xy”, 20
; Reserve space in xy
0007
.word 7, 8
; Still in .text
0008
Directives That Initialize Constants
4.4 Directives That Initialize Constants
This section describes several directives that assemble values for the current
section.
- The .bes and .space directives reserve a specified number of bits in the
current section. The assembler fills these reserved bits with 0s.
You can reserve words by multiplying the desired number of words by 16.
J
When you use a label with .space, it points to the first word that
contains reserved bits.
J
When you use a label with .bes, it points to the last word that contains
reserved bits.
Figure 4–1 shows the .space and .bes directives. Assume the following
code has been assembled for this example:
1
2
3
4 000000
000001
5 000002
6 000004
7 000006
8 000007
9
10 000008
11 00000b
** .space and .bes directives
0100
0200
.word
Res_1:
100h, 200h
.space
.word
Res_2: .bes
00ba
.byte
** reserve 3 words
Res_3: .space
000a
.word
000f
17
15
20
0BAh
3*16
10
Res_1 points to the first word in the space reserved by .space. Res_2
points to the last word in the space reserved by .bes.
Figure 4–1. The .space and .bes Directives
Res_1 = 02h
17 bits
reserved
20 bits
reserved
Res_2 = 06h
Assembler Directives
4-11
Directives That Initialize Constants
- The .byte, .ubyte, .char, and .uchar directives place one or more 8-bit
values into consecutive words of the current section. These directives are
similar to .word and .uword, except that the width of each value is
restricted to 8 bits.
- The .field directive places a single value into a specified number of bits
in the current word. With .field, you can pack multiple fields into a single
word; the assembler does not increment the SPC until a word is filled.
Figure 4–2 shows how fields are packed into a word. For this example,
assume the following code has been assembled; notice that the SPC
doesn’t change for the first three fields (the fields are packed into the same
word):
4
5
6
7
000000
000000
000000
000001
000002
8 000003
000004
6000
6400
6440
0123
4000
0000
1234
.field
.field
.field
.field
3, 3
8, 6
16, 5
01234h,20
.field
01234h,32
Figure 4–2. The .field Directive
15 14 13
0 1 1
3 bits
15
12 11 10 9 8 7
0 1 1 0 0 1 0 0 0
0
.field
0
3,3
.field
8,6
6 bits
15
6 5 4 3 2
0
0 1 1 0 0 1 0 0 0 1 0 0 0 0 0 0
.field
16,5
5 bits
15
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1
.field
01234h,20
.field
01234h,32
15
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15
0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
- .float and .xfloat calculate the single-precision (32-bit) IEEE floating-
point representation of a single floating-point value and store it in two con4-12
Directives That Initialize Constants
secutive words in the current section. The most significant word is stored
first. The .float directive automatically aligns to the nearest long word
boundary, and .xfloat does not.
- .int, .uint, .half, .uhalf, .short, .ushort, .word, and .uword place one or
more 16-bit values into consecutive words in the current section.
- .double and .ldouble calculate the single-precision (32-bit) IEEE floating-
point representation of one or more floating-point values and store them
in two consecutive words in the current section. The .double directive
automatically aligns to the long word boundary.
- .long, .ulong, and .xlong place 32-bit values into two consecutive words
in the current section. The most significant word is stored first. The .long
directive automatically aligns to a long word boundary, and the .xlong
directive does not.
- .string and .pstring place 8-bit characters from one or more character
strings into the current section. The .string directive is similar to .byte, placing an 8-bit character in each consecutive word of the current section. The
.pstring also has a width of 8 bits but packs two characters into a word. For
.pstring, the last word in a string is padded with null characters (0) if
necessary.
Note:
These Directives in a .struct/.endstruct Sequence
The directives listed above do not initialize memory when they are part of a
.struct/.endstruct sequence; rather, they define a member’s size. For more
information about the .struct/.endstruct directives, see Section 4.9,
Assembly-Time Symbol Directives, on page 4-21.
Figure 4–3 compares the .byte, .int, .long, .xlong, .float, .xfloat, .word, and
.string directives. For this example, assume that the following code has been
assembled:
Assembler Directives
4-13
Directives That Initialize Constants
1 000000
000001
2 000002
3 000003
000004
4 000006
000007
5 000008
6 000009
00000a
7 00000c
00000d
8 00000e
00000f
000010
000011
00aa
00bb
0ccc
0eee
efff
eeee
ffff
dddd
3fff
ffac
3fff
ffac
0068
0065
006c
0070
.byte
0AAh, 0BBh
.word
.xlong
0CCCh
0EEEEFFFh
.long
0EEEEFFFFh
.int
.xfloat
0DDDDh
1.99999
.float
1.99999
.string
”help”
Figure 4–3. Initialization Directives
Code
Word
15
0
15
0
0
0, 1
0
0
A
A
0
B
2
0
C
C
C
3, 4
0
E
E
E
E
F
F
6, 7
E
E
E
E
F
F
F
8
D
D
D
D
9, a
3
F
F
F
F
F
A
C
.xfloat 1.99999
c, d
3
F
F
F
F
F
A
C
.float
e, f
0
0
6
8
0
0
6
5
.string ”help”
h
10, 11
0
0
6
4-14
.byte
OAAh, OBBh
.word
OCCCh
F
.xlong
0EEEEFFFh
F
.long
EEEEFFFFh
.int
DDDDh
e
C
l
B
0
0
7
0
p
1.99999
Directives That Align the Section Program Counter
4.5 Directives That Align the Section Program Counter
The .align directive aligns the SPC at a 1-word to 128-word boundary. This
ensures that the code following the directive begins on an x-word or page
boundary. If the SPC is already aligned at the selected boundary, it is not
incremented. Operands for the .align directive must equal a power of 2
between 20 and 216 (although directives beyond 27 are not meaningful). For
example:
Operand of 1
2
aligns SPC to word boundary
aligns SPC to long word / even boundary
128 aligns SPC to page boundary
The .align directive with no operands defaults to a page boundary.
The .even directive aligns the SPC so that it points to the next word boundary.
It is equivalent to specifying the .align directive with an operand of 1. Using
.even with an operand of 2 aligns the SPC to the next long word boundary. Any
unused bits in the current word are filled with 0s.
Figure 4–4 demonstrates the .align directive. Assume that the following code
has been assembled:
1 000000 4000
2 000000 4160
3
4 000002 0045
000003 0072
000004 0072
000005 006f
000006 0072
000007 0063
000008 006e
000009 0074
5
6 000080 0004
.field
.field
.align
.string
2, 3
11, 8
2
”Errorcnt”
.align
.byte
4
Assembler Directives
4-15
Directives That Align the Section Program Counter
Figure 4–4. The .align Directive
(a) Result of .align 2
(a) Current
SPC =
00h
00h
2 words
02h
(b) New SPC =
02h after
assembling
a .align 2
directive
(b) Result of .align without an argument
00h
128
words
(a) Current
SPC
80h
4-16
(b) New SPC =
80h after
assembling
a .align
directive
Directives That Format the Output Listing
4.6 Directives That Format the Output Listing
The following directives format the listing file:
- You can use the .drnolist directive to suppress the printing of the following
directives in the listing:
.asg
.break
.emsg
.eval
.fclist
.fcnolist
.length
.mlist
.mmsg
.mnolist
.sslist
.ssnolist
.var
.width
.wmsg
You can use the .drlist directive to turn on the listing of these directives
again.
- The listing file contains a listing of false conditional blocks that do not gen-
erate code. The .fclist and .fcnolist directives turn this listing on and off.
You can use the .fclist directive to list false conditional blocks exactly as
they appear in the source code. This is the default behavior of the
assembler. You can use the .fcnolist directive to list only the conditional
blocks that are actually assembled.
- The .length directive controls the page length of the listing file. You can
use this directive to adjust listings for various output devices.
- The .list and .nolist directives turn the output listing on and off. You can
use the .nolist directive to stop the assembler from printing selected
source statements in the listing file. Use the .list directive to turn the listing
on again.
- The listing file contains a listing of macro expansions and loop blocks. The
.mlist and .mnolist directives turn this listing on and off. You can use the
.mlist directive to print all macro expansions and loop blocks to the listing
(the default behavior of the assembler), and the .mnolist directive to
suppress this listing.
- The .option directive controls certain features in the listing file. This
directive has the following operands:
A
turns on listing of all directives and data, and subsequent expansions, macros, and blocks
B
limits the listing of .byte directives to one line.
D
turns off the listing of certain directives (same effect as .drnolist)
H
limits the listing of .half and .short directives to one line.
L
limits the listing of .long directives to one line.
M
turns off macro expansions in the listing.
N
turns off listing (performs .nolist)
Assembler Directives
4-17
Directives That Format the Output Listing
O
turns on listing (performs .list)
R
resets the B, M, T, and W options.
T
limits the listing of .string directives to one line.
W
limits the listing of .word directives to one line.
X
produces a symbol cross-reference listing. (You can also obtain
a cross-reference listing by invoking the assembler with the
–x option.)
- The .page directive causes a page eject in the output listing.
- The .sslist and .ssnolist directives allow and suppress substitution
symbol expansion listing. These directives are useful for debugging the
expansion of substitution symbols.
- The .tab directive defines tab size.
- The .title directive supplies a title that the assembler prints at the top of
each page.
- The .width directive controls the page width of the listing file. You can use
this directive to adjust listings for various output devices.
4-18
Directives That Reference Other Files
4.7 Directives That Reference Other Files
These directives supply information for or about other files:
- The .copy and .include directives tell the assembler to begin reading
source statements from another file. When the assembler finishes reading
the source statements in the copy/include file, it resumes reading source
statements from the current file immediately following the point at which
the .copy or .include directive occurred. The statements read from a
copied file are printed in the listing file; the statements read from an
included file are not printed in the listing file.
- The .def directive identifies a symbol that is defined in the current module
and that can be used by another module. The assembler includes the
symbol in the symbol table.
- The .global directive declares a symbol external so that it is available to
other modules at link time. (For more information about global symbols,
see subsection 2.8.1, External Symbols, on page 2-21.) The .global
directive does double duty, acting as a .def for defined symbols and as a
.ref for undefined symbols. The linker resolves an undefined global symbol
only if it is used in the program.
- The .ref directive identifies a symbol that is used in the current module but
defined in another module. The assembler marks the symbol as an
undefined external symbol and enters it in the object symbol table so that
the linker can resolve its definition.
Assembler Directives
4-19
Conditional Assembly Directives
4.8 Conditional Assembly Directives
Conditional assembly directives enable you to instruct the assembler to
assemble certain sections of code according to a true or false evaluation of an
expression. Two sets of directives allow you to assemble conditional blocks of
code:
- The .if /.elseif /.else/.endif directives tell the assembler to conditionally
assemble a block of code according to the evaluation of an expression.
The expression must be entirely specified on the same line as the
directive.
.if expression
marks the beginning of a conditional block and
assembles code if the .if condition is true.
.elseif expression
marks a block of code to be assembled if the .if
condition is false and .elseif is true.
.else
marks a block of code to be assembled if the .if
condition is false.
.endif
marks the end of a conditional block and terminates the block.
- The .loop /.break/.endloop directives tell the assembler to repeatedly
assemble a block of code according to the evaluation of an expression.
The expression must be entirely specified on the same line as the
directive.
.loop expression
marks the beginning a block of code that is
assembled repeatedly up to the number of times
indicated by the expression. The expression is the
loop count.
.break expression
tells the assembler to continue to repeatedly
assemble when the .break expression is false, and
to go to the code immediately after .endloop when
the expression is true.
.endloop
marks the end of a repeatable block.
The assembler supports several relational operators that are useful for
conditional expressions. For more information about relational operators, see
subsection 3.9.4, Conditional Expressions, on page 3-27.
4-20
Assembly-Time Symbol Directives
4.9 Assembly-Time Symbol Directives
Assembly-time symbol directives equate meaningful symbol names to constant values or strings.
- The .asg directive assigns a character string to a substitution symbol. The
value is stored in the substitution symbol table. When the assembler
encounters a substitution symbol, it replaces the symbol with its character
string value. Substitution symbols can be redefined.
.asg
”10, 20, 30, 40”, coefficients
.byte coefficients
- The .eval directive evaluates an expression, translates the results into a
character, and assigns the character string to a substitution symbol. This
directive is most useful for manipulating counters:
.asg
.loop
.byte
.break
.eval
.endloop
1 , x
x*10h
x = 4
x+1, x
- The .label directive defines a special symbol that refers to the loadtime
address within the current section. This is useful when a section loads at
one address but runs at a different address. For example, you may want
to load a block of performance-critical code into slower off-chip memory
to save space, and move the code to high-speed on-chip memory to run.
- The .set and .equ directives set a value to a symbol. The symbol is stored
in the symbol table and cannot be refined. For example:
bval
.set
0100h
.byte bval, bval*2, bval+12
B
bval
The .set and .equ directives produce no object code. The two directives
are identical and can be used interchangeably.
- The .struct /.endstruct directives set up C-like structure definitions, and
the .tag directive assigns the C-like structure characteristics to a label.
The .struct /.endstruct directives allow you to organize your information
into structures, so that similar elements can be grouped together. Element
offset calculation is then left up to the assembler. The .struct/.endstruct
directives do not allocate memory. They simply create a symbolic template
that can be used repeatedly.
Assembler Directives
4-21
Assembly-Time Symbol Directives
The .tag directive associates structure characteristics with a label symbol.
This simplifies the symbolic representation and also provides the ability to
define structures that contain other structures. The .tag directive does not
allocate memory, and the structure tag (stag) must be defined before it is
used.
type
X
Y
T_LEN
.struct
.int
.int
.endstruct
; structure tag definition
COORD .tag type
; declare COORD (coordinate)
ADD
COORD.Y, A
.bss COORD, T_LEN ; actual memory allocation
- The .union /.endunion directives create a symbolic template that can be
used repeatedly, providing a way to manipulate several different kinds of
data in the same storage area. The union sets up a C-like union definition.
While it does not allocate any memory, it allows alternate definitions of size
and type that may be temporarily stored in the same memory space.
The .tag directive associates union characteristics with a label symbol. A
union can be defined and given a tag, and later it can be declared as a
member of a structure by using the .tag directive. A union may also be declared without a tag, in which case all of its members will be entered in the
symbol table, and each member must have a unique name. A union may
also be defined within a structure, in which case any reference to such a
union must be made via with the structure that encloses it. For example:
.data
s2_tag .struct ;structure tag definition
.union
;union is first structure member
.struct ;structure is union member
h1
.half
;h1, h2, and w1
h2
.uhalf
;exist in the same memory
.endstruct
w1
.word
;word is another union member
.endunion
w2
.word
;second structure member
s2_len .endstruct
XYZ
4-22
.tag
.bss
s2_tag
XYZ,s2_len
ADD
XYZ.h2, A
;declare instance of structure
Miscellaneous Directives
4.10 Miscellaneous Directives
These directives enable miscellaneous functions or features:
- The .algebraic directive tells the assembler that the file contains algebraic
assembly source code. This must be the first line in the file if the –mg
assembler option is not used.
- The .c_mode directive tells the assembler that calls and branches are
within the normal 16-bit address range. This is the default behavior of the
assembler.
- The .end directive terminates assembly. It should be the last source
statement of a program. This directive has the same effect as an
end-of-file.
- The .far_mode directive tells the assembler that calls are far calls.
- The .mmregs directive defines symbolic names for the memory-mapped
register. Using .mmregs is the same as executing a .set for all
memory-mapped registers. See Table 4–2 on page 4-71 for a list of
memory-mapped registers.
- The .newblock directive resets local labels. Local labels are symbols of
the form $n or name?. They are defined when they appear in the label field.
Local labels are temporary labels that can be used as operands for jump
instructions. The .newblock directive limits the scope of local labels by
resetting them after they are used. For more information about local
labels, see subsection 3.8.6, Local Labels, on page 3-22.
- The .sblock directive designates sections for blocking. Blocking is an
address alignment mechanism similar to page alignment, but weaker. A
blocked section is guaranteed not to cross a page boundary (128 words)
if it is smaller than a page, or to start on a page boundary if it is larger than
a page. Note that this directive allows specification of blocking for initialized sections only, not uninitialized sections declared with .usect or the
.bss section. The section names may or may not be enclosed in quotes.
- The .noremark directive begins a block of code in which the assembler
will suppress the specified assembler remark (or all remarks). A remark
is an informational assembler message that is less severe than a warning.
The .remark directive re-enables the remark(s) previously suppressed by
.noremark.
- The .version directive determines the processor for which instructions are
being built. Each C54x device has its own value.
Assembler Directives
4-23
Miscellaneous Directives
These three directives enable you to define your own error and warning
messages:
- The .emsg directive sends error messages to the standard output device.
The .emsg directive generates errors in the same manner as the
assembler, incrementing the error count and preventing the assembler
from producing an object file.
- The .mmsg directive sends assembly-time messages to the standard
output device. The .mmsg directive functions in the same manner as the
.emsg and .wmsg directives but does not increment the error count or the
warning count. It does not affect the creation of the object file.
- The .wmsg directive sends warning messages to the standard output
device. The .wmsg directive functions in the same manner as the .emsg
directive but increments the warning count, rather than the error count. It
does not affect the creation of the object file.
4-24
Directives Reference
4.11 Directives Reference
The remainder of this chapter is a reference. Generally, the directives are
organized alphabetically, one directive per page. Related directives (such as
.if /.else/.endif), however, are presented together on one page.
Directive . . . . . . . . . . . . . . . . . Page
.algebraic . . . . . . . . . . . . . . . . . 4-26
.align . . . . . . . . . . . . . . . . . . . . . 4-27
.asg . . . . . . . . . . . . . . . . . . . . . . 4-28
.bes . . . . . . . . . . . . . . . . . . . . . . 4-82
.break . . . . . . . . . . . . . . . . . . . . 4-66
.bss . . . . . . . . . . . . . . . . . . . . . . 4-30
.byte/.ubyte . . . . . . . . . . . . . . . . 4-33
.c_mode . . . . . . . . . . . . . . . . . . 4-35
.char/.uchar . . . . . . . . . . . . . . . . 4-33
.clink . . . . . . . . . . . . . . . . . . . . . 4-34
.copy . . . . . . . . . . . . . . . . . . . . . 4-36
.data . . . . . . . . . . . . . . . . . . . . . . 4-39
.def . . . . . . . . . . . . . . . . . . . . . . . 4-51
.double . . . . . . . . . . . . . . . . . . . . 4-40
.drlist . . . . . . . . . . . . . . . . . . . . . 4-41
.drnolist . . . . . . . . . . . . . . . . . . . 4-41
.else . . . . . . . . . . . . . . . . . . . . . . 4-56
.elseif . . . . . . . . . . . . . . . . . . . . . 4-56
.emsg . . . . . . . . . . . . . . . . . . . . . 4-42
.end . . . . . . . . . . . . . . . . . . . . . . 4-44
.endif . . . . . . . . . . . . . . . . . . . . . 4-56
.endloop . . . . . . . . . . . . . . . . . . 4-66
.endm . . . . . . . . . . . . . . . . . . . . . 4-44
.endstruct . . . . . . . . . . . . . . . . . 4-86
.endunion . . . . . . . . . . . . . . . . . 4-92
.equ . . . . . . . . . . . . . . . . . . . . . . 4-81
.eval . . . . . . . . . . . . . . . . . . . . . . 4-28
.even . . . . . . . . . . . . . . . . . . . . . 4-27
.far_mode . . . . . . . . . . . . . . . . . 4-45
.fclist . . . . . . . . . . . . . . . . . . . . . 4-46
.fcnolist . . . . . . . . . . . . . . . . . . . 4-46
.field . . . . . . . . . . . . . . . . . . . . . . 4-47
.float . . . . . . . . . . . . . . . . . . . . . . 4-50
.global . . . . . . . . . . . . . . . . . . . . 4-51
.half/.uhalf . . . . . . . . . . . . . . . . . 4-54
.if . . . . . . . . . . . . . . . . . . . . . . . . 4-56
.include . . . . . . . . . . . . . . . . . . . 4-36
.int/.uint. . . . . . . . . . . . . . . . . . . . 4-58
.label . . . . . . . . . . . . . . . . . . . . . 4-60
Directive . . . . . . . . . . . . . . . . . Page
.ldouble . . . . . . . . . . . . . . . . . . . 4-40
.length . . . . . . . . . . . . . . . . . . . . 4-61
.list . . . . . . . . . . . . . . . . . . . . . . . 4-62
.long/.ulong . . . . . . . . . . . . . . . . 4-64
.loop . . . . . . . . . . . . . . . . . . . . . . 4-66
.macro . . . . . . . . . . . . . . . . . . . . 4-67
.mlib . . . . . . . . . . . . . . . . . . . . . . 4-68
.mlist . . . . . . . . . . . . . . . . . . . . . 4-70
.mmregs. . . . . . . . . . . . . . . . . . . 4-71
.mmsg . . . . . . . . . . . . . . . . . . . . 4-42
.mnolist . . . . . . . . . . . . . . . . . . . 4-70
.newblock . . . . . . . . . . . . . . . . . 4-74
.nolist . . . . . . . . . . . . . . . . . . . . . 4-62
.option . . . . . . . . . . . . . . . . . . . . 4-76
.page . . . . . . . . . . . . . . . . . . . . . 4-78
.pstring . . . . . . . . . . . . . . . . . . . . 4-85
.ref . . . . . . . . . . . . . . . . . . . . . . . 4-51
.sblock . . . . . . . . . . . . . . . . . . . . 4-79
.sect . . . . . . . . . . . . . . . . . . . . . . 4-80
.set . . . . . . . . . . . . . . . . . . . . . . . 4-81
.short/.ushort . . . . . . . . . . . . . . 4-54
.space . . . . . . . . . . . . . . . . . . . . 4-82
.sslist . . . . . . . . . . . . . . . . . . . . . 4-83
.ssnolist . . . . . . . . . . . . . . . . . . . 4-83
.string . . . . . . . . . . . . . . . . . . . . . 4-85
.struct . . . . . . . . . . . . . . . . . . . . . 4-86
.tab . . . . . . . . . . . . . . . . . . . . . . . 4-89
.tag . . . . . . . . . . . . . . . . . . . . . . . 4-86
.text . . . . . . . . . . . . . . . . . . . . . . 4-90
.title . . . . . . . . . . . . . . . . . . . . . . 4-91
.union . . . . . . . . . . . . . . . . . . . . . 4-92
.usect . . . . . . . . . . . . . . . . . . . . . 4-95
.version . . . . . . . . . . . . . . . . . . . 4-99
.width . . . . . . . . . . . . . . . . . . . . . 4-61
.wmsg . . . . . . . . . . . . . . . . . . . . 4-42
.word/.uword . . . . . . . . . . . . . . . 4-58
.var . . . . . . . . . . . . . . . . . . . . . . . 4-98
.xfloat . . . . . . . . . . . . . . . . . . . . . 4-50
.xlong . . . . . . . . . . . . . . . . . . . . . 4-64
Assembler Directives
4-25
.algebraic
File Contains Algebraic Assembly Source
Syntax
.algebraic
Description
The .algebraic directive tells the assembler that this file contains algebraic
assembly source code. This directive must be the first line in the file if the –mg
option is not used.
Note:
Mixing Algebraic and Mnemonic Assembly Code
Algebraic and mnemonic assembly code cannot be mixed within the same
source file.
The .algebraic directive does not provide a method for mixing algebraic and
mnemonic statements within the same source file. It provides a means of
selecting algebraic assembly without specifying the –mg assembler option.
4-26
Align SPC on a Boundary
.align/.even
Syntax
.align [size]
.even
Description
The .align directive aligns the section program counter (SPC) on the next
boundary, depending on the size parameter. The size may be any power of 2,
although only certain values are useful for alignment.
An operand of 128 aligns the SPC on the next page boundary, and this is the
default if no size is given. The assembler assembles words containing null
values (0) up to the next x-word boundary.
Operand of 1
2
aligns SPC to word boundary
aligns SPC to long word / even boundary
128 aligns SPC to page boundary
The .even directive aligns the SPC on a long word/even boundary. This directive is equivalent to the .align directive with an operand of 2.
Using the .align directive has two effects:
- The assembler aligns the SPC on a boundary within the current section.
- The assembler sets a flag that forces the linker to align the section so that
individual alignments remain intact when a section is loaded into memory.
Example
This example shows several types of alignment, including .even, .align 4, and
a default .align.
1 000000 0004
2
3 000002 0045
000003 0072
000004 0072
000005 006F
000006 0072
000007 0063
000008 006E
000009 0074
4
5 000080 6000
6 000080 6A00
7
8 000082 6000
9
10 000088 5000
11
12 000100 0004
.byte
.even
.string
.align
.field
.field
.align
.field
.align
.field
.align
.byte
4
”Errorcnt”
3,3
5,4
2
3,3
8
5,4
4
Assembler Directives
4-27
.asg/.eval
Assign Character Strings to Substitution Symbols
Syntax
.asg [ ” ]character string[ ” ], substitution symbol
.eval well-defined expression, substitution symbol
Description
The .asg directive assigns character strings to substitution symbols.
Substitution symbols are stored in the substitution symbol table. The .asg
directive can be used in many of the same ways as the .set directive, but while
.set assigns a constant value (which cannot be redefined) to a symbol, .asg
assigns a character string (which can be redefined) to a substitution symbol.
- The assembler assigns the character string to the substitution symbol.
The quotation marks are optional. If there are no quotation marks, the
assembler reads characters up to the first comma and removes leading
and trailing blanks. In either case, a character string is read and assigned
to the substitution symbol.
- The substitution symbol must be a valid symbol name. The substitution
symbol may be 32 characters long and must begin with a letter. Remaining
characters of the symbol can be a combination of alphanumeric
characters, the underscore (_), and the dollar sign ($).
The .eval directive performs arithmetic on substitution symbols, which are
stored in the substitution symbol table. This directive evaluates the expression
and assigns the string value of the result to the substitution symbol. The .eval
directive is especially useful as a counter in .loop/.endloop blocks.
- The well-defined expression is an alphanumeric expression consisting of
legal values that have been previously defined, so that the result is an absolute.
- The substitution symbol must be a valid symbol name. The substitution
symbol may be 32 characters long and must begin with a letter. Remaining
characters of the symbol can be a combination of alphanumeric
characters, the underscore (_), and the dollar sign ($).
4-28
Assign Character Strings to Substitution Symbols
Example
.asg/.eval
This example shows how .asg and .eval can be used.
1
2
*
3
*
4
*
5
6
7
8 000000 f000
000001 0064
9 000002 6d90
#
10
11
12
13
14
15
16
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
1
#
000003 0001
000004 0002
000005 0003
000006 0004
000007 0005
.sslist;show expanded sub. symbols
.asg/.eval example
.asg
.asg
*+, INC
AR0, FP
ADD
#100, A
MAR
MAR
*FP+
*AR0+
.asg
0, x
.loop
5
.eval
x+1,
.word
x
.endloop
.eval
x+1,
.eval
0+1,
.word
x
.word
1
.eval
x+1,
.eval
1+1,
.word
x
.word
2
.eval
x+1,
.eval
2+1,
.word
x
.word
3
.eval
x+1,
.eval
3+1,
.word
x
.word
4
.eval
x+1,
.eval
4+1,
.word
x
.word
5
x
x
x
x
x
x
x
x
x
x
x
Assembler Directives
4-29
.bss
Reserve Space in the .bss Section
Syntax
.bss symbol, size in words [, [blocking flag] [, alignment flag ] ]
Description
The .bss directive reserves space for variables in the .bss section. This
directive is typically used to allocate variables in RAM.
- The symbol is a required parameter. It defines a label that points to the first
location reserved by the directive. The symbol name corresponds to the
variable that you’re reserving space for.
- The size is a required parameter; it must be an absolute expression. The
assembler allocates size words in the .bss section. There is no default
size.
- The blocking flag is an optional parameter. If you specify a non-zero value
for this parameter, the assembler allocates size words contiguously. This
means that the allocated space will not cross a page boundary unless size
is greater than a page, in which case, the object will start on a page boundary.
- The alignment flag is an optional parameter. This flag causes the
assembler to allocate size on long word boundaries.
Note:
Specifying an Alignment Flag Only
To specify an alignment flag without a blocking flag, you can insert two
commas before the alignment flag, or you can specify 0 for the blocking flag.
The assembler follows two rules when it allocates space in the .bss section:
Rule 1
Whenever a hole is left in memory (as shown in Figure 4–5), the
.bss directive attempts to fill it. When a .bss directive is assembled,
the assembler searches its list of holes left by previous .bss
directives and tries to allocate the current block into one of the
holes. (This is the standard procedure whether the contiguous allocation option has been specified or not.)
Rule 2
If the assembler does not find a hole large enough to contain the
requested space, it checks to see whether the blocking option is requested.
- If you do not request blocking, the memory is allocated at the
current SPC.
- If you request blocking, the assembler checks to see whether
there is enough space between the current SPC and the page
boundary. If there is not enough space, the assembler creates
another hole and allocates the space at the beginning of the
next page.
4-30
Reserve Space in the .bss Section
.bss
The blocking option allows you to reserve up to 128 words in the .bss section
and ensure that they fit on one page of memory. (Of course, you can reserve
more than 128 words at a time, but they cannot fit on a single page.) The following example code reserves two blocks of space in the .bss section.
memptr:
memptr1:
.bss
.bss
A,64,1
B,70,1
Each block must be contained within the boundaries of a single page; after the
first block is allocated, however, the second block cannot fit on the current
page. As Figure 4–5 shows, the second block is allocated on the next page.
Figure 4–5. Allocating .bss Blocks Within a Page
Memory
0 a
Memory allocated by first .bss directive; 64 words left in the first page
Page
boundary 127
Hole in memory left because second
.bss directive required more than 64
words
b
Memory allocated by second .bss directive; 58 words left in the second
page
Unused memory
256
Section directives for initialized sections (.text, .data, and .sect) end the current section and begin assembling into another section. The .bss directive,
however, does not affect the current section. The assembler assembles the
.bss directive and then resumes assembling code into the current section. For
more
information
about
COFF
sections,
see
Chapter
2,
Introduction to Common Object File Format.
Assembler Directives
4-31
.bss
Reserve Space in the .bss Section
Example
In this example, the .bss directive is used to allocate space for two variables,
TEMP and ARRAY. The symbol TEMP points to 4 words of uninitialized space
(at .bss SPC = 0). The symbol ARRAY points to 100 words of uninitialized
space (at .bss SPC = 04h); this space must be allocated contiguously within
a page. Note that symbols declared with the .bss directive can be referenced
in the same manner as other symbols and can also be declared external.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
*******************************************
** Assemble into the .text section.
**
*******************************************
000000
.text
000000 e800
LD
#0, A
*******************************************
** Allocate 4 words in .bss for TEMP.
**
*******************************************
000000
Var_1: .bss
TEMP, 4
*******************************************
**
Still in .text
**
*******************************************
f000
ADD
#56h, A
0056
f066
MPY
#73h, A
0073
000001
000002
15 000003
000004
16
17
*******************************************
18
** Allocate 100 words in .bss for the
**
19
** symbol named ARRAY; this part of
**
20
** .bss must fit on a single page.
**
21
*******************************************
22 0000004
.bss
ARRAY, 100, 1
23
24
*******************************************
25
** Assemble more code into .text.
**
26
*******************************************
27 000005 8000–
STL
A, Var_1
28
29
*******************************************
30
** Declare external .bss symbols.
**
31
*******************************************
32
.global ARRAY, TEMP
33
.end
4-32
Initialize Bytes
.byte
Syntax
.byte value1 [, ... , valuen ]
.ubyte value1 [, ... , valuen ]
.char value1 [, ... , valuen ]
.uchar value1 [, ... , valuen ]
Description
The .byte, .ubyte, .char, and .uchar directives place one or more bytes into
consecutive words of the current section. Each byte is placed in a word by
itself; the 8 MSBs are filled with 0s. A value can be:
- An expression that the assembler evaluates and treats as an 8-bit signed
or unsigned number
- A character string enclosed in double quotes. Each character in a string
represents a separate value.
Values are not packed or sign-extended; each byte occupies the 8 least significant bits of a full 16-bit word. The assembler truncates values greater than 8
bits. You can use up to 100 value parameters, but the total line length cannot
exceed 200 characters.
If you use a label, it points to the location where the assembler places the first
byte.
Note that when you use these directives in a .struct/.endstruct sequence, they
define a member’s size; they do not initialize memory. For more information
about .struct/.endstruct, see Section 4.9, Assembly-Time Symbol Directives,
on page 4-21.
Example
In this example, 8-bit values (10, –1, abc, and a) are placed into consecutive
words in memory. The label strx has the value 100h, which is the location of
the first initialized word.
1 0000
2 000100
000101
000102
000103
000104
000105
000a
00ff
0061
0062
0063
0061
STRX
.space
.byte
100h * 16
10, –1, ”abc”, ’a’
Assembler Directives
4-33
.clink
Conditionally Leave Section Out of COFF Output
Syntax
.clink [”section name“]
Description
The .clink directive sets up conditional linking for a section by setting the
STYP_CLINK flag in the type field for section name. The .clink directive can
be applied to initialized or uninitialized sections.
If .clink is used without a section name, it applies to the current initialized
section. If .clink is applied to an uninitialized section, the section name is
required. The section name is significant to 200 characters and must be enclosed in double quotes. A section name can contain a subsection name in the
form of section name:subsection name.
The STYP_CLINK flag tells the linker to leave the section out of the final COFF
output of the linker if there are no references found to any symbol in the
section.
A section in which the entry point of a C program is defined cannot be marked
as a conditionally linked section.
Example
In this example, the Vars and Counts sections are set for conditional linking.
1 000000
.sect ”Vars”
2
; Vars section is conditionally linked
3
.clink
4
5 000000 001A X:
.word 01Ah
6 000001 001A Y:
.word 01Ah
7 000002 001A Z:
.word 01Ah
8 000000
.sect ”Counts”
9
; Counts section is conditionally linked
10
.clink
11
12 000000 001A Xcount: .word 01Ah
13 000001 001A Ycount: .word 01Ah
14 000002 001A Zcount: .word 01Ah
15
; By default, .text is unconditionally linked
16 000000
.text
17
; Reference to symbol X cause the Vars section
18
; to be linked into the COFF output
19 000000 E800
LD #0, A
20 000001 8000+
STL A, X
4-34
Specify C Runtime Environment
.c_mode
Syntax
.c_mode
Description
The .c_mode directive is generated as a header for any assembly file created
by the C compiler.
This directive works primarily in conjunction with the –mf assembler option or
the .far_mode directive to facilitate linking a program that uses extended
addressing.
If your program uses extended addressing, but your assembly code was not
generated by the C compiler, you should add the .c_mode directive to your
assembly files.
Assembler Directives
4-35
.copy/.include
Read Source File
Syntax
.copy [”]filename[”]
.include [”]filename[”]
Description
The .copy and .include directives tell the assembler to read source statements from a different file. The statements that are assembled from a copy file
are printed in the assembly listing. The statements that are assembled from
an included file are not printed in the assembly listing, regardless of the number of .list/.nolist directives assembled. The assembler:
1) Stops assembling statements in the current source file.
2) Assembles the statements in the copied/included file.
3) Resumes assembling statements in the main source file, starting with the
statement that follows the .copy or .include directive.
The filename is a required parameter that names a source file. It may be enclosed in double quotes and must follow operating system conventions. You
can specify a full pathname (for example, c:\dsp\file1.asm). If you do not specify a full pathname, the assembler searches for the file in:
1) The directory that contains the current source file.
2) Any directories named with the –i assembler option.
3) Any directories specified by the environment variable A_DIR.
For more information about the –i option and A_DIR, see Section 3.4, Naming
Alternate Directories for Assembler Input, on page 3-8.
The .copy and .include directives can be nested within a file being copied or
included. The assembler limits nesting to 32 levels; the host operating system
may set additional restrictions. The assembler precedes the line numbers of
copied files with a letter code to identify the level of copying. An A indicates the
first copied file, B indicates a second copied file, etc.
4-36
Read Source File
Example 1
.copy/.include
In this example, the .copy directive is used to read and assemble source statements from other files; then the assembler resumes assembling into the current file.
The original file, copy.asm, contains a .copy statement copying the file
byte.asm. When copy.asm assembles, the assembler copies byte.asm into its
place in the listing (note listing below). The copy file byte.asm contains a .copy
statement for a second file, word.asm.
When it encounters the .copy statement for word.asm, the assembler switches
to word.asm to continue copying and assembling. Then the assembler returns
to its place in byte.asm to continue copying and assembling. After completing
assembly of byte.asm, the assembler returns to copy.asm to assemble its remaining statement.
copy.asm
(source file)
byte.asm
(first copy file)
.space 29
.copy ”byte.asm”
** In byte.asm
.byte 32,1+ ’A’
.copy ”word.asm”
** Back in byte.asm
.byte 67h + 3q
**Back in original file
.pstring ”done”
word.asm
(second copy file)
** In word.asm
.word 0ABCDh, 56q
Listing file:
A
A
A
B
B
A
A
1 000000
.space 29
2
.copy ”byte.asm”
1
** In byte.asm
2 000002 0020
.byte 32,1+ ’A’
000003 0042
3
.copy ”word.asm”
1
* In word.asm
2 000004 ABCD
.word 0ABCDh, 56q
000005 002E
4
** Back in byte.asm
5 000006 006A
.byte 67h + 3q
3
4
** Back in original file
5 000007 646F
.pstring ”done”
000008 6E65
Assembler Directives
4-37
.copy/.include
Read Source File
Example 2
In this example, the .include directive is used to read and assemble source
statements from other files; then the assembler resumes assembling into the
current file. The mechanism is similar to the .copy directive, except that statements are not printed in the listing file.
include.asm
(source file)
byte2.asm
(first include file)
.space 29
.include ”byte2.asm”
** In byte2.asm
word2.asm
(second include file)
** In word2.asm
.byte 32,1+ ’A’
.include ”word2.asm”
** Back in byte2.asm
.byte 67h + 3q
**Back in original file
.string ”done”
Listing file:
1 000000
.space 29
2
.include ”byte2.asm”
3
4
** Back in original file
5 000007 0064
.string ”done”
000008 006F
000009 006E
00000a 0065
4-38
Assign Character Strings to Substitution Symbols
.data
Syntax
.data
Description
The .data directive tells the assembler to begin assembling source code into
the .data section; .data becomes the current section. The .data section is
normally used to contain tables of data or preinitialized variables.
The assembler assumes that .text is the default section. Therefore, at the
beginning of an assembly, the assembler assembles code into the .text section
unless you use a section control directive.
For more information about COFF sections,
Introduction to Common Object File Format.
Example
see
Chapter
2,
In this example, code is assembled into the .data and .text sections.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
000000
000000
*******************************************
** Reserve space in .data.
**
*******************************************
.data
.space
0CCh
*******************************************
** Assemble into .text.
**
*******************************************
000000
.text
0000 INDEX
.set
0
000000 e800
LD
#INDEX, A
*******************************************
** Assemble into .data.
**
*******************************************
00000c
Table: .data
00000d ffff
.word
–1
; Assemble 16–bit
; constant into .data.
00000e 00ff
.byte
0FFh ; Assemble 8–bit
; constant into .data.
*******************************************
** Assemble into .text.
**
*******************************************
000001
.text
000001 000c”
ADD
Table, A
00000f
*******************************************
** Resume assembling into the .data
**
** section at address 0Fh.
**
*******************************************
.data
Assembler Directives
4-39
.double/.ldouble
Initialize Double-Precision Floating-Point Value
Syntax
.double value [, ... , valuen ]
.ldouble value [, ... , valuen ]
Description
The .double and .ldouble directives place the IEEE single-precision floatingpoint representation of one or more floating-point values into the current
section. Each value must be a floating-point constant or a symbol that has
been equated to a floating-point constant. Each constant is converted to a
floating-point value in IEEE single-precision 32-bit format. Floating-point
constants are aligned on a word boundary.
The value consists of three fields:
Field
Meaning
s
A 1-bit sign field
e
An 8-bit biased exponent
f
A 23-bit fraction
The value is stored most significant word first, least significant word second,
in the following format:
31 30
s
23 22
e
0
f
When you use .double or .ldouble in a .struct/.endstruct sequence, the
directives define a member’s size; they do not initialize memory. For more
information about .struct/ .endstruct, see Section 4.9, Assembly-Time Symbol
Directives, on page 4-21.
Example
This example shows the .double and .ldouble directives.
1 000000
000001
2 000002
000003
4-40
E904
5951
43E4
0000
.double
–1.0e25
.ldouble
456.0
Controls Listing of Directives
.drlist/.drnolist
Syntax
.drlist
.drnolist
Description
Two directives enable you to control the printing of assembler directives to the
listing file:
The .drlist directive enables the printing of all directives to the listing file.
The .drnolist directive suppresses the printing of the following directives to the
listing file:
- .asg
- .fcnolist
- .ssnolist
- .break
- .mlist
- .var
- .emsg
- .mmsg
- .wmsg
- .eval
- .mnolist
- .fclist
- .sslist
By default, the assembler acts as if the .drlist directive had been specified.
Example
This example shows how .drnolist inhibits the listing of the specified directives:
Source file:
.asg
0, x
.loop
2
.eval
x+1, x
.endloop
.drnolist
.asg
1, x
.loop
3
.eval
x+1, x
.endloop
Listing file:
1
2
3
4
1
1
5
6
7
9
10
11
.asg
0, x
.loop
2
.eval
x+1, x
.endloop
.eval
0+1, x
.eval
1+1, x
.drnolist
.loop
3
.eval
x+1, x
.endloop
Assembler Directives
4-41
.emsg/.mmsg/.wmsg
Define Messages
Syntax
.emsg string
.mmsg string
.wmsg string
Description
These directives allow you to define your own error and warning messages.
The assembler tracks the number of errors and warnings it encounters and
prints these numbers on the last line of the listing file.
The .emsg directive sends error messages to the standard output device in
the same manner as the assembler, incrementing the error count and preventing the assembler from producing an object file.
The .mmsg directive sends assembly-time messages to the standard output
device in the same manner as the .emsg and .wmsg directives, but it does not
set the error or warning counts, and it does not prevent the assembler from
producing an object file.
The .wmsg directive sends warning messages to the standard output device
in the same manner as the .emsg directive, but it increments the warning count
rather than the error count, and it does not prevent the assembler from producing an object file.
Example
In this example. the message ERROR –– MISSING PARAMETER is sent to
the standard output device.
Source file:
MSG_EX
.global
PARAM
.macro parm1
.if
$symlen(parm1) = 0
.emsg ”ERROR –– MISSING PARAMETER”
.else
add
parm1, A
.endif
.endm
MSG_EX PARAM
MSG_EX
4-42
Define Messages
.emsg/.mmsg/.wmsg
Listing file:
1
.global PARAM
2
MSG_EX .macro parm1
3
.if
$symlen(parm1) = 0
4
.emsg
”ERROR –– MISSING PARAMETER”
5
.else
6
add
parm1, A
7
.endif
8
.endm
9
10 000000
MSG_EX PARAM
.if
$symlen(parm1) = 0
.emsg
”ERROR –– MISSING PARAMETER“
.else
000000 0000!
add
PARAM, A
.endif
11
12 000001
MSG_EX
.if
$symlen(parm1) = 0
.emsg
”ERROR –– MISSING PARAMETER”
***** USER ERROR ***** – : ERROR –– MISSING PARAMETER
.else
add
parm1, A
.endif
1
1
1
1
1
1
1
1
1
1
1 Error, No Warnings
In addition, the following messages are sent to standard output by the
assembler:
TMS32055xx COFF Assembler
Version x.xx
Copyright (c) 2001
Texas Instruments Incorporated
PASS 1
PASS 2
“emsg.asm”, ERROR! at line 12: [***** USER ERROR ***** –] ERROR –– MISSING
PARAMETER
.emsg ”ERROR –– MISSING PARAMETER”
1 Error,
No Warnings
Errors in source – Assembler Aborted
Assembler Directives
4-43
.end
End Assembly
Syntax
.end
Description
The .end directive is optional and terminates assembly. It should be the last
source statement of a program. The assembler ignores any source statements
that follow a .end directive.
This directive has the same effect as an end-of-file character. You can use .end
when you’re debugging and would like to stop assembling at a specific point
in your code.
Example
This example shows how the .end directive terminates assembly. If any source
statements follow the .end directive, the assembler ignores them.
Source File:
START:
TEMP
.space
.set
.bss
ABS
ADD
STL
.end
.byte
.word
300
15
LOC1, 48h
A
#TEMP, A
A, LOC1
4
CCCh
Listing file:
1
2
3
4
5
000000
000000
000013
000014
000015
6 000016
7
4-44
000F
F485
F000
000F
8000–
START:
TEMP
.space
.set
.bss
ABS
ADD
STL
.end
300
15
LOC1, 48h
A
#TEMP, A
A, LOC1
Specify Far Calls and Branches
.far_mode
Syntax
.far_mode
Description
The .far_mode directive tells the assembler that the assembly file uses
extended addressing: calls and branches extend beyond the normal 16-bit
range. This directive has the same effect as using the –mf assembler option.
If your program uses extended addressing, and your assembly code was not
generated by the C compiler, you should add the .c_mode directive to your
assembly files.
Assembler Directives
4-45
.fclist/.fcnolist
Control the Listing of False Conditional Blocks
Syntax
.fclist
.fcnolist
Description
Two directives enable you to control the listing of false conditional blocks.
The .fclist directive allows the listing of false conditional blocks (conditional
blocks that do not produce code).
The .fcnolist directive suppresses the listing of false conditional blocks until
a .fclist directive is encountered. With .fcnolist, only code in conditional blocks
that are actually assembled appears in the listing. The .if, .elseif, .else, and
.endif directives do not appear.
By default, all conditional blocks are listed; the assembler acts as if the .fclist
directive had been used.
Example
This example shows the assembly language and listing files for code with and
without the conditional blocks listed:
Source File:
AAA
BBB
.set 1
.set 0
.fclist
.if
AAA
ADD
#1024, A
.else
ADD
#1024*10, A
.endif
.fcnolist
.if
AAA
ADD
#1024, A
.else
ADD
#1024*10, A
.endif
Listing file:
1
2
3
4
5 000000
000001
6
7
8
9
10
11
13 000002
000003
4-46
0001
0000
F000
0400
AAA
BBB
.set 1
.set 0
.fclist
.if
AAA
ADD
#1024, A
.else
ADD
#1024*10, A
.endif
.fcnolist
F000
0400
ADD
#1024, A
Initialize Field
.field
Syntax
.field value [, size in bits]
Description
The .field directive can initialize multiple-bit fields within a single word of
memory. This directive has two operands:
- The value is a required parameter; it is an expression that is evaluated and
placed in the field. If the value is relocatable, size must be 16.
- The size is an optional parameter; it specifies a number from 1 to 32, which
is the number of bits in the field. If you do not specify a size, the assembler
assumes that the size is 16 bits. If you specify a size of 16 or more, the field
will start on a word boundary. If you specify a value that cannot fit into size
bits, the assembler truncates the value and issues an error message. For
example, .field 3,1 causes the assembler to truncate the value 3 to 1; the
assembler also prints the message:
***warning – value truncated.
Successive .field directives pack values into the specified number of bits starting at the current word. Fields are packed starting at the most significant part
of the word, moving toward the least significant part as more fields are added.
If the assembler encounters a field size that does not fit into the current word,
it writes out the word, increments the SPC, and begins packing fields into the
next word. You can use the .align directive with an operand of 1 to force the
next .field directive to begin packing into a new word.
If you use a label, it points to the word that contains the specified field.
When you use .field in a .struct/.endstruct sequence, .field defines a member’s
size; it does not initialize memory. For more information about .struct/
.endstruct, see Section 4.9, Assembly-Time Symbol Directives, on page 4-21.
Assembler Directives
4-47
.field
Initialize Field
Example
This example shows how fields are packed into a word. Notice that the SPC
does not change until a word is filled and the next word is begun.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
4-48
************************************
**
Initialize a 14–bit field. **
************************************
000000 2AF0
.field 0ABCh, 14
************************************
**
Initialize a 5–bit field
**
**
in a new word.
**
************************************
000001 5000 L_F:
.field 0Ah, 5
***********************************
**
Initialize a 4–bit field
**
**
in the same word.
**
************************************
000001 5600 x:
.field 0Ch, 4
************************************
**
16–bit relocatable field
**
**
in the next word.
**
************************************
000002 0001’
.field x
************************************
**
Initialize a 32–bit field.
**
************************************
000003 0000
.field 04321h, 32
000004 4321
Initialize Field
.field
Figure 4–6 shows how the directives in this example affect memory.
Figure 4–6. The .field Directive
Word
(a) 0
15
0 0 1 0 1 0 1 0 1 1 1 1 0 0
Code
0
.field 0ABCh, 14
14-bit field
(b) 0
1
0 0 1 0 1 0 1 0 1 1 1 1 0 0
0 0
.field
00Ah, 5
.field
000Ch, 4
0 1 0 1 0
5-bit field
(c) 1
0 1 0 1 0
1 1 0 0
4-bit field
(d) 1
0 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0
2
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
(e) 3
4
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
.field x
.field 04321,32
0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1
Assembler Directives
4-49
.float/.xfloat
Initialize Floating-Point Value
Syntax
.float value1 [, ... , valuen ]
.xfloat value1 [, ... , valuen ]
Description
The .float and .xfloat directives place the floating-point representation of one
or more floating-point constants into the current data section. The value must
be a floating-point constant or a symbol that has been equated to a floatingpoint constant. Each constant is converted to a floating-point value in IEEE
single-precision 32-bit format. Floating-point constants are aligned on the
long-word boundaries unless the .xfloat directive is used. The .xfloat directive
performs the same function as the .float directive but does not align the result
on the long word boundary.
The 32-bit value consists of three fields:
Field
Meaning
s
A 1-bit sign field
e
An 8-bit biased exponent
f
A 23-bit mantissa
The value is stored most significant word first, least significant word second,
in the following format:
31 30
s
23 22
e
0
f
When you use .float in a .struct/.endstruct sequence, .float defines a member’s
size; it does not initialize memory. For more information about .struct/
.endstruct, see Section 4.9, Assembly-Time Symbol Directives, on page 4-21.
Example
This example shows the .float directive.
1 000000
000001
2 000002
000003
3 000004
000005
4-50
E904
5951
4040
0000
42F6
0000
.float
–1.0e25
.float
3
.float
123
Identify Global Symbols
.global/.def/.ref
Syntax
.global symbol1 [, ... , symboln ]
.def symbol1 [, ... , symboln ]
.ref symbol1 [, ... , symboln ]
Description
The .global, .def, and .ref directives identify global symbols, which are
defined externally or can be referenced externally.
The .def directive identifies a symbol that is defined in the current module and
can be accessed by other files. The assembler places this symbol in the symbol table.
The .ref directive identifies a symbol that is used in the current module but
defined in another module. The linker resolves this symbol’s definition at link
time.
The .global directive acts as a .ref or a .def, as needed.
A global symbol is defined in the same manner as any other symbol; that is,
it appears as a label or is defined by the .set, .bss, or .usect directive. As with
all symbols, if a global symbol is defined more than once, the linker issues a
multiple-definition error. .ref always creates a symbol table entry for a symbol,
whether the module uses the symbol or not; .global, however, creates an entry
only if the module actually uses the symbol.
A symbol may be declared global for two reasons:
- If the symbol is not defined in the current module (including macro, copy,
and include files), the .global or .ref directive tells the assembler that the
symbol is defined in an external module. This prevents the assembler from
issuing an unresolved reference error. At link time, the linker looks for the
symbol’s definition in other modules.
- If the symbol is defined in the current module, the .global or .def directive
declares that the symbol and its definition can be used externally by other
modules. These types of references are resolved at link time.
Example
This example shows four files:
file1.lst and file3.lst are equivalent. Both files define the symbol Init and make
it available to other modules; both files use the external symbols x, y, and z.
file1.lst uses the .global directive to identify these global symbols; file3.lst uses
.ref and .def to identify the symbols.
file2.lst and file4.lst are equivalent. Both files define the symbols x, y, and z
and make them available to other modules; both files use the external symbol
Init. file2.lst uses the .global directive to identify these global symbols; file4.lst
uses .ref and .def to identify the symbols.
Assembler Directives
4-51
.global/.def/.ref
Identify Global Symbols
file1.lst:
1
; Global symbol defined in this file
2
.global INIT
3
; Global symbols defined in file2.lst
4
.global X, Y, Z
5 000000
INIT:
6 000000 F000
ADD
#56h, A
000001 0056
7 000002 0000!
.word
X
8
;
.
9
;
.
10
;
.
11
.end
file2.lst:
1
2
3
4
5
6
7
8 000000
9
10
11
12
; Global symbols defined in this file
.global X, Y, Z
; Global symbol defined in file1.lst
.global INIT
0001 X:
.set
1
0002 Y:
.set
2
0003 Z:
.set
3
0000!
.word
INIT
;
.
;
.
;
.
.end
file3.lst:
1
; Global symbol defined in this file
2
.def
INIT
3
; Global symbols defined in file4.lst
4
.ref
X, Y, Z
5 000000
INIT:
6 000000 F000
ADD
#56h, A
000001 0056
7 000002 0000!
.word
X
8
;
.
9
;
.
10
;
.
11
.end
4-52
Identify Global Symbols
.global/.def/.ref
file4.lst:
1
2
3
4
5
6
7
8 000000
9
10
11
12
; Global symbols defined in this file
.def
X, Y, Z
; Global symbol defined in file3.lst
.ref
INIT
0001 X:
.set
1
0002 Y:
.set
2
0003 Z:
.set
3
0000!
.word
INIT
;
.
;
.
;
.
.end
Assembler Directives
4-53
.half/.uhalf/.short/.ushort
Initialize 16-bit Integer
Syntax
.half value1 [, ... , valuen ]
.uhalf value1 [, ... , valuen ]
.short value1 [, ... , valuen ]
.ushort value1 [, ... , valuen ]
Description
The .half, .uhalf, .short, and .ushort directives place one or more values into
consecutive 16-bit fields in the current section. A value can be:
- An expression that the assembler evaluates and treats as an 16-bit signed
or unsigned number
- A character string enclosed in double quotes. Each character in a string
represents a separate value.
The values can be either absolute or relocatable expressions. If an expression
is relocatable, the assembler generates a relocation entry that refers to the
appropriate symbol; the linker can then correctly patch (relocate) the reference. This allows you to initialize memory with pointers to variables or labels.
The assembler truncates values greater than 16 bits. You can use as many
values as fit on a single line, but the total line length cannot exceed 200 characters. If you use a label, it points to the first initialized word.
When you use .half, .uhalf, .short, or .ushort in a .struct/.endstruct sequence,
they define a member’s size; they do not initialize memory. For more
information about .struct/.endstruct, see Section 4.9, Assembly-Time Symbol
Directives, on page 4-21.
4-54
Initialize 16-bit Integer
Example
.half/.uhalf/.short/.ushort
In this example, the .half directive is used to place 16-bit values (10, –1, abc,
and a) into memory; .short is used to place 16-bit values (8, –3, def, and b) into
memory. The label STRN has the value 106h, which is the location of the first
initialized word.
1 000000
2
3 000100 000A
000101 FFFF
000102 0061
000103 0062
000104 0063
000105 0061
4 000106 0008
000107 FFFD
000108 0064
000109 0065
00010a 0066
00010b 0062
5
.space 100h * 16
.half
STRN
.short
10, –1, ”abc”, ’a’
8, –3, ”def”, ’b’
Assembler Directives
4-55
.if/.elseif/.else/.endif
Assign Character Strings to Substitution Symbols
Syntax
.if well-defined expression
.elseif well-defined expression
.else
.endif
Description
The following directives provide conditional assembly:
The .if directive marks the beginning of a conditional block. The well-defined
expression is a required parameter, and must be entirely specified on the
same line as the directive.
- If the expression evaluates to true (nonzero), the assembler assembles
the code that follows the expression (up to a .elseif, .else, or .endif).
- If the expression evaluates to false (0), the assembler assembles code
that follows a .elseif (if present), .else (if present), or .endif (if no .elseif or
.else is present).
The .elseif directive identifies a block of code to be assembled when the .if
expression is false (0) and the .elseif expression is true (nonzero). When the
.elseif expression is false, the assembler continues to the next .elseif (if present), .else (if present) or .endif (if no .elseif or .else is present). The .elseif directive is optional in the conditional blocks, and more than one .elseif can be
used. If an expression is false and there is no .elseif statement, the assembler
continues with the code that follows a .else (if present) or a .endif.
The .else directive identifies a block of code that the assembler assembles
when the .if expression and all .elseif expressions are false (0). This directive
is optional in the conditional block; if an expression is false and there is no .else
statement, the assembler continues with the code that follows the .endif.
The .endif directive terminates a conditional block.
The .elseif and .else directives can be used in the same conditional assembly
block and the .elseif directive can be used more than once within a conditional
assembly block.
For information about relational operators, see subsection 3.9.4, Conditional
Expressions, on page 3-27.
4-56
Assemble Conditional Blocks
Example
.if/.elseif/.else/.endif
This example shows conditional assembly.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SYM1
SYM2
SYM3
SYM4
.set
.set
.set
.set
1
2
3
4
If_4: .if
.byte
.else
.byte
.endif
SYM4 = SYM2 * SYM2
SYM4
; Equal values
If_5: .if
.byte
.else
.byte
.endif
SYM1 <= 10
10
; Less than / equal
If_6: .if
.byte
.else
000002 0008
.byte
.endif
SYM3 * SYM2 != SYM4 + SYM2
SYM3 * SYM2 ; Unequal value
000000 0004
000001 000a
SYM2 * SYM2 ; Unequal values
SYM1
; Greater than
SYM4 + SYM4
; Equal values
If_7: .if SYM1 = 2
.byte
SYM1
.elseif SYM2 + SYM3 = 5
000003 0005
.byte
SYM2 + SYM3
.endif
Assembler Directives
4-57
.int/.uint/.word/.uword
Initialize 16-bit Integer
Syntax
.int value1 [, ... , valuen ]
.uint value1 [, ... , valuen ]
.word value1 [, ... , valuen ]
.uword value1 [, ... , valuen ]
Description
The .int, .uint, .word, and .uword directives are equivalent; they place one
or more values into consecutive 16-bit fields in the current section. A value can
be either:
- An expression that the assembler evaluates and treats as an 16-bit signed
or unsigned number
- A character string enclosed in double quotes. Each character in a string
represents a separate value.
The values can be either absolute or relocatable expressions. If an expression
is relocatable, the assembler generates a relocation entry that refers to the
appropriate symbol; the linker can then correctly patch (relocate) the reference. This allows you to initialize memory with pointers to variables or labels.
You can use as many values as fit on a single line (200 characters). If you use
a label, it points to the first word that is initialized.
When you use these directives in a .struct/.endstruct sequence, they define
a member’s size; they do not initialize memory. For more information about
.struct/.endstruct, see Section 4.9, Assembly-Time Symbol Directives, on
page 4-21.
4-58
Initialize 16-bit Integer
Example 1
In this example, the .int directive is used to initialize words.
1
2
3
4
5
Example 2
.int/.uint/.word/.uword
000000
000000
000080
000008
000009
00000a
00000b
00000c
00000d
.space
.bss
.bss
E856 INST: LD
000A
.int
0080–
FFFF
0084
0008’
73h
PAGE, 128
SYMPTR, 3
#056h, A
10, SYMPTR, –1, 35 + ’a’, INST
In this example, the .word directive is used to initialize words. The symbol
WordX points to the first word that is reserved.
1 000000
000001
000002
000003
0C80
4143
FF51
0058
WORDX: .word
3200, 1 + ’AB’, –0AFh, ’X’
Assembler Directives
4-59
.label
Create a Relocatable Label
Syntax
.label symbol
Description
The .label directive defines a special symbol that refers to the loadtime
address rather than the runtime address within the current section. Most sections created by the assembler have relocatable addresses. The assembler
assembles each section as if it started at 0, and the linker relocates it to the
address at which it loads and runs.
For some applications, it is desirable to have a section load at one address and
run at a different address. For example, you may wish to load a block of performance-critical code into slower off-chip memory to save space, and then move
the code to high-speed on-chip memory to run it.
Such a section is assigned two addresses at link time: a load address and a
run address. All labels defined in the section are relocated to refer to the runtime address so that references to the section (such as branches) are correct
when the code runs.
The .label directive creates a special label that refers to the loadtime address.
This function is useful primarily to designate where the section was loaded for
purposes of the code that relocates the section.
Example
This example shows the use of a loadtime address label.
.sect ”.EXAMP”
.label EXAMP_LOAD ;
START:
;
<code>
FINISH:
;
.label EXAMP_END ;
load address of section.
run address of section.
run address of section end.
load address of section end.
For more information about assigning runtime and loadtime addresses in the
linker, see Section 7.9, Specifying a Section’s Runtime Address, on page 7-44.
4-60
Set Listing Page Size
.length/.width
Syntax
.length page length
.width page width
Description
The .length directive sets the page length of the output listing file. It affects the
current and following pages. You can reset the page length with another
.length directive.
- Default length: 60 lines
- Minimum length: 1 line
- Maximum length: 32 767 lines
The .width directive sets the page width of the output listing file. It affects the
next line assembled and the lines following; you can reset the page width with
another .width directive.
- Default width: 80 characters
- Minimum width: 80 characters
- Maximum width: 200 characters
The width refers to a full line in a listing file; the line counter value, SPC value,
and object code are counted as part of the width of a line. Comments and other
portions of a source statement that extend beyond the page width are truncated in the listing.
The assembler does not list the .width and .length directives.
Example
In this example, the page length and width are changed.
*********************************************
**
Page length = 65 lines.
**
**
Page width = 85 characters.
**
*********************************************
.length
65
.width
85
*********************************************
**
Page length = 55 lines.
**
**
Page width = 100 characters.
**
*********************************************
.length
55
.width
100
Assembler Directives
4-61
.list/.nolist
Start/Stop Source Listing
Syntax
.list
.nolist
Description
Two directives enable you to control the printing of the source listing:
- The .list directive allows the printing of the source listing.
- The .nolist directive suppresses the source listing output until a .list
directive is encountered. The .nolist directive can be used to reduce
assembly time and the source listing size. It can be used in macro definitions to suppress the listing of the macro expansion.
The assembler does not print the .list or .nolist directives or the source statements that appear after a .nolist directive. However, it continues to increment
the line counter. You can nest the .list /.nolist directives; each .nolist needs a
matching .list to restore the listing.
By default, the source listing is printed to the listing file; the assembler acts as
if the .list directive had been specified. However, if you don’t request a listing
file when you invoke the assembler, the assembler ignores the .list directive.
Example
4-62
This example shows how the .copy directive inserts source statements from
another file. The first time this directive is encountered, the assembler lists the
copied source lines in the listing file. The second time this directive is encountered, the assembler does not list the copied source lines, because a .nolist
directive was assembled. Note that the .nolist, the second .copy, and the .list
directives do not appear in the listing file. Note also that the line counter is
incremented, even when source statements are not listed.
Start/Stop Source Listing
.list/.nolist
Source file:
.copy ”copy2.asm”
* Back in original file
NOP
.nolist
.copy ”copy2.asm”
.list
* Back in original file
.string ”Done”
Listing file:
A
A
1
1
2 000000
000001
2
3 000002
7
8 000005
000006
000007
000008
.copy
”copy2.asm”
* In copy2.asm (copy file)
0020
.word 32, 1 + ’A’
0042
* Back in original file
F495
NOP
* Back in original file
0044
.string ”Done”
006F
006E
0065
Assembler Directives
4-63
.long/.ulong/.xlong
Initialize Long Word
Syntax
.long value1 [, ... , valuen ]
.ulong value1 [, ... , valuen ]
.xlong value1 [, ... , valuen ]
Description
The .long, .ulong, and .xlong directives place one or more 32-bit values into
consecutive words in the current section. The most significant word is stored
first. The .long and .ulong directives align the result on the long word boundary,
while the .xlong directive does not. A value can be:
- An expression that the assembler evaluates and treats as an 32-bit signed
or unsigned number
- A character string enclosed in double quotes. Each character in a string
represents a separate value.
The value operand can be either an absolute or relocatable expression. If an
expression is relocatable, the assembler generates a relocation entry that refers to the appropriate symbol; the linker can then correctly patch ( relocate)
the reference. This allows you to initialize memory with pointers to variables
or with labels.
You can use up to 100 values, but they must fit on a single source statement
line. If you use a label, it points to the first word that is initialized.
When you use the directives in a .struct /.endstruct sequence, they define a
member’s size; they do not initialize memory. For more information about
.struct/ .endstruct, see Section 4.9, Assembly-Time Symbol Directives, on
page 4-21.
4-64
Initialize Long Word
Example
.long/.ulong/.xlong
This example shows how the .long and .xlong directives initialize double
words.
1 000000
000001
000002
000003
000004
000005
000006
000007
2 000008
000009
00000a
00000b
3 00000c
0000 DAT1: .long 0ABCDh, ’A’ + 100h, ’g’, ’o’
ABCD
0000
0141
0000
0067
0000
006F
0000’
.xlong DAT1, 0AABBCCDDh
0000
AABB
CCDD
DAT2:
Assembler Directives
4-65
.loop/.break/.endloop
Assign Character Strings to Substitution Symbols
Syntax
.loop [well-defined expression]
.break [well-defined expression]
.endloop
Description
Three directives enable you to repeatedly assemble a block of code.
The .loop directive begins a repeatable block of code. The optional expression
evaluates to the loop count (the number of times to repeat the assembly of the
code contained in the loop). If there is no expression, the loop count defaults
to 1024, unless the assembler first encounters a .break directive with an expression that is true (nonzero) or omitted.
The .break directive is optional, along with its expression. When the expression is false ( 0 ), the loop continues. When the expression is true ( nonzero),
or omitted, the assembler breaks the loop and assembles the code after the
.endloop directive.
The .endloop directive terminates a repeatable block of code; it executes
when the .break directive is true (nonzero) or when number of loops performed
equals the loop count given by .loop
Example
This example illustrates how these directives can be used with the .eval
directive.
1
2
3
4
5
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4-66
COEF
000000 0000
000001 0064
000002 00C8
000003 012C
000004 0190
000005 01F4
.eval
.loop
.word
.eval
.break
.endloop
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
.word
.eval
.break
0,x
x*100
x+1, x
x = 6
0*100
0+1, x
1 = 6
1*100
1+1, x
2 = 6
2*100
2+1, x
3 = 6
3*100
3+1, x
4 = 6
4*100
4+1, x
5 = 6
5*100
5+1, x
6 = 6
Define Macro
.macro
Syntax
macname
Description
.macro [parameter1 ] [, ... parametern ]
model statements or macro directives
.endm
The .macro directive is used to define macros.
You can define a macro anywhere in your program, but you must define the
macro before you can use it. Macros can be defined at the beginning of a
source file, in an .include/.copy file, or in a macro library.
macname
names the macro. You must place the name in the
source statement’s label field.
.macro
identifies the source statement as the first line of a
macro definition. You must place .macro in the opcode field.
[parameters]
are optional substitution symbols that appear as
operands for the .macro directive.
model statements
are instructions or assembler directives that are executed each time the macro is called.
macro directives
are used to control macro expansion.
.endm
terminates the macro definition.
Macros are explained in further detail in Chapter 5, “Macro Language”.
Assembler Directives
4-67
.mlib
Define Macro Library
Syntax
.mlib [”]filename[”]
Description
The .mlib directive provides the assembler with the name of a macro library.
A macro library is a collection of files that contain macro definitions. These files
are bound into a single file (called a library or archive) by the archiver. Each
member of a macro library may contain one macro definition that corresponds
to the name of the file. Macro library members must be source files (not object
files).
The filename of a macro library member must be the same as the macro name,
and its extension must be .asm. The filename must follow host operating system conventions; it may be enclosed in double quotes. You can specify a full
pathname (for example, c:\dsp\macs.lib). If you do not specify a full pathname,
the assembler searches for the file in:
1) The directory that contains the current source file
2) Any directories named with the –i assembler option
3) Any directories specified by the environment variable A_DIR
For more information about the –i option and the environment variable, see
Section 3.4, Naming Alternate Directories for Assembler Input, on page 3-8.
When the assembler encounters a .mlib directive, it opens the library and
creates a table of the library’s contents. The assembler enters the names of
the individual library members into the opcode table as library entries. This redefines any existing opcodes or macros that have the same name. If one of
these macros is called, the assembler extracts the entry from the library and
loads it into the macro table. The assembler expands the library entry in the
same way it expands other macros, but it does not place the source code into
the listing. Only macros that are actually called from the library are extracted,
and they are extracted only once.
4-68
Define Macro Library
Example
.mlib
This example creates a macro library that defines two macros, incr and decr.
The file incr.asm contains the definition of incr, and decr.asm contains the definition of decr.
incr.asm
* Macro for incrementing
incr .macro
ADD #1,A
ADD #1,B
.endm
decr.asm
* Macro for zero accumulators
decr .macro
SUB A,A
SUB B,B
.endm
Use the archiver to create a macro library:
ar500 –a mac incr.asm decr.asm
Now you can use the .mlib directive to reference the macro library and define
the incr and decr macros:
1
1
1
1
1
2 000000
000000
000001
3 000002
000002
000003
000004
000005
F420
F720
F000
0001
F300
0001
.mlib
”mac.lib”
decr
; Macro call
SUB A,A
SUB B,B
incr
; Macro call
ADD #1,A
ADD #1,B
Assembler Directives
4-69
.mlist/.mnolist
Start/Stop Expansion Listing
Syntax
.mlist
.mnolist
Description
Two directives enable you to control the listing of macro and repeatable block
expansions in the listing file:
- The .mlist directive allows macro and .loop/.endloop block expansions in
the listing file.
- The .mnolist directive suppresses macro and .loop/.endloop block
expansions in the listing file.
By default, the assembler behaves as if the .mlist directive had been specified.
Example
This example defines a macro named STR_3. The second time the macro is
called, the macro expansion is not listed, because a .mnolist directive was
assembled. The third time the macro is called, the macro expansion is listed,
because a .mlist directive was assembled.
1
1
4-70
1
2
3
4
5 000000
000000
000001
000002
000003
000004
000005
000006
000007
000008
000009
00000a
00000b
6
7 00000c
8
9 000018
000018
000019
00001a
00001b
00001c
00001d
00001e
00001f
000020
000021
000022
000023
STR_3
003A
0070
0031
003A
003A
0070
0032
003A
003A
0070
0033
003A
003A
0070
0031
003A
003A
0070
0032
003A
003A
0070
0033
003A
.macro
P1, P2, P3
.string ”:p1:”, ”:p2:”, ”:p3:”
.endm
STR_3 ”as”, ”I”, ”am”
.string ”:p1:”, ”:p2:”, ”:p3:”
.mnolist
STR_3 ”as”, ”I”, ”am”
.mlist
STR_3 ”as”, ”I”, ”am”
.string ”:p1:”, ”:p2:”, ”:p3:”
Assign Memory–Mapped Register Names as Global Symbols
.mmregs
Syntax
.mmregs
Description
The .mmregs directive defines global symbolic names for the C54x registers
and places them in the global symbol table. It is equivalent to executing AL .set
8, AH .set 9, etc. The symbols are local and absolute. Using the .mmregs
directive makes it unnecessary to define these symbols.
Table 4–2. Memory-Mapped Registers
Name
Hexadecimal
Address
Description
IMR
0000
Interrupt mask register
IFR
0001
Interrupt flag register
–
2–5
Reserved
ST0
0006
Status 0 register
ST1
0007
Status 1 register
AL
0008
A accumulator low (A [15:0])
AH
0009
A accumulator high (A [31:16])
AG
000A
A accumulator guard (A [39:32])
BL
000B
B accumulator low (B [15:0])
BH
000C
B accumulator high (B [31:16])
BG
000D
B accumulator guard (B [39:32])
T
000E
Temporary register
TRN
000F
Transition register
BK
0019
Circular size register
BRC
001A
Block repeat counter
RSA
001B
Block repeat start address
REA
001C
Block repeat end address
PMST
001D
PMST register
DRR0
0020
Data receive register 0
BDRR
0020
Data receive register
Note:
Duplication of address values in the table supports the different names of the registers
as they are implemented on different C54x devices.
Assembler Directives
4-71
.mmregs Assign Memory-Mapped Register Names as Global Symbols
Table 4–2. Memory-Mapped Registers (Continued)
Name
Hexadecimal
Address
Description
BDDR0
0020
BSP0 data receive register
DRR
0020
Data receive register
DXR0
0021
Data transmit register 0
BDXR
0021
Data transmit register
BDXR0
0021
Data transmit register
DXR
0021
Data transmit register
SPC0
0022
Serial port control register 0
BSPC
0022
Serial port control register
SPC
0022
Serial port control register
BSPCE
0023
BSP control extension register
BSPCE0
0023
BSP control extension register
SPCE
0023
BSP control extension register
TIM
0024
Timer register
PRD
0025
Period register
TCR
0026
Timer control register
PDWSR
0028
Program/data S/W wait-state register
SWWSR
0028
Program/data S/W wait-state register
IOWSR
0029
Bank-switching control register
BSCR
0029
Bank-switching control register
HPIC
002C
HPI control register
DRR1
0030
Data receive register 1
TRCV
0030
Data receive register
DXR1
0031
Data transmit register 1
TDXR
0031
Data transmit register
Note:
4-72
Duplication of address values in the table supports the different names of the registers
as they are implemented on different C54x devices.
Assign Memory-Mapped Register Names as Global Symbols
.mmregs
Table 4–2. Memory-Mapped Registers (Continued)
Name
Hexadecimal
Address
Description
SPC1
0032
Serial port control register 1
TSPC
0032
Serial port control register
TRAD
0035
TDM receive address register
AXR
0038
ABU transmit address register
TCSR
0033
TDM channel select register
TRTA
0034
TDM receive/transmit register
AXR0
0038
ABU transmit address register
ARX
0038
ABU transmit address register
BKX
0039
ABU transmit buffer size register
BKX0
0039
ABU transmit buffer size register
ARR
003A
ABU receive address register
ARR0
003A
ABU receive address register
BKR
003B
ABU receive buffer size register
AXR1
003C
ABU transmit address register
BKX1
003D
ABU transmit buffer size register
ARR1
003E
ABU receive address register
BKR1
003F
ABU receive buffer size register
BDRR1
0040
BSP data receive register
BDXR1
0041
Data transmit register
BSPC1
0042
BSP control register
BSPCE1
0043
BSP control extension register
CLKMD
0058
Clock modes register
XPC
001E
Extended memory map register
Note:
Duplication of address values in the table supports the different names of the registers
as they are implemented on different C54x devices.
Assembler Directives
4-73
.newblock
Terminate Local Symbol Block
Syntax
.newblock
Description
The .newblock directive undefines any local labels currently defined. Local
labels, by nature, are temporary; the .newblock directive resets them and
terminates their scope.
A local label is a label in the form $n, where n is a single decimal digit. A local
label, like other labels, points to an instruction word. Unlike other labels, local
labels cannot be used in expressions. Local labels are not included in the
symbol table.
After a local label has been defined and (perhaps) used, you should use the
.newblock directive to reset it. The .text, .data, and named sections also reset
local labels. Local labels that are defined within an include file are not valid outside of the local file.
Example
This example shows how the local label $1 is declared, reset, and then
declared again.
1
2
0076
3
4 000000 1000!
5 000001 F010
000002 0076
6 000003 F843
000004 0008’
7 000005 1000!
8 000006 F073
000007 0009’
9
10 000008 1000!
11 000009 0000!
12
13 00000a F843
00000b 000D’
14 00000c 8000!
15 00000d F495
4-74
B
.ref
.set
LABEL1: LD
SUB
$1
$2
$1
ADDRA, ADDRB, ADDRC
76h
ADDRA, A
#B, A
BC
$1, ALT
LD
B
ADDRB, A
$2
LD
ADDRA, A
ADD
ADDRC, A
.newblock ; Undefine $1 to reuse
BC
$1, ALT
STL
NOP
A, ADDRC
Control Remarks
.noremark/.remark
Syntax
.noremark [num]
.remark [num]
Description
The .noremark directive suppresses the assembler remark identified by num.
If num is not specified, all remarks will be suppressed. A remark is an informational assembler message that is less severe than a warning.
This directive is equivalent to using the –r[num] assembler option.
The .remark directive re-enables the remark(s) previously suppressed.
Assembler Directives
4-75
.option
Select Listing Options
Syntax
.option
Description
option list
The .option directive selects several options for the assembler output listing.
Option list is a list of options separated by vertical lines; each option selects
a listing feature. These are valid options:
B
limits the listing of .byte directives to one line.
L
limits the listing of .long directives to one line.
M
turns off macro expansions in the listing.
R
resets the B, M, T, and W options.
T
limits the listing of .string directives to one line.
W
limits the listing of .word directives to one line.
X
produces a symbol cross-reference listing. (You can also obtain a
cross-reference listing by invoking the assembler with the –
x option.)
Options are not case sensitive.
4-76
Select Listing Options
Example
.option
This example shows how to limit the listings of the .byte, .word, .long, and
.string directives to one line each.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
000000
000004
000008
00000a
****************************************
** Limit the listing of .byte, .word, **
** .long, and .string directives
**
**
to 1 line each.
**
****************************************
.option B, W, L, T
00BD
.byte
–’C’, 0B0h, 5
AABB
.long
0AABBCCDDh, 536 + ’A’
15AA
.word
5546, 78h
0045
.string ”Extended Registers”
00001c
00001d
00001e
17 000020
000021
000022
000023
18 000024
000025
19 000026
000027
000028
000029
00002a
00002b
00002c
00002d
00002e
00002f
000030
000031
000032
000033
000034
000035
000036
000037
****************************************
**
Reset the listing options.
**
****************************************
.option R
00BD
.byte
–’C’, 0B0h, 5
00B0
0005
AABB
.long
0AABBCCDDh, 536 + ’A’
CCDD
0000
0259
15AA
.word
5546, 78h
0078
0045
.string ”Extended Registers”
0078
0074
0065
006E
0064
0065
0064
0020
0052
0065
0067
0069
0073
0074
0065
0072
0073
Assembler Directives
4-77
.page
Eject Page in Listing
Syntax
.page
Description
The .page directive produces a page eject in the listing file. The .page directive
is not printed in the source listing, but the assembler increments the line
counter when it encounters it. Using the .page directive to divide the source
listing into logical divisions improves program readability.
Example
This example shows how the .page directive causes the assembler to begin
a new page of the source listing.
Source file:
;
;
;
.title
.
.
.
.page
”**** Page Directive Example ****”
Listing file:
TMS320C54x COFF Assembler
Version x.xx
Copyright (c) 2001
Texas Instruments Incorporated
**** Page Directive Example ****
PAGE
1
PAGE
2
2
;
.
3
;
.
4
;
.
TMS320C54x COFF Assembler
Version x.xx
Copyright (c) 2001
Texas Instruments Incorporated
**** Page Directive Example ****
4-78
Specify Blocking for an Initialized Section
.sblock
Syntax
.sblock [”]section name[”] [, ”section name”, . . . ]
Description
The .sblock directive designates sections for blocking. Blocking is an address
alignment mechanism similar to page alignment, but weaker. A blocked
section is guaranteed to not cross a page boundary (128 words) if it is smaller
than a page, or to start on a page boundary if it is larger than a page. This
directive allows specification of blocking for initialized sections only, not
uninitialized sections declared with .usect or the .bss directives. The section
names may optionally be enclosed in quotes.
Example
This example designates the .text and .data sections for blocking.
1
2
3
4
5
****************************************
** Specify blocking for the .text
**
** and .data sections.
**
****************************************
.sblock
.text, .data
Assembler Directives
4-79
.sect
Assign Character Strings to Substitution Symbols
Syntax
.sect ”section name”
Description
The .sect directive defines a named section that can be used like the default
.text and .data sections. The .sect directive begins assembling source code
into the named section.
The section name identifies a section that the assembler assembles code into.
The name can be up to 200 characters and must be enclosed in double quotes.
A section name can contain a subsection name in the form section name:subsection name. For COFF1 formatted files, only the first 8 characters are significant.
For more information about COFF sections,
Introduction to Common Object File Format.
Example
see
Chapter
This example defines a special-purpose section named Vars and assembles
code into it.
1
**********************************************
2
**
Begin assembling into .text section.
**
3
**********************************************
4 000000
.text
5 000000 E878
LD
#78h, A ; Assembled into .text
6 000001 F000
ADD
#36h, A ; Assembled into .text
000002 0036
7
**********************************************
8
**
Begin assembling into Vars section.
**
9
**********************************************
10 000000
.sect
”Vars”
11
0010 WORD_LEN
.set
16
12
0020 DWORD_LEN
.set
WORD_LEN * 2
13
0008 BYTE_LEN
.set
WORD_LEN / 2
14
**********************************************
15
**
Resume assembling into .text section. **
16
**********************************************
17 000003
.text
18 000003 F000
ADD
#42h, A ; Assembled into .text
000004 0042
19 000005 0003
.byte
3, 4
; Assembled into .text
000006 0004
20
**********************************************
21
**
Resume assembling into Vars section.
**
22
**********************************************
23 000000
.sect
”Vars”
24 000000 000D
.field 13, WORD_LEN
25 000001 0A00
.field 0Ah, BYTE_LEN
26 000002 0000
.field 10q, DWORD_LEN
000003 0008
27
4-80
2,
Define Assembly-Time Constant
.set/.equ
Syntax
symbol .set value
symbol .equ value
Description
The .set and .equ directives equate a value to a symbol. The symbol can then
be used in place of a value in assembly source. This allows you to equate
meaningful names with constants and other values.
- The symbol is a label that must appear in the label field.
- The value must be a well-defined expression; that is, all symbols in the
expression must be previously defined in the current source module.
Undefined external symbols and symbols that are defined later in the module
cannot be used in the expression. If the expression is relocatable, the symbol
to which it is assigned is also relocatable.
The value of the expression appears in the object field of the listing. This value
is not part of the actual object code and is not written to the output file.
Symbols defined with .set or .equ can be made externally visible with the .def
or .global directive. In this way, you can define global absolute constants.
Example
This example shows how symbols can be assigned with .set and .equ.
1
2
3
4
5
6 000000
000001
7
8
9
10
11
12
13 000002
000003
14
15
16
17
18
19 000004
20
21
22
23
24
25
26
27 000005
**********************************************
**
Equate symbol AUX_R1 to register AR1
**
**
and use it instead of the register.
**
**********************************************
0011 AUX_R1 .set
AR1
7711
STM
#56h, AUX_R1
0056
**********************************************
**
Set symbol index to an integer expr.
**
**
and use it as an immediate operand.
**
**********************************************
0035 INDEX
.equ
100/2 +3
F000
ADD
#INDEX, A
0035
**********************************************
** Set symbol SYMTAB to a relocatable expr. **
**
and use it as a relocatable operand.
**
**********************************************
000A LABEL
.word
10
0005’ SYMTAB .set
LABEL + 1
**********************************************
**
Set symbol NSYMS equal to the symbol
**
**
INDEX and use it as you would INDEX.
**
**********************************************
0035 NSYMS
.set
INDEX
0035
.word
NSYMS
Assembler Directives
4-81
.space/.bes
Reserve Space
Syntax
.space size in bits
.bes size in bits
Description
Example
The .space and .bes directives reserve size number of bits in the current section and fill them with 0s.
When you use a label with the .space directive, it points to the first word
reserved. When you use a label with the .bes directive, it points to the last word
reserved.
This example shows how memory is reserved with the .space and .bes
directives.
1
*********************************************
2
** Begin assembling into .text section.
**
3
*********************************************
4 000000
.text
5
6
*********************************************
7
** Reserve 0F0 bits (15 words in the
**
8
**
.text section).
**
9
*********************************************
10 000000
.space 0F0h
11 00000f 0100
.word
100h, 200h
000010 0200
12
*********************************************
13
** Begin assembling into .data section.
**
14
*********************************************
15 000000
.data
16 000000 0049
.string ”In .data”
000001 006E
000002 0020
000003 002E
000004 0064
000005 0061
000006 0074
000007 0061
17
*********************************************
18
** Reserve 100 bits in the .data section; **
19
**
RES_1 points to the first word that
**
20
**
contains reserved bits.
**
21
*********************************************
22 000008
RES_1: .space 100
23 00000f 000F
.word
15
24 000010 0008”
.word
RES_1
25
26
*********************************************
27
** Reserve 20 bits in the .data section; **
28
** RES_2 points to the last word that
**
29
**
contains reserved bits.
**
30
*********************************************
31 000012
RES_2: .bes
20
32 000013 0036
.word
36h
33 000014 0012”
.word
RES_2
4-82
Control Listing of Substitution Symbols
.sslist/.ssnolist
Syntax
.sslist
.ssnolist
Description
Two directives enable you to control substitution symbol expansion in the
listing file:
- The .sslist directive allows substitution symbol expansion in the listing file.
The expanded line appears below the actual source line.
- The .ssnolist directive suppresses substitution symbol expansion in the
listing file.
By default, all substitution symbol expansion in the listing file is inhibited. Lines
with the pound (#) character denote expanded substitution symbols.
Example
This example shows code that, by default, suppresses the listing of substitution symbol expansion, and it shows the .sslist directive assembled, instructing
the assembler to list substitution symbol code expansion.
(a) Mnemonic example
1
2
3
4
5
6
7
8
9
10
11
12
1
1
1
1
#
1
#
1
#
000000
000001
000002
000003
ADD2
0000008094
000001
0000011000–
0000020001–
0000038001–
13
14
15
16 000004 8094
17 000005 8090
18
19 000006
0000061000–
0000070001–
0000088001–
.bss
.bss
.bss
.bss
.macro
LD
ADD
STL
.endm
ADDRX, 1
ADDRY, 1
ADDRA, 1
ADDRB, 1
ADDRA, ADDRB
ADDRA, A
ADDRB, A
A, ADDRB
STL
ADD2
LD
ADD
STL
A, *AR4+
ADDRX, ADDRY
ADDRX, A
ADDRY, A
A, ADDRY
.sslist
STL
STL
A, *AR4+
A, *AR0+
ADD2
LD
LD
ADD
ADD
STL
STL
ADDRX, ADDRY
ADDRA, A
ADDRX, A
ADDRB, A
ADDRY, A
A, ADDRB
A, ADDRY
Assembler Directives
4-83
.sslist/.ssnolist
Control Listing of Substitute Symbols
(b) Algebraic example
1
2
3
4
5
6
7
8
9
10
11
12
1
1
1
1
#
1
#
1
#
4-84
000000
000001
000002
000003
ADD2
0000008094
000001
0000011000–
0000020001–
0000038001–
13
14
15
16 000004 8094
17 000005 8090
18
19 000006
0000061000–
0000070001–
0000088001–
.bss
ADDRX,
.bss
ADDRY,
.bss
ADDRA,
.bss
ADDRB,
.macro ADDRA,
A = @ADDRA
A = A + @ADDRB
@ADDRB = A
.endm
1
1
1
1
ADDRB
*AR4+ = A
ADD2
ADDRX, ADDRY
A = @ADDRX
A = A + @ADDRY
@ADDRY = A
.sslist
*AR4+ = A
*AR0+ = A
ADD2
ADDRX, ADDRY
A = @ADDRA
A = @ADDRX
A = A + @ADDRB
A = A + @ADDRY
@ADDRB = A
@ADDRY = A
Initialize Text
.string/.pstring
Syntax
.string ”string1 ” [, ... , ”stringn ”]
.pstring ”string1 ” [, ... , ”stringn ”]
Description
The .string and .pstring directives place 8-bit characters from a character
string into the current section. With the .string directive, each 8-bit character
has its own 16-bit word, but with the .pstring directive, the data is packed so
that each word contains two 8-bit bytes. Each string is either:
- An expression that the assembler evaluates and treats as a 16-bit signed
number, or
- A character string enclosed in double quotes. Each character in a string
represents a separate byte.
With .pstring, values are packed into words starting with the most significant
byte of the word. Any unused space is padded with null bytes.
The assembler truncates any values that are greater than 8 bits. You may have
up to 100 operands, but they must fit on a single source statement line.
If you use a label, it points to the location of the first word that is initialized.
Note that when you use .string in a .struct/.endstruct sequence, .string defines
a member’s size; it does not initialize memory. For more information about
.struct/.endstruct, see Section 4.9, Assembly-Time Symbol Directives, on
page 4-21.
Example
This example shows 8-bit values placed into words in the current section.
1 000000
000001
000002
000003
2 000004
000005
000006
000007
3 000008
000009
00000a
00000b
00000c
00000d
00000e
4 00000f
0041
0042
0043
0044
0041
0042
0043
0044
4175
7374
696E
486F
7573
746F
6E00
0030
Str_Ptr:
.string
”ABCD”
.string
41h, 42h, 43h, 44h
.pstring ”Austin”, ”Houston”
.string
36 + 12
Assembler Directives
4-85
.struct/.endstruct/.tag
Declare Structure Type
Syntax
Description
[ stag ]
[ mem0 ]
[ mem1 ]
.
.
.
[ memn ]
.
.
.
[ memN ]
[ size ]
.struct
element
element
.
.
.
.tag stag
.
.
.
element
.endstruct
[ expr ]
[ expr0 ]
[ expr1 ]
.
.
.
[, exprn ]
.
.
.
[ exprN ]
label
.tag
stag
The .struct directive assigns symbolic offsets to the elements of a data
structure definition. This enables you to group similar data elements together
and then let the assembler calculate the element offset. This is similar to a C
structure or a Pascal record. A .struct definition may contain a .union definition,
and .structs and .unions may be nested. The .struct directive does not allocate
memory; it merely creates a symbolic template that can be used repeatedly.
The .endstruct directives terminates the structure definition.
The .tag directive gives structure characteristics to a label, simplifying the
symbolic representation and providing the ability to define structures that contain other structures. The .tag directive does not allocate memory. The
structure tag (stag) of a .tag directive must have been previously defined.
4-86
stag
is the structure’s tag. Its value is associated with the beginning
of the structure. If no stag is present, the assembler puts the
structure members in the global symbol table with the value of
their absolute offset from the top of the structure. Stag is optional
for .struct, but required for .tag.
expr
is an optional expression indicating the beginning offset of the
structure. Structures default to start at 0. This parameter can only
be used with a top-level structure. It cannot be used when
defining a nested structure.
Declare Structure Type
.struct/.endstruct/.tag
memn
is an optional label for a member of the structure. This label is
absolute and equates to the present offset from the beginning of
the structure. A label for a structure member cannot be declared
global.
element
is one of the following descriptors: .byte, .char, .double, field,
.float, .half, .int, .long, .short, .string, .ubyte, .uchar, .uhalt, .uint,
.ulong, .ushort, .uword, and .word. An element can also be a complete declaration of a nested structure or union, or a structure or
union declared by its tag. Following a .struct directive, these
directives describe the element’s size. They do not allocate
memory.
exprn
is an optional expression for the number of elements described.
This value defaults to 1. A .string element is considered to be one
word in size, and a .field element is one bit.
size
is an optional label for the total size of the structure.
Note:
Directives That Can Appear in a .struct /.endstruct Sequence
The only directives that can appear in a .struct/.endstruct sequence are element descriptors, structure and union tags, conditional assembly directives,
and the .align directive, which aligns the member offsets on word boundaries. Empty structures are illegal.
These examples show various uses of the .struct, .tag, and .endstruct
directives.
Assembler Directives
4-87
.struct/.endstruct/.tag
Declare Structure Types
Example 1
1
2
3
4
5
6 000000
7
8
9 000000
REAL_REC
NOM
DEN
REAL_LEN
0000
0001
0002
0001–
.struct
.int
.int
.endstruct
ADD
;
;
;
;
stag
member1 = 0
member2 = 1
real_len = 2
REAL + REAL_REC.DEN, A
; access structure element
.bss REAL, REAL_LEN
; allocate mem rec
Example 2
10
11
12
13
14
15
16
17
18
19
20
21
22
0000
0002
0004
CPLX_REC
REALI
IMAGI
CPLX_LEN
.struct
.tag REAL_REC
.tag REAL_REC
.endstruct
; stag
; member1 = 0
COMPLEX
.tag CPLX_REC
; assign structure attrib
; cplx_len = 4
000002
.bss COMPLEX, CPLX_LEN
000001 0002–
000002 8002–
ADD
STL
COMPLEX.REALI, A
A, COMPLEX.REALI
; access structure
000003 0104–
ADD
COMPLEX.IMAGI, B
; allocate space
Example 3
1
2
3
4
5
6
.struct
0000
0001
0002
0003
X
Y
Z
.int
.int
.int
.endstruct
; no stag puts mems into
; global symbol table
; create 3 dim templates
Example 4
1
2
0000
3
0040
4
0040
5
0041
6
0042
7
0043
8
9
10 000000 0040–
11 000001 f030
000002 007f
12
13 000000
4-88
BIT_REC
STREAM
BIT7
BIT9
BIT10
X_INT
BIT_LEN
.struct
.string 64
.field 7
.field 9
.field 10
.int
.endstruct
;
;
;
;
;
BITS
.tag BIT_REC
ADD BITS.BIT7, A
AND #007Fh, A
; move into acc
; mask off garbage bits
.bss BITS, BIT_REC
; stag
bits1 = 64
bits2 = 64
bits3 = 65
x_int = 66
length = 67
Define Tab Size
.tab
Syntax
.tab
size
Description
The .tab directive defines the tab size. Tabs encountered in the source input
are translated to size spaces in the listing. The default tab size is eight spaces.
Example
Each of the following lines consists of a single tab character followed by an
NOP instruction.
Source file:
; default tab size
NOP
NOP
NOP
.tab 4
NOP
NOP
NOP
.tab 16
NOP
NOP
NOP
Listing file:
1
2
3
4
5
7
8
9
10
12
13
14
000000 F495
000001 F495
000002 F495
000003 F495
000004 F495
000005 F495
000006 F495
000007 F495
000008 F495
; default tab size
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Assembler Directives
4-89
.text
Assemble Into .text Sections
Syntax
.text
Description
The .text directive tells the assembler to begin assembling into the .text
section, which usually contains executable code. The section program counter
is set to 0 if nothing has yet been assembled into the .text section. If code has
already been assembled into the .text section, the section program counter is
restored to its previous value in the section.
.text is the default section. Therefore, at the beginning of an assembly, the
assembler assembles code into the .text section unless you specify a different
sections directive (.data or .sect).
Example
For more information about COFF sections, see Chapter 2,
Introduction to Common Object File Format.
This example assembles code into the .text and .data sections. The .data section contains integer constants, and the .text section contains executable
code.
1
*****************************************
2
** Begin assembling into .data section.**
3
*****************************************
4 000000
.data
5 000000 000a
.byte
0Ah, 0Bh
000001 000b
6
7
******************************************
8
** Begin assembling into .text section. **
9
******************************************
10 000000
.text
11 000000 0041 START: .string ”A”,”B”,”C”
000001 0042
000002 0043
12 000003 0058 END:
.string ”X”,”Y”,”Z”
000004 0059
000005 005a
13
14 000006 0000’
ADD
START, A
15 000007 0003’
ADD
END, A
16
*******************************************
17
** Resume assembling into .data section.**
18
*******************************************
19 000002
.data
20 000002 000c
.byte
0Ch, 0Dh
000003 000d
21
*******************************************
22
** Resume assembling into .text section.**
23
*******************************************
24 000008
.text
25 000008 0051
.string ”Quit”
000009 0075
00000a 0069
00000b 0074
4-90
Define Page Title
.title
Syntax
.title
Description
”string”
The .title directive supplies a title that is printed in the heading on each listing
page. The source statement itself is not printed, but the line counter is incremented.
The string is a quote-enclosed title of up to 65 characters. If you supply more
than 65 characters, the assembler truncates the string and issues a warning.
The assembler prints the title on the page that follows the directive, and on subsequent pages until another .title directive is processed. If you want a title on
the first page, the first source statement must contain a .title directive.
Example
In this example, one title is printed on the first page and a different title on
succeeding pages.
Source file:
;
;
;
.title
.
.
.
.title
.page
”**** Fast Fourier Transforms ****”
”**** Floating–Point Routines ****”
Listing file:
COFF Assembler
Copyright (c) 2001
Version x.xx
Texas Instruments Incorporated
**** Fast Fourier Transforms ****
2
3
4
COFF Assembler
Copyright (c) 2001
PAGE
1
PAGE
2
;
.
;
.
;
.
Version x.xx
Texas Instruments Incorporated
**** Floating–Point Routines ****
Assembler Directives
4-91
.union/.endunion/.tag
Declare Union Type
Syntax
Description
[ utag ]
[ mem0 ]
[ mem1 ]
.
.
.
[ memn ]
.
.
.
[ memN ]
[ size ]
.union
element
element
.
.
.
.tag
.
.
.
element
.endunion
[ expr ]
[ expr0 ]
[ expr1 ]
.
.
.
utagn [, exprn ]
.
.
.
[ exprN ]
label
.tag
utag
The .union directive assigns symbolic offsets to the elements of alternate data
structure definitions to be allocated in the same memory space. This enables
you to define several alternate structures and then let the assembler calculate
the element offset. This is similar to a C union. The .union directive does not
allocate any memory; it merely creates a symbolic template that can be used
repeatedly.
A .struct definition may contain a .union definition, and .structs and .unions
may be nested.
The .endunion directive terminates the union definition.
The .tag directive gives structure or union characteristics to a label, simplifying
the symbolic representation and providing the ability to define structures or
unions that contain other structures or unions. The .tag directive does not allocate memory. The structure or union tag of a .tag directive must have been previously defined.
4-92
Declare Union Type
.union/.endunion/.tag
utag
is the union’s tag. Its value is associated with the beginning of the
union. If no utag is present, the assembler puts the union
members in the global symbol table with the value of their absolute offset from the top of the union. In this case, each member
must have a unique name.
expr
is an optional expression indicating the beginning offset of the
union. Unions default to start at 0. This parameter can only be
used with a top-level union. It cannot be used when defining a
nested union.
memn
is an optional label for a member of the union. This label is absolute and equates to the present offset from the beginning of the
union. A label for a union member cannot be declared global.
element
is one of the following descriptors: .byte, .char, .double, field,
.float, .half, .int, .long, .short, .string, .ubyte, .uchar, .uhalt, .uint,
.ulong, .ushort, .uword, and .word. An element can also be a complete declaration of a nested structure or union, or a structure or
union declared by its tag. Following a .union directive, these
directives describe the element’s size. They do not allocate
memory.
exprn
is an optional expression for the number of elements described.
This value defaults to 1. A .string element is considered to be one
word in size, and a .field element is one bit.
size
is an optional label for the total size of the union.
Note: Directives That Can Appear in a .union /.endunion Sequence
The only directives that can appear in a .union/.endunion sequence are element descriptors, structure and union tags, conditional assembly directives,
and the .align directive, which aligns the member offsets on word boundaries. Empty structures are illegal.
Assembler Directives
4-93
.union/.endunion/.tag
Declare Union Types
These examples show unions with and without tags.
Example 1
1
2
3
0000
4
0000
5
0000
6
0002
7
8 000000
9
10
11 000000 0000–
xample
ival
fval
sval
real_len
employid
.global employid
.union
.word
.float
.string
.endunion
;
;
;
;
;
.bss
employid, real_len
.tag
ADD
xample
employid.fval, A
utag
member1 = int
member2 = float
member3 = string
real_len = 2
;allocate memory
; name an instance
; access union element
Example 2
1
2
3
4
5
6
7
4-94
0000
0000
0000
0002
x
y
z
size_u
.union
.long
.float
.word
.endunion
;
;
;
;
;
utag
member1 = long
member2 = float
member3 = word
real_len = 2
Reserve Uninitialized Space
.usect
Syntax
symbol .usect ”section name”, size in words [, [blocking flag] [, alignment flag]]
Description
The .usect directive reserves space for variables in an uninitialized, named
section. This directive is similar to the .bss directive; both simply reserve space
for data and have no contents. However, .usect defines additional sections
that can be placed anywhere in memory, independently of the .bss section.
symbol
points to the first location reserved by this invocation of the
.usect directive. The symbol corresponds to the name of
the variable for which you’re reserving space.
section name
must be enclosed in double quotes. This parameter
names the uninitialized section. The name can be up to
200 characters. For COFF1 formatted files, only the first
8 characters are significant. A section name can contain
a subsection name in the form section name:subsection
name.
size in words
is an expression that defines the number of words that are
reserved in section name.
blocking flag
is an optional parameter. If specified and nonzero, the flag
means that this section will be blocked. Blocking is an address mechanism similar to alignment, but weaker. It
means a section is guaranteed to not cross a page boundary (128 words) if it is smaller than a page, and to start on
a page boundary if it is larger than a page. This blocking
applies to the section, not to the object declared with this
instance of the .usect directive.
alignment flag
is an optional parameter. This flag causes the assembler
to allocate size on long word boundaries.
Note:
Specifying an Alignment Flag Only
To specify an alignment flag without a blocking flag, you must insert two
commas before the alignment flag, as shown in the syntax.
Other sections directives (.text, .data, and .sect) end the current section and
tell the assembler to begin assembling into another section. The .usect and the
.bss directives, however, do not affect the current section. The assembler
assembles the .usect and the .bss directives and then resumes assembling
into the current section.
Variables that can be located contiguously in memory can be defined in the
same specified section; to do so, repeat the .usect directive with the same section name.
Assembler Directives
4-95
.usect
Reserve Uninitialized Space
For more information about COFF sections,
Introduction to Common Object File Format.
Example
see
Chapter
2,
This example uses the .usect directive to define two uninitialized, named sections, var1 and var2. The symbol ptr points to the first word reserved in the var1
section. The symbol array points to the first word in a block of 100 words
reserved in var1, and dflag points to the first word in a block of 50 words in var1.
The symbol vec points to the first word reserved in the var2 section.
Figure 4–7 on page 4-97 shows how this example reserves space in two uninitialized sections, var1 and var2.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
******************************************
**
Assemble into .text section.
**
******************************************
000000
.text
000000 E803
LD
#03h, A
000000
******************************************
**
Reserve 1 word in var1.
**
******************************************
ptr
.usect ”var1”, 1
000001
******************************************
**
Reserve 100 words in var1.
**
******************************************
array
.usect ”var1”, 100
000001 F000
000002 0037
ADD
#037h, A
; Still in .text
18
19
******************************************
20
**
Reserve 50 words in var1.
**
21
******************************************
22 000065
dflag
.usect ”var1”, 50
23
24 000003 F000
ADD
#dflag, A ; Still in .text
000004 0065–
25
26
******************************************
27
**
Reserve 100 words in var2.
**
28
******************************************
29 000000
vec
.usect ”var2”, 100
30
31 000005 F000
ADD
#vec, A
; Still in .text
000006 0000–
32
******************************************
33
** Declare an external .usect symbol. **
34
******************************************
35
.global array
4-96
Reserve Uninitialized Space
.usect
Figure 4–7. The .usect Directive
section var1
ptr
section var2
1 word
array
100 words
100 words
100 words reserved in var2
dflag
50 words
151 words reserved in var1
Assembler Directives
4-97
.var Use Substitution Symbols as Local Variables
Syntax
.var sym1 [,sym2 , ... , symn ]
Description
The .var directive allows you to use substitution symbols as local variables
within a macro. With this directive, you can define up to 32 local macro substitution symbols (including parameters) per macro.
The .var directive creates temporary substitution symbols with the initial value
of the null string. These symbols are not passed in as parameters, and they
are lost after expansion.
For more information on macros, see Chapter 5.
4-98
Determine Device
.version
Syntax
.version value
Description
The .version directive determines for which processor instructions are built.
Use one of the following for value:
541
542
543
545
545LP
546LP
548
54_ext (for all other C54x devices with extended program space)
Assembler Directives
4-99
Chapter 5
Macro Language
The assembler supports a macro language that enables you to create your
own instructions. This is especially useful when a program executes a
particular task several times. The macro language lets you:
-
Define your own macros and redefine existing macros
Simplify long or complicated assembly code
Access macro libraries created with the archiver
Define conditional and repeatable blocks within a macro
Manipulate strings within a macro
Control expansion listing
Topic
Page
5.1
Using Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
5.2
Defining Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5.3
Macro Parameters/Substitution Symbols . . . . . . . . . . . . . . . . . . . . . . . . 5-6
5.4
Macro Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
5.5
Using Conditional Assembly in Macros . . . . . . . . . . . . . . . . . . . . . . . . 5-15
5.6
Using Labels in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17
5.7
Producing Messages in Macros . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19
5.8
Formatting the Output Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
5.9
Using Recursive and Nested Macros . . . . . . . . . . . . . . . . . . . . . . . . . . 5-22
5.10 Macro Directives Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
Macro Language
5-1
Using Macros
5.1 Using Macros
Programs often contain routines that are executed several times. Instead of
repeating the source statements for a routine, you can define the routine as
a macro, then call the macro in the places where you would normally repeat
the routine. This simplifies and shortens your source program.
If you want to call a macro several times, but with different data each time, you
can assign parameters within a macro. This enables you to pass different
information to the macro each time you call it. The macro language supports
a special symbol called a substitution symbol, which is used for macro
parameters.
Using a macro is a three-step process.
Step 1: Define the macro. You must define macros before you can use them
in your program. There are two methods for defining macros:
- Macros can be defined at the beginning of a source file or in a
.copy/.include file. See Section 5.2, Defining Macros, for more
information.
- Macros can be defined in a macro library. A macro library is a col-
lection of files in archive format created by the archiver. Each
member of the archive file (macro library) contains one macro
definition corresponding to the member name. You can access
a macro library by using the .mlib directive. See Section 5.4,
Macro Libraries, on page 5-14 for more information.
Step 2: Call the macro. After defining a macro, you call it by using the macro
name as a mnemonic in the source program. This is referred to as
a macro call.
Step 3: Expand the macro. The assembler expands your macros when the
source program calls them. During expansion, the assembler
passes arguments by variable to the macro parameters, replaces
the macro call statement with the macro definition, and assembles
the source code. By default, the macro expansions are printed in the
listing file. You can turn off expansion listing by using the .mnolist
directive. See Section 5.8, Formatting the Output Listing, on page
5-21 for more information.
When the assembler encounters a macro definition, it places the macro name
in the opcode table. This redefines any previously defined macro, library entry,
directive, or instruction mnemonic that has the same name as the macro. This
allows you to expand the functions of directives and instructions, as well as to
add new instructions.
5-2
Defining Macros
5.2 Defining Macros
You can define a macro anywhere in your program, but you must define the
macro before you can use it. Macros can be defined at the beginning of a
source file, in an .include/.copy file, or in a macro library. For more information
about macro libraries, see Section 5.4, Macro Libraries, on page 5-14.
Macro definitions can be nested, and they can call other macros, but all
elements of any macro must be defined in the same file. Nested macros are
discussed in Section 5.9, Using Recursive and Nested Macros, on page 5-22.
A macro definition is a series of source statements in the following format:
macname
.macro [parameter1 ] [, ... , parametern ]
model statements or macro directives
[.mexit]
.endm
macname
names the macro. You must place the name in the
source statement’s label field. Only the first 32
characters of a macro name are significant. The
assembler places the macro name in the internal
opcode table, replacing any instruction or previous
macro definition with the same name.
.macro
identifies the source statement as the first line of a
macro definition. You must place .macro in the
opcode field.
[parameters]
are optional substitution symbols that appear as
operands for the .macro directive. Parameters are
discussed in Section 5.3, Macro Parameters/
Substitution Symbols, on page 5-6.
model statements
are instructions or assembler directives that are
executed each time the macro is called.
macro directives
are used to control macro expansion.
.mexit
functions as a goto .endm statement. The .mexit
directive is useful when error testing confirms that
macro expansion will fail and completing the rest of
the macro is unnecessary.
.endm
terminates the macro definition.
Macro Language
5-3
Defining Macros
If you want to include comments with your macro definition but do not want
those comments to appear in the macro expansion, use an exclamation point
to precede your comments. If you do want your comments to appear in the
macro expansion, use an asterisk or semicolon. For more information about
macro comments, see Section 5.7, Producing Messages in Macros, on page
5-19.
Example 5–1 shows the definition, call, and expansion of a macro.
Example 5–1. Macro Definition, Call, and Expansion
(a) Mnemonic example
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18 000000
1
1
1
1
1
5-4
000000
000001
000002
000003
*
*
*
*
add3
ADDRP = P1 + P2 + P3
add3
.macro P1, P2, P3, ADDRP
LD
ADD
ADD
STL
.endm
P1, A
P2, A
P3, A
A, ADDRP
.global abc, def, ghi, adr
add3 abc, def, ghi, adr
1000!
0000!
0000!
8000!
LD
ADD
ADD
STL
abc, A
def, A
ghi, A
A, adr
Defining Macros
Example 5–1. Macro Definition, Call, and Expansion (Continued)
(b) Algebraic example
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18 000000
1
1
1
1
1
000000
000001
000002
000003
*
*
*
*
add3
ADDRP = P1 + P2 + P3
add3
.macro P1, P2, P3, ADDRP
A = @P1
A = A + @P2
A = A + @P3
@ADDRP = A
.endm
.global abc, def, ghi, adr
add3 abc, def, ghi, adr
1000!
0000!
0000!
8000!
A = @abc
A = A + @def
A = A + @ghi
@adr = A
Macro Language
5-5
Macro Parameters/Substitution Symbols
5.3 Macro Parameters/Substitution Symbols
If you want to call a macro several times with different data each time, you can
assign parameters within the macro. The macro language supports a special
symbol, called a substitution symbol, which is used for macro parameters.
Macro parameters are substitution symbols that represent a character string.
These symbols can also be used outside of macros to equate a character
string to a symbol name.
Valid substitution symbols can be up to 32 characters long and must begin with
a letter. The remainder of the symbol can be a combination of alphanumeric
characters, underscores, and dollar signs.
Substitution symbols used as macro parameters are local to the macro they
are defined in. You can define up to 32 local substitution symbols (including
substitution symbols defined with the .var directive) per macro. For more
information about the .var directive, see subsection 5.3.6, Substitution
Symbols as Local Variables in Macros, on page 5-13.
During macro expansion, the assembler passes arguments by variable to the
macro parameters. The character-string equivalent of each argument is
assigned to the corresponding parameter. Parameters without corresponding
arguments are set to the null string. If the number of arguments exceeds the
number of parameters, the last parameter is assigned the character-string
equivalent of all remaining arguments.
If you pass a list of arguments to one parameter, or if you pass a comma or
semicolon to a parameter, you must surround these terms with quotation
marks.
At assembly time, the assembler replaces the substitution symbol with its
corresponding character string, then translates the source code into object
code.
Example 5–2 shows the expansion of a macro with varying numbers of
arguments.
5-6
Macro Parameters/Substitution Symbols
Example 5–2. Calling a Macro With Varying Numbers of Arguments
Macro definition
Parms .macro a,b,c
;
a = :a:
;
b = :b:
;
c = :c:
.endm
Calling the macro:
5.3.1
;
;
;
Parms 100,label
a = 100
b = label
c = ” ”
Parms 100,label,x,y
; a = 100
; b = label
; c = x,y
;
;
;
Parms 100, , x
a = 100
b = ” ”
c = x
Parms ”100,200,300”,x,y
; a = 100,200,300
; b = x
; c = y
;
;
;
Parms ”””string”””,x,y
a = ”string”
b = x
c = y
Directives That Define Substitution Symbols
You can manipulate substitution symbols with the .asg and .eval directives.
The .asg directive assigns a character string to a substitution symbol.
The syntax of the .asg directive is:
.asg [”]character string[”], substitution symbol
The quotation marks are optional. If there are no quotation marks, the
assembler reads characters up to the first comma and removes leading and
trailing blanks. In either case, a character string is read and assigned to the
substitution symbol.
Example 5–3 shows character strings being assigned to substitution symbols.
Macro Language
5-7
Macro Parameters/Substitution Symbols
Example 5–3. The .asg Directive
.asg
.asg
.asg
.asg
.asg
AR0,FP
*AR1+,Ind
*AR1+0b,Rc_Prop
”””string”””,strng
”a,b,c”,parms
;
;
;
;
;
frame pointer
indirect addressing
reverse carry propagation
string
parameters
The .eval directive performs arithmetic on numeric substitution symbols.
The syntax of the .eval directive is
.eval well-defined expression, substitution symbol
The .eval directive evaluates the expression and assigns the string value of
the result to the substitution symbol. If the expression is not well defined, the
assembler generates an error and assigns the null string to the symbol.
Example 5–4 shows arithmetic being performed on substitution symbols.
Example 5–4. The .eval Directive
.asg
1,counter
.loop 100
.word counter
.eval counter + 1,counter
.endloop
In Example 5–4 the .asg directive could be replaced with the .eval directive
without changing the output. In simple cases like this, you can use .eval and
.asg interchangeably. However, you must use .eval if you want to calculate a
value from an expression. While .asg only assigns a character string to a
substitution symbol, the .eval directive evaluates an expression and assigns
the character string equivalent to a substitution symbol.
5.3.2
Built-In Substitution Symbol Functions
The following built-in substitution symbol functions enable you to make
decisions based on the string value of substitution symbols. These functions
always return a value, and they can be used in expressions. Built-in
substitution symbol functions are especially useful in conditional assembly
expressions. Parameters to these functions are substitution symbols or
character-string constants.
5-8
Macro Parameters/Substitution Symbols
In the function definitions shown in Table 5–1, a and b are parameters that represent substitution symbols or character string constants. The term string refers to the string value of the parameter. The symbol ch represents a character
constant.
Table 5–1. Functions and Return Values
Function
Return Value
$symlen(a)
length of string a
$symcmp(a,b)
< 0 if a < b
$firstch(a,ch)
index of the first occurrence of character constant ch in string a
$lastch(a,ch)
index of the last occurrence of character constant ch in string a
$isdefed(a)
1 if string a is defined in the symbol table
0 if string a is not defined in the symbol table
$ismember(a,b)
top member of list b is assigned to string a
0 if b is a null string
$iscons(a)
1 if string a is a binary constant
2 if string a is an octal constant
3 if string a is a hexadecimal constant
4 if string a is a character constant
5 if string a is a decimal constant
$isname(a)
1 if string a is a valid symbol name
0 if string a is not a valid symbol name
$isreg(a)†
1 if string a is a valid predefined register name
0 if string a is not a valid predefined register name
$structsz(a)
size of structure represented by structure tag a
$structacc(a)
reference point of structure represented by structure tag a
0 if a = b
> 0 if a > b
† For more information about predefined register names, see Section 3.8, Symbols, on page
3-19.
Example 5–5 shows built-in substitution symbol functions.
Example 5–5. Using Built-In Substitution Symbol Functions
.asg label, ADDR
; ADDR = label
.if
($symcmp(ADDR,”label”) = 0); evaluates to true
SUB
ADDR, A
.endif
.asg ”x,y,z” , list
; list = x,y,z
.if
($ismember(ADDR,list))
; addr = x, list = y,z
SUB
ADDR, A
; sub x
.endif
Macro Language
5-9
Macro Parameters/Substitution Symbols
5.3.3
Recursive Substitution Symbols
When the assembler encounters a substitution symbol, it attempts to
substitute the corresponding character string. If that string is also a substitution
symbol, the assembler performs substitution again. The assembler continues
doing this until it encounters a token that is not a substitution symbol or until
it encounters a substitution symbol that it has already encountered during this
evaluation.
In Example 5–6, the x is substituted for z; z is substituted for y; and y is
substituted for x. The assembler recognizes this as infinite recursion and
ceases substitution.
Example 5–6. Recursive Substitution
.asg
.asg
.asg
add
*
5-10
add
”x”,z
”z”,y
”y”,x
x,
; declare z and assign z = ”x”
; declare y and assign y = ”z”
; declare x and assign x = ”y”
A
x, A
; recursive expansion
Macro Parameters/Substitution Symbols
5.3.4
Forced Substitution
In some cases, substitution symbols are not recognizable to the assembler.
The forced substitution operator, which is a set of colons, enables you to force
the substitution of a symbol’s character string. Simply enclose a symbol in
colons to force the substitution. Do not include any spaces between the colons
and the symbol.
The syntax for the forced substitution operator is
:symbol:
The assembler expands substitution symbols enclosed in colons before it
expands other substitution symbols.
You can use the forced substitution operator only inside macros, and you
cannot nest a forced substitution operator within another forced substitution
operator.
Example 5–7 shows how the forced substitution operator is used.
Example 5–7. Using the Forced Substitution Operator
force .macro x
.loop 8
AUX:x: .set
x
.eval x+1,x
.endloop
.endm
force 0
The force macro would generate the following source code:
AUX0
AUX1
.
.
.
AUX7
.set
.set
0
1
.set
7
Macro Language
5-11
Macro Parameters/Substitution Symbols
5.3.5
Accessing Individual Characters of Subscripted Substitution Symbols
In a macro, you can access the individual characters (substrings) of a substitution symbol with subscripted substitution symbols. You must use the forced
substitution operator for clarity.
You can access substrings in two ways:
- :symbol (well-defined expression):
This method of subscripting evaluates to a character string with one
character.
- :symbol (well-defined expression1 , well-defined expression2 ):
In this method, expression1 represents the substring’s starting position,
and expression2 represents the substring’s length. You can specify
exactly where to begin subscripting and the exact length of the resulting
character string. The index of substring characters begins with 1, not 0.
Example 5–8 and Example 5–9 show built-in substitution symbol functions
used with subscripted substitution symbols.
In Example 5–8, subscripted substitution symbols redefine the add instruction
so that it handles short immediates.
Example 5–8. Using Subscripted Substitution Symbols to Redefine an Instruction
ADDX
5-12
.macro
.var
.asg
.if
ADD
.else
.emsg
.endif
.endm
ABC
TMP
:ABC(1):,TMP
$symcmp(TMP,”#”) = 0
ABC, A
ADDX
ADDX
#100
*AR1
”Bad Macro Parameter”
;macro call
;macro call
Macro Parameters/Substitution Symbols
In Example 5–9, the subscripted substitution symbol is used to find a substring
strg1, beginning at position start in the string strg2. The position of the
substring strg1 is assigned to the substitution symbol pos.
Example 5–9. Using Subscripted Substitution Symbols to Find Substrings
substr
5.3.6
.macro
.var
.if
.eval
.endif
.eval
.eval
.eval
.eval
.loop
.break
.asg
.if
.eval
.break
.else
.eval
.endif
.endloop
.endm
start,strg1,strg2,pos
LEN1,LEN2,I,TMP
$symlen(start) = 0
1,start
.asg
.asg
substr
.data
.word
0,pos
”ar1 ar2 ar3 ar4”,regs
1,”ar2”,regs,pos
0,pos
1,i
$symlen(strg1),LEN1
$symlen(strg2),LEN2
i = (LEN2 – LEN1 + 1)
”:strg2(i,LEN1):”,TMP
$symcmp(strg1,TMP) = 0
i,pos
i + 1,i
pos
Substitution Symbols as Local Variables in Macros
If you want to use substitution symbols as local variables within a macro, you
can use the .var directive to define up to 32 local macro substitution symbols
(including parameters) per macro. The .var directive creates temporary substitution symbols with the initial value of the null string. These symbols are not
passed in as parameters, and they are lost after expansion.
.var sym1 [,sym2 ] ... [,symn ]
The .var directive is used in Example 5–8 and Example 5–9.
Macro Language
5-13
Macro Libraries
5.4 Macro Libraries
One way to define macros is by creating a macro library. A macro library is a
collection of files that contain macro definitions. You must use the archiver to
collect these files, or members, into a single file (called an archive). Each
member of a macro library contains one macro definition. The files in a macro
library must be unassembled source files. The macro name and the member
name must be the same, and the macro filename’s extension must be .asm.
For example:
Macro Name
Filename in Macro Library
simple
simple.asm
add3
add3.asm
You can access the macro library by using the .mlib assembler directive (described on page 4-68). The syntax is:
.mlib macro library filename
When the assembler encounters the .mlib directive, it opens the library and
creates a table of the library’s contents. The assembler enters the names of
the individual members within the library into the opcode tables as library
entries; this redefines any existing opcodes or macros that have the same
name. If one of these macros is called, the assembler extracts the entry from
the library and loads it into the macro table.
The assembler expands the library entry in the same way it expands other
macros. You can control the listing of library entry expansions with the .mlist
directive. For more information about the .mlist directive, see Section 5.8,
Formatting the Output Listing, on page 5-21. Only macros that are actually
called from the library are extracted, and they are extracted only once.
You can use the archiver to create a macro library by simply including the
desired files in an archive. A macro library is no different from any other
archive, except that the assembler expects the macro library to contain macro
definitions. The assembler expects only macro definitions in a macro library;
putting object code or miscellaneous source files into the library may produce
undesirable results.
5-14
Using Conditional Assembly in Macros
5.5 Using Conditional Assembly in Macros
The conditional assembly directives are .if/.elseif/.else/.endif and .loop/
.break/.endloop. They can be nested within each other up to 32 levels deep.
The format of a conditional block is:
.if well-defined expression
[.elseif well-defined expression]
[.else well-defined expression]
.endif
The .elseif and .else directives are optional in conditional assembly. The
.elseif directive can be used more than once within a conditional assembly
code block. When .elseif and .else are omitted, and when the .if expression is
false (0), the assembler continues to the code following the .endif directive. For
more information on the .if/ .elseif/.else/.endif directives, see page 4-56.
The .loop/.break/.endloop directives enable you to assemble a code block
repeatedly. The format of a repeatable block is:
.loop [well-defined expression]
[.break [well-defined expression]]
.endloop
The .loop directive’s optional expression evaluates to the loop count (the
number of loops to be performed). If the expression is omitted, the loop count
defaults to 1024 unless the assembler encounters a .break directive with an
expression that is true (nonzero). For more information on the .loop/
.break/.endloop directives, see page 4-66.
The .break directive and its expression are optional. If the expression
evaluates to false, the loop continues. The assembler breaks the loop when
the .break expression evaluates to true or when the .break expression is
omitted. When the loop is broken, the assembler continues with the code after
the .endloop directive.
Example 5–10, Example 5–11, and Example 5–12 show the .loop/.break/
.endloop directives, properly nested conditional assembly directives, and
built-in substitution symbol functions used in a conditional assembly code
block.
Macro Language
5-15
Using Conditional Assembly in Macros
Example 5–10. The .loop/.break/.endloop Directives
.asg
1,x
.loop
.break (x == 10) ;
;
if x == 10, quit loop/break with
expression
.eval x+1,x
.endloop
Example 5–11. Nested Conditional Assembly Directives
.asg
1,x
.loop
.if (x == 10) ;
.break
;
.endif
if x == 10 quit loop
force break
.eval x+1,x
.endloop
Example 5–12. Built-In Substitution Symbol Functions Used in a Conditional Assembly
Code Block
.ref OPZ
.fcnolist
*
*Double Add or Subtract
*
DBL
.macro ABC, ADDR, src
; add or subtract double
.if $symcmp(ABC,”+”) == 0
dadd
ADDR, src
; add double
.elseif $symcmp(ABC,”–”) == 0
dsub
ADDR, src
; subtract double
.else
.emsg ”Incorrect Operator Parameter”
.endif
.endm
*Macro Call
DBL –, OPZ, A
For more information about conditional assembly directives, see Section 4.8,
Conditional Assembly Directives, on page 4-20.
5-16
Using Labels in Macros
5.6 Using Labels in Macros
All labels in an assembly language program must be unique, including labels
in macros. If a macro is expanded more than once, its labels are defined more
than once. Defining labels more than once is illegal. The macro language
provides a method of defining labels in macros so that the labels are unique.
Follow the label with a question mark, and the assembler replaces the question
mark with a unique number. When the macro is expanded, you will not see the
unique number in the listing file. Your label appears with the question mark as
it did in the macro definition. You cannot declare this label as global.
The maximum label length is shortened to allow for the unique suffix. If the
macro is expanded fewer than 10 times, the maximum label length is 126
characters. If the macro is expanded from 10 to 99 times, the maximum label
length is 125. The label with its unique suffix is shown in the cross-listing file.
The syntax for a unique label is:
label?
Example 5–13 shows unique label generation in a macro.
Example 5–13. Unique Labels in a Macro
(a) Mnemonic example
1
2
3
4
5
6
7
8
9
10
11
12
13
14 000000
1
1
1
1
1
1
1
1
000000
000001
000002
000003
000004
000005
000006
000007
000008
000009
; define macro
MIN
.macro AVAR, BVAR ; find minimum
M1?
M2?
LD
SUB
BC
LD
B
LD
AVAR, A
#BVAR, A
M1?, ALT
#BVAR, A
M2?
AVAR, A
.endm
; call macro
MIN 50, 100
1032
F010
0064
F843
0008’
E864
F073
0009’
1032
M1?
M2?
LD
SUB
50, A
#100, A
BC
M1?, ALT
LD
B
#100, A
M2?
LD
50, A
Macro Language
5-17
Using Labels in Macros
Example 5–13. Unique Labels in a Macro (Continued)
(b) Algebraic example
1
2
3
4
5
6
7
8
9
10
11
12
13
14 000000
1
1
1
1
1
1
1
1
5-18
000000
000001
000002
000003
000004
000005
000006
000007
000008
000009
; define macro
MIN
.macro AVAR, BVAR ; find minimum
M1?
M2?
A = @AVAR
A = A – #BVAR
if (ALT) goto M1?
A = #BVAR
goto M2?
A = @AVAR
.endm
; call macro
MIN 50, 100
1032
F010
0064
F843
0008’
E864
F073
0009’
1032
M1?
M2?
A = @50
A = A – #100
if (ALT) goto M1?
A = #100
goto M2?
A = @50
Producing Messages in Macros
5.7 Producing Messages in Macros
The macro language supports three directives that enable you to define your
own assembly-time error and warning messages. These directives are
especially useful when you want to create messages specific to your needs.
The last line of the listing file shows the error and warning counts. These
counts alert you to problems in your code and are especially useful during
debugging.
.emsg
sends error messages to the listing file. The .emsg directive
generates errors in the same manner as the assembler,
incrementing the error count and preventing the assembler
from producing an object file.
.mmsg
sends assembly-time messages to the listing file. The .mmsg
directive functions in the same manner as the .emsg directive
but does not set the error count or prevent the creation of an
object file.
.wmsg
sends warning messages to the listing file. The .wmsg
directive functions in the same manner as the .emsg directive,
but it increments the warning count and does not prevent the
generation of an object file.
Macro comments are comments that appear in the definition of the macro but
do not show up in the expansion of the macro. An exclamation point in column
1 identifies a macro comment. If you want your comments to appear in the
macro expansion, precede your comment with an asterisk or semicolon.
Example 5–14 shows user messages in macros.
Macro Language
5-19
Producing Messages in Macros
Example 5–14. Producing Messages in a Macro
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 000000
1
1
1
1
1
1
1
1
1
1
1
1
testparam
000000 1002
000001 1101
000002 F500
17
18 000003
1
1
1
.macro x,y
.if ($symlen(x) == 0)
.emsg ”ERROR –– Missing Parameter”
.mexit
.elseif ($symlen(y) == 0)
.emsg ”ERROR == Missing Parameter”
.mexit
.else
LD y, A
LD x, B
ADD A, B
.endif
.endm
testparam 1,2
.if ($symlen(x) == 0)
.emsg ”ERROR –– Missing Parameter”
.mexit
.elseif ($symlen(y) == 0)
.emsg ”ERROR == Missing Parameter”
.mexit
.else
LD 2, A
LD 1, B
ADD A, B
.endif
testparam
.if ($symlen(x) == 0)
.emsg ”ERROR –– Missing Parameter”
***** USER ERROR ***** – : ERROR –– Missing Parameter
1
.mexit
1 Error, No Warnings
5-20
Formatting the Output Listing
5.8 Formatting the Output Listing
Macros, substitution symbols, and conditional assembly directives may hide
information. You may need to see this hidden information, so the macro
language supports an expanded listing capability.
By default, the assembler shows macro expansions and false conditional
blocks in the output list file. You may want to turn this listing off or on within your
listing file. Four sets of directives enable you to control the listing of this
information:
- Macro and Loop Expansion Listing
.mlist
expands macros and .loop/.endloop blocks. The .mlist
directive prints all code encountered in those blocks.
.mnolist
suppresses the listing of macro expansions and .loop/
.endloop blocks.
For macro and loop expansion listing, .mlist is the default.
- False Conditional Block Listing
.fclist
causes the assembler to include in the listing file all
conditional blocks that do not generate code (false conditional blocks). Conditional blocks appear in the listing exactly
as they appear in the source code.
.fcnolist
suppresses the listing of false conditional blocks. Only the
code in conditional blocks that actually assemble appears in
the listing. The .if, .elseif, .else, and .endif directives do not
appear in the listing.
For false conditional block listing, .fclist is the default.
- Substitution Symbol Expansion Listing
.sslist
expands substitution symbols in the listing. This is useful for
debugging the expansion of substitution symbols. The expanded line appears below the actual source line.
.ssnolist turns off substitution symbol expansion in the listing.
For substitution symbol expansion listing, .ssnolist is the default.
- Directive Listing
.drlist
causes the assembler to print to the listing file all directive
lines.
.drnolist suppresses the printing of the following directives in the listing file: .asg, .eval, .var, .sslist, .mlist, .fclist, .ssnolist,
.mnolist, .fcnolist, .emsg, .wmsg, .mmsg, .length, .width, and
.break.
For directive listing, .drlist is the default.
Macro Language
5-21
Using Recursive and Nested Macros
5.9 Using Recursive and Nested Macros
The macro language supports recursive and nested macro calls. This means
that you can call other macros in a macro definition. You can nest macros up
to 32 levels deep. When you use recursive macros, you call a macro from its
own definition (the macro calls itself).
When you create recursive or nested macros, you should pay close attention
to the arguments that you pass to macro parameters, because the assembler
uses dynamic scoping for parameters. This means that the called macro uses
the environment of the macro from which it was called.
Example 5–15 shows nested macros. Note that the y in the in_block macro
hides the y in the out_block macro. The x and z from the out_block macro,
however, are accessible to the in_block macro.
Example 5–15. Using Nested Macros
in_block
.macro y,a
.
.
.endm
; visible parameters are y,a and
;
x,z from the calling macro
out_block .macro x,y,z
.
; visible parameters are x,y,z
.
in_block x,y ; macro call with x and y as
;
arguments
.
.
.endm
out_block
; macro call
5-22
Using Recursive and Nested Macros
Example 5–16 shows recursive macros. The fact macro produces assembly
code necessary to calculate the factorial of n where n is an immediate value.
The result is placed in data memory address loc. The fact macro accomplishes
this by calling fact1, which calls itself recursively.
Example 5–16. Using Recursive Macros
(a) Mnemonic example
fact
.macro N, loc
.if
N < 2
ST
#1, loc
.else
ST
#N, loc
.eval N – 1, N
fact1
; n is an integer constant
; loc memory address = n!
; 0! = 1! = 1
; n >= 2 so, store n at loc
; decrement n, and do the
;
factorial of n – 1
; call fact with current
;
environment
.endif
.endm
fact1 .macro
.if
LD
MPY
STL
.eval
fact1
.endif
N > 1
loc, T
#N, A
A, loc
N – 1, N
;
;
;
;
;
multiply present factorial
by present position
save result
decrement position
recursive call
.endm
Macro Language
5-23
Using Recursive and Nested Macros
Example 5–16. Using Recursive Macros (Continued)
(b) Algebraic example
fact
.macro N, loc
.if N < 2
; n is an integer constant
; loc memory address = n!
; 0! = 1! = 1
@loc = #1
.else
@loc = #N
; n >= 2 so, store n at loc
; decrement n, and do the
.eval N – 1, N ;
factorial of n – 1
fact1
; call fact1 with current
;
environment
.endif
.endm
fact1 .macro
.if N > 1
T = @loc
;
A = T * #N
;
@loc = A
;
.eval N – 1, N ;
fact1
;
.endif
.endm
5-24
multiply present factorial
by present position
save result
decrement position
recursive call
Macro Directives Summary
5.10 Macro Directives Summary
Table 5–2. Creating Macros
Mnemonic and Syntax
Description
macname .macro [parameter1 ]...[parametern ]
Define macro.
.mlib filename
Identify library containing macro definitions.
.mexit
Go to .endm.
.endm
End macro definition.
Table 5–3. Manipulating Substitution Symbols
Mnemonic and Syntax
Description
.asg [“]character string[“], substitution symbol
Assign character string to substitution symbol.
.eval well-defined expression, substitution symbol
Perform arithmetic on numeric substitution symbols.
.var substitution symbol1 ...[substitution symboln ]
Define local macro symbols.
Table 5–4. Conditional Assembly
Mnemonic and Syntax
Description
.if well-defined expression
Begin conditional assembly.
.elseif well-defined expression
Optional conditional assembly block.
.else
Optional conditional assembly block.
.endif
End conditional assembly.
.loop [well-defined expression]
Begin repeatable block assembly.
.break [well-defined expression]
Optional repeatable block assembly.
.endloop
End repeatable block assembly.
Macro Language
5-25
Macro Directives Summary
Table 5–5. Producing Assembly-Time Messages
Mnemonic and Syntax
Description
.emsg
Send error message to standard output.
.wmsg
Send warning message to standard output.
.mmsg
Send warning or assembly-time message to standard
output.
Table 5–6. Formatting the Listing
Mnemonic and Syntax
Description
.fclist
Allow false conditional code block listing (default).
.fcnolist
Inhibit false conditional code block listing.
.mlist
Allow macro listings (default).
.mnolist
Inhibit macro listings.
.sslist
Allow expanded substitution symbol listing.
.ssnolist
Inhibit expanded substitution symbol listing (default).
5-26
Chapter 6
Archiver Description
The TMS320C54xt archiver combines several individual files into a single
archive file. For example, you can collect several macros into a macro library.
The assembler will search the library and use the members that are called as
macros by the source file. You can also use the archiver to collect a group of
object files into an object library. The linker will include in the library the members that resolve external references during the link.
Topic
Page
6.1
Archiver Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6.2
Archiver Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6.3
Invoking the Archiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
6.4
Archiver Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
Archiver Description
6-1
Archiver Overview
6.1 Archiver Overview
The TMS320C54x archiver lets you combine several individual files into a
single file called an archive or a library. Each file within the archive is called a
member. Once you have created an archive, you can use the archiver to add,
delete, or extract members.
You can build libraries from any type of files. Both the assembler and the linker
accept archive libraries as input; the assembler can use libraries that contain
individual source files, and the linker can use libraries that contain individual
object files.
One of the most useful applications of the archiver is building libraries of object
modules. For example, you can write several arithmetic routines, assemble
them, and use the archiver to collect the object files into a single, logical group.
You can then specify the object library as linker input. The linker will search the
library and include members that resolve external references.
You can also use the archiver to build macro libraries. You can create several
source files, each of which contains a single macro, and use the archiver to
collect these macros into a single, functional group. The .mlib assembler
directive lets you specify the name of a macro library; during the assembly
process, the assembler will search the specified library for the macros that you
call. Chapter 5, Macro Language, discusses macros and macro libraries in
detail.
6-2
Archiver Development Flow
6.2 Archiver Development Flow
Figure 6–1 shows the archiver’s role in the assembly language development
process. Both the assembler and the linker accept libraries as input.
Figure 6–1. Archiver Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
Assembler
source
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Translator
utility
Absolute lister
Cross-reference
lister
’C5000
processor
Archiver Description
6-3
Invoking the Archiver
6.3 Invoking the Archiver
To invoke the archiver, enter:
ar500 [–]command [option ] libname [filename1 ... filenamen ]
6-4
ar500
is the command that invokes the archiver.
command
tells the archiver how to manipulate the library members.
A command can be preceded by an optional hyphen. You
must use one of the following commands when you invoke
the archiver, but you can use only one command per
invocation. Valid archiver commands are:
a
adds the specified files to the library. This command does
not replace an existing member that has the same name
as an added file; it simply appends new members to the
end of the archive.
d
deletes the specified members from the library.
r
replaces the specified members in the library. If you don’t
specify filenames, the archiver replaces the library members with files of the same name in the current directory.
If the specified file is not found in the library, the archiver
adds it instead of replacing it.
t
prints a table of contents of the library. If you specify filenames, only those files are listed. If you don’t specify any
filenames, the archiver lists all the members in the specified library.
x
extracts the specified files. If you don’t specify member
names, the archiver extracts all library members. When
the archiver extracts a member, it simply copies the member into the current directory; it doesn’t remove it from the
library.
Invoking the Archiver
option
tells the archiver how to function. Specify as many of the
following options as you want:
–q
(quiet) suppresses the banner and status messages.
–s
prints a list of the global symbols that are defined in the
library. (This option is valid only with the –a, –r, and –d
commands.)
–v
(verbose) provides a file-by-file description of the creation
of a new library from an old library and its constituent
members.
libname
names an archive library. If you don’t specify an extension
for libname, the archiver uses the default extension .lib.
filename
names individual member files that are associated with
the library. You must specify a complete filename including
an extension, if applicable.
It is possible (but not desirable) for a library to contain
several members with the same name. If you attempt to
delete, replace, or extract a member, and the library
contains more than one member with the specified name,
then the archiver deletes, replaces, or extracts the first
member with that name.
Archiver Description
6-5
Archiver Examples
6.4 Archiver Examples
The following are some archiver examples:
- If you want to create a library called function.lib that contains the files
sine.obj, cos.obj, and flt.obj, enter:
ar500 –a function sine.obj cos.obj flt.obj
TMS320C54x Archiver
Version x.xx
Copyright (c) 2001
Texas Instruments Incorporated
==>
new archive ’function.lib’
==>
building archive ’function.lib’
- You can print a table of contents of function.lib with the –t option:
ar500 –t function
TMS320C54x Archiver
Copyright (c) 2001
FILE NAME
–––––––––––––––––
sine.obj
cos.obj
flt.obj
Version x.xx
Texas Instruments Incorporated
SIZE
DATE
––––– –––––––––––––––––––––––
248
Mon Nov 19 01:25:44 2001
248
Mon Nov 19 01:25:44 2001
248
Mon Nov 19 01:25:44 2001
- If you want to add new members to the library, enter:
ar500 –as function atan.obj
TMS320C54x Archiver
Version x.xx
Copyright (c) 2001
Texas Instruments Incorporated
==>
symbol defined: ’symbol_name’
==>
symbol defined: ’symbol_name’
==>
building archive ’function.lib’
Because this example doesn’t specify an extension for the libname, the
archiver adds the files to the library called function.lib. If function.lib didn’t
exist, the archiver would create it. (The –s option tells the archiver to list the
global symbols that are defined in the library.)
- If you want to modify a library member, you can extract it, edit it, and re-
place it. In this example, assume there’s a library named macros.lib that
contains the members push.asm, pop.asm, and swap.asm.
ar500 –x macros push.asm
The archiver makes a copy of push.asm and places it in the current
directory, but it doesn’t remove push.asm from the library. Now you can
edit the extracted file. To replace the copy of push.asm in the library with
the edited copy, enter:
ar500 –r macros push.asm
6-6
Chapter 7
Linker Description
The TMS320C54xt linker creates executable modules by combining COFF
object files. The concept of COFF sections is basic to linker operation.
Chapter 2, Introduction to Common Object File Format, discusses the COFF
format in detail.
Topic
Page
7.1
Linker Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
7.2
Linker Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
7.3
Invoking the Linker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
7.4
Linker Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
7.5
Linker Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-21
7.6
Object Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-25
7.7
The MEMORY Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-27
7.8
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-32
7.9
Specifying a Section’s Runtime Address . . . . . . . . . . . . . . . . . . . . . . . 7-44
7.10 Using UNION and GROUP Statements . . . . . . . . . . . . . . . . . . . . . . . . . . 7-48
7.11 Overlay Pages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-53
7.12 Default Allocation Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-58
7.13 Special Section Types (DSECT, COPY, and NOLOAD) . . . . . . . . . . . . 7-61
7.14 Assigning Symbols at Link Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-62
7.15 Creating and Filling Holes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-66
7.16 Partial (Incremental) Linking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-70
7.17 Linking C/C++ Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-72
7.18 Linker Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-76
Linker Description
7-1
Linker Overview
7.1 Linker Overview
The TMS320C54x linker allows you to configure system memory by allocating
output sections efficiently into the memory map. As the linker combines object
files, it performs the following tasks:
- Allocates sections into the target system’s configured memory.
- Relocates symbols and sections to assign them to final addresses.
- Resolves undefined external references between input files.
The linker command language controls memory configuration, output section
definition, and address binding. The language supports expression assignment and evaluation. You configure system memory by defining and creating
a memory model that you design. Two powerful directives, MEMORY and
SECTIONS, allow you to:
- Allocate sections into specific areas of memory.
- Combine object file sections.
- Define or redefine global symbols at link time.
7-2
Linker Development Flow
7.2 Linker Development Flow
Figure 7–1 illustrates the linker’s role in the assembly language development
process. The linker accepts several types of files as input, including object
files, command files, libraries, and partially linked files. The linker creates an
executable COFF object module that can be downloaded to one of several
development tools or executed by a TMS320C54x device.
Figure 7–1. Linker Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
Assembler
source
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Translator
utility
Absolute lister
Cross-reference
lister
C54x
Linker Description
7-3
Invoking the Linker
7.3 Invoking the Linker
The general syntax for invoking the linker is:
lnk500 [–options ] filename1 . ... filenamen
lnk500
is the command that invokes the linker.
options
can appear anywhere on the command line or in a linker
command file. (Options are discussed in Section 7.4, Linker
Options, on page 7-6.)
filenames
can be object files, linker command files, or archive libraries.
The default extension for all input files is .obj ; any other extension must be explicitly specified. The linker can determine
whether the input file is an object or ASCII file that contains
linker commands. The default output filename is a.out.
There are three methods for invoking the linker:
- Specify options and filenames on the command line. This example links
two files, file1.obj and file2.obj, and creates an output module named
link.out.
lnk500 file1.obj file2.obj –o link.out
- Enter the lnk500 command with no filenames and no options; the linker
prompts for them:
Command files :
Object files [.obj] :
Output file [a.out] :
Options :
7-4
J
For command files, enter one or more command filenames.
J
For object files, enter one or more object filenames. The default extension is .obj. Separate the filenames with spaces or commas; if the last
character is a comma, the linker prompts for an additional line of
object filenames.
J
The output file is the name of the linker output module. This overrides
any –o options entered with any of the other prompts. If there are no
–o options and you do not answer this prompt, the linker creates an
object file with a default filename of a.out.
J
The options prompt is for additional options, although you can also
enter them in a command file. Enter them with hyphens, just as you
would on the command line.
Invoking the Linker
- Put filenames and options in a linker command file. For example, assume
that the file linker.cmd contains the following lines:
–o link.out
file1.obj
file2.obj
Now you can invoke the linker from the command line; specify the
command filename as an input file:
lnk500 linker.cmd
When you use a command file, you can also specify other options and files
on the command line. For example, you could enter:
lnk500 –m link.map linker.cmd file3.obj
The linker reads and processes a command file as soon as it encounters
the filename on the command line, so it links the files in this order: file1.obj,
file2.obj, and file3.obj. This example creates an output file called link.out
and a map file called link.map.
Linker Description
7-5
Linker Options
7.4 Linker Options
Linker options control linking operations. They can be placed on the command
line or in a command file. Linker options must be preceded by a hyphen (–).
The order in which options are specified is unimportant, except for the –l
(lowercase L) and –i options. Options may be separated from arguments (if
they have them) by an optional space. The following summarize the linker
options:
7-6
–a
Produce an absolute, executable module. This is the
default; if neither –a nor –r is specified, the linker acts
as if –a were specified.
–ar
Produce a relocatable, executable object module.
–b
Disable merge of symbolic debugging information.
–c
Use linking conventions defined by the ROM autoinitialization model of the TMS320C54x C/C++ compiler.
–cr
Use linking conventions defined by the RAM autoinitialization model of the TMS320C54x C/C++ compiler.
–e global_symbol
Define a global_symbol that specifies the primary
entry point for the output module.
–f fill_value
Set the default fill value for holes within output sections; fill_value is a 16-bit constant.
–g global_symbol
Keep a global_symbol global (overrides –h).
–h
Make all global symbols static.
–help
–?
Display a listing of all available linker command line
options.
–heap size
Set heap size (for the dynamic memory allocation in
C) to size words and define a global symbol that specifies the heap size. The default size is 1K words.
–i dir
Alter the library-search algorithm to look in dir before
looking in the default location. This option must
appear before the –l option. The directory or filename
must follow operating system conventions.
–j
Disable conditional linking.
–k
Ignore alignment flags in input sections.
Linker Options
–l filename
Name an archive library file as linker input; filename
is an archive library name. This option must appear after the –i option. The directory or filename must follow
operating system conventions.
–m filename
Produce a map or listing of the input and output sections, including holes, and place the listing in filename.
–o filename
Name the executable output module. The default filename is a.out. The directory or filename must follow
operating system conventions.
–q
Request a quiet run (suppress the banner).
–r
Produce a relocatable output module.
–s
Strip symbol table information and line number entries
from the output module.
–stack size
Set C system stack size to size words and define a
global symbol that specifies the stack size. The default size is 1K words.
–u symbol
Place an unresolved external symbol into the output
module’s symbol table.
–vn
Specify the output COFF format, where n is 0, 1, or 2.
The default format is COFF2.
–w
Displays a message when an undefined output section is created.
–x
Force rereading of libraries. Resolves back references.
Linker Description
7-7
Linker Options
7.4.1
Relocation Capabilities (–a and –r Options)
The linker performs relocation, which is the process of adjusting all references
to a symbol when the symbol’s address changes. The linker supports two
options (–a and –r) that allow you to produce an absolute or a relocatable
output module. If neither –a nor –r is specified, the linker acts as if –a is specified by default.
- Producing an Absolute Output Module (–a Option)
When you use the –a option without the –r option, the linker produces an
absolute, executable output module. Absolute files contain no relocation
information. Executable files contain the following:
J
Special symbols defined by the linker (subsection 7.14.4, Symbols
Defined by the Linker, on page 7-65 describes these symbols)
J
An optional header that describes information such as the program
entry point
J
No unresolved references
The following example links file1.obj and file2.obj and creates an absolute
output module called a.out:
lnk500 –a file1.obj file2.obj
Note:
–a and –r Options
If you do not use the –a or the –r option, the linker acts as if you specified
–a.
7-8
Linker Options
- Producing a Relocatable Output Module (–r Option)
When you use the –r option without the –a option, the linker retains
relocation entries in the output module. If the output module will be
relocated (at load time) or relinked (by another linker execution), use –r to
retain the relocation entries.
The linker produces a file that is not executable when you use the –r option
without –a. A file that is not executable does not contain special linker
symbols or an optional header. The file may contain unresolved references, but these references do not prevent creation of an output module.
The following example links file1.obj and file2.obj and creates a relocatable output module called a.out:
lnk500 –r file1.obj file2.obj
The output file a.out can be relinked with other object files or relocated at
load time. (Linking a file that will be relinked with other files is called partial
linking.) For more information, see Section 7.18, Linker Example, on page
7-76.
- Producing an Executable Relocatable Output Module (–ar)
If you invoke the linker with both the –a and –r options, the linker produces
an executable, relocatable object module. The output file contains the
special linker symbols, an optional header, and all resolved symbol
references; however, the relocation information is retained.
The following example links file1.obj and file2.obj and creates an
executable, relocatable output module called xr.out:
lnk500 –ar file1.obj file2.obj –o xr.out
You can string the options together (lnk500 –ar) or enter them separately
(lnk500 –a –r).
- Relocating or Relinking an Absolute Output Module
The linker issues a warning message (but continues executing) when it
encounters a file that contains no relocation or symbol table information.
Relinking an absolute file can be successful only if each input file contains
no information that needs to be relocated (that is, each file has no
unresolved references and is bound to the same virtual address that it was
bound to when the linker created it).
Linker Description
7-9
Linker Options
7.4.2
Disable Merge of Symbolic Debugging Information (–b Option)
By default, the linker eliminates duplicate entries of symbolic debugging
information. Such duplicate information is commonly generated when a C
program is compiled for debugging. For example:
–[ header.h ]–
typedef struct
{
<define some structure members>
} XYZ;
–[ f1.c ]–
#include ”header.h”
...
–[ f2.c ]–
#include ”header.h”
...
When these files are compiled for debugging, both f1.obj and f2.obj will have
symbolic debugging entries to describe type XYZ. For the final output file, only
one set of these entries is necessary. The linker eliminates the duplicate
entries automatically.
Use the –b option if you want the linker to keep such duplicate entries. Using
the –b option has the effect of the linker running faster and using less machine
memory.
7.4.3
C Language Options (–c and –cr Options)
The –c and –cr options cause the linker to use linking conventions that are
required by the C/C++ compiler.
- The –c option tells the linker to use the ROM autoinitialization model.
- The –cr option tells the linker to use the RAM autoinitialization model.
For more information about linking C/C++ code, see Section 7.17, Linking
C/C++ Code, on page 7-72 and subsection 7.17.5, The –c and –cr Linker
Options, on page 7-75.
7-10
Linker Options
7.4.4
Define an Entry Point (–e global_symbol Option)
The memory address at which a program begins executing is called the entry
point. When a loader loads a program into target memory, the program counter
must be initialized to the entry point; the PC then points to the beginning of the
program.
The linker can assign one of four possible values to the entry point. These
values are listed below in the order in which the linker tries to use them. If you
use one of the first three values, it must be an external symbol in the symbol
table.
- The value specified by the –e option. The syntax is:
–e global_symbol
Where global_symbol defines the entry point and must appear as an
external symbol in one of the input files.
- The value of symbol _c_int00 (if present). _c_int00 must be the entry point
if you are linking code produced by the C/C++ compiler.
- The value of symbol _main (if present).
- Zero (default value).
This example links file1.obj and file2.obj. The symbol begin is the entry point;
begin must be defined as external in file1 or file2.
lnk500 –e begin file1.obj file2.obj
7.4.5
Set Default Fill Value (–f cc Option)
The –f option fills the holes formed within output sections or initializes uninitialized sections when they are combined with initialized sections. This allows you
to initialize memory areas during link time without reassembling a source file.
The argument cc is a 16-bit constant (up to four hexadecimal digits). If you do
not use –f, the linker uses 0 as the default fill value.
This example fills holes with the hexadecimal value ABCD.
lnk500 –f 0ABCDh file1.obj file2.obj
Linker Description
7-11
Linker Options
7.4.6
Make a Symbol Global (–g global_symbol Option)
The –h option makes all global symbols static. If you have a symbol that you
want to remain global and you use the –h option, you can use the –g option
to declare that symbol to be global. The –g option overrides the effect of the
–h option for the symbol that you specify. The syntax for the –g option is:
–g global_symbol
7.4.7
Make All Global Symbols Static (–h Option)
The –h option makes all global symbols defined with the .global assembler
directive static. Static symbols are not visible to externally linked modules. By
making global symbols static, global symbols are essentially hidden. This
allows external symbols with the same name (in different files) to be treated
as unique.
The –h option effectively nullifies all .global assembler directives. All symbols
become local to the module in which they are defined, so no external
references are possible. For example, assume that b1.obj, b2.obj, and b3.obj
are related and reference a global variable GLOB. Also assume that d1.obj,
d2.obj, and d3.obj are related and reference a separate global variable GLOB.
By using the –h option and partial linking, you can link the related files without
conflict.
lnk500 –h –r b1.obj b2.obj b3.obj –o bpart.out
lnk500 –h –r d1.obj d2.obj d3.obj –o dpart.out
The –h option guarantees that bpart.out and dpart.out do not have global
symbols and therefore, that two distinct versions of GLOB exist. The –r option
is used to allow bpart.out and dpart.out to retain their relocation entries. These
two partially linked files can then be linked together safely with the following
command:
lnk500 bpart.out dpart.out –o system.out
7.4.8
Define Heap Size (–heap constant Option)
The C/C++ compiler uses an uninitialized section called .sysmem for the C
runtime memory pool used by malloc( ). You can set the size of this memory
pool at link time by using the –heap option. Specify the size in words as a
constant immediately after the option:
lnk500 –heap 0x0400 /* defines a heap size */
The linker creates the .sysmem section only if there is a .sysmem section in
one of the input files.
7-12
Linker Options
The linker also creates a global symbol __SYSMEM_SIZE and assigns it a
value equal to the size of the heap. The default size is 1K words.
For more information about linking C code, see Section 7.17, Linking C Code,
on page 7-72.
7.4.9 Alter the Library Search Algorithm (–l Option, –i Option, and
C54X_C_DIR/C_DIR Environment Variables)
Usually, when you want to specify a library as linker input, you simply enter the
library name as you would any other input filename; the linker looks for the
library in the current directory. For example, suppose the current directory
contains the library object.lib. Assume that this library defines symbols that are
referenced in the file file1.obj. This is how you link the files:
lnk500 file1.obj object.lib
If you want to use a library that is not in the current directory, use the –l
(lowercase L) linker option. The syntax for this option is:
–l filename
The filename is the name of an archive library; the space between –l and the
filename is optional.
You can augment the linker’s directory search algorithm by using the –i linker
option or the C_DIR or C54X_C_DIR environment variables. The linker
searches for object libraries in the following order:
1) It searches directories named with the –i linker option.
2) It searches directories named with C_DIR and C54X_C_DIR.
3) If C_DIR and C54X_C_DIR are not set, it searches directories named with
the assembler’s environment variables, C54X_A_DIR and A_DIR.
4) It searches the current directory.
Linker Description
7-13
Linker Options
7.4.9.1
Name an Alternate Library Directory (–i Option)
The –i option names an alternate directory that contains object libraries. The
syntax for this option is:
–i dir
The dir names a directory that contains object libraries; the space between –i
and the directory name is optional.
When the linker is searching for object libraries named with the –l option, it
searches through directories named with –i first. Each –i option specifies only
one directory, but you can use several –i options per invocation. When you use
the –i option to name an alternate directory, it must precede the –l option on
the command line or in a command file.
For example, assume that there are two archive libraries called r.lib and
lib2.lib. The table below shows the directories that r.lib and lib2.lib reside in,
how to set environment variable, and how to use both libraries during a link.
Select the row for your operating system:
Operating System
Pathname
Invocation Command
DOS
\ld and \ld2
lnk500 f1.obj f2.obj –i\ld –i\ld2 –lr.lib –llib2.lib
UNIX
/ld and /ld2
lnk500 f1.obj f2.obj –i/ld –i/ld2 –lr.lib –llib2.lib
7-14
Linker Options
7.4.9.2
Name an Alternate Library Directory (C_DIR Environment Variable)
An environment variable is a system symbol that you define and assign a
string to. The linker uses environment variables named C_DIR and
C54X_C_DIR to name alternate directories that contain object libraries. The
commands for assigning the environment variable are:
Operating System
Enter
DOS
set C_DIR= pathname;another pathname ...
UNIX
setenv C_DIR ”pathname;another pathname ...”
The pathnames are directories that contain object libraries. Use the –l option
on the command line or in a command file to tell the linker which libraries to
search for.
In the example below, assume that two archive libraries called r.lib and lib2.lib
reside in ld and ld2 directories. The table below shows the directories that r.lib
and lib2.lib reside in, how to set the environment variable, and how to use both
libraries during a link. Select the row for your operating system:
Operating System
Pathname
Invocation Command
DOS
\ld and \ld2
set C_DIR=\ld;\ld2
lnk500 f1.obj f2.obj –l r.lib –l lib2.lib
UNIX
/ld and /ld2
setenv C_DIR ”/ld ;/ld2”
lnk500 f1.obj f2.obj –l r.lib –l lib2.lib
Linker Description
7-15
Linker Options
Note that the environment variable remains set until you reboot the system or
reset the variable by entering:
Operating System
Enter
DOS
set C_DIR=
UNIX
unsetenv C_DIR
The assembler uses an environment variable named A_DIR to name alternative directories that contain copy/include files or macro libraries. If C_DIR is
not set, the linker will search for object libraries in the directories named with
A_DIR. Section 7.6, Object Libraries, on page 7-25 contains more information
about object libraries.
7.4.10 Disable Conditional Linking (–j Option)
The –j option disables conditional linking that has been set up with the
assembler .clink directive. By default, all sections are unconditionally linked.
7.4.11 Ignore Alignment Flags (–k Option)
The –k option forces the linker to ignore any SECTIONS directive alignment
specifications. For more information on the SECTIONS directive, see Section
7.8, “The SECTIONS Directive”.
7.4.12 Create a Map File (–m filename Option)
The –m option creates a linker map listing and puts it in filename. The syntax
for the –m option is:
–m filename
The linker map describes:
- Memory configuration
- Input and output section allocation
- The addresses of external symbols after they have been relocated
The map file contains the name of the output module and the entry point; it may
also contain up to three tables:
- A table showing the new memory configuration if any non-default memory
is specified
- A table showing the linked addresses of each output section and the input
sections that make up the output sections
7-16
Linker Options
- A table showing each external symbol and its address. This table has two
columns: the left column contains the symbols sorted by name, and the
right column contains the symbols sorted by address
This example links file1.obj and file2.obj and creates a map file called file.map:
lnk500 file1.obj file2.obj –m file.map
Example 7–15 on page 7-78 shows an example of a map file.
7.4.13 Name an Output Module (–o filename Option)
The linker creates an output module when no errors are encountered. If you
do not specify a filename for the output module, the linker gives it the default
name a.out. If you want to write the output module to a different file, use the
–o option. The syntax for the –o option is:
–o filename
The filename is the new output module name.
This example links file1.obj and file2.obj and creates an output module named
run.out:
lnk500 –o run.out file1.obj file2.obj
7.4.14 Specify a Quiet Run (–q Option)
The –q option suppresses the linker’s banner when –q is the first option on the
command line or in a command file. This option is useful for batch operation.
7.4.15 Strip Symbolic Information (–s Option)
The –s option creates a smaller output module by omitting symbol table
information and line number entries. The –s option is useful for production
applications when you must create the smallest possible output module.
This example links file1.obj and file2.obj and creates an output module,
stripped of line numbers and symbol table information, named nosym.out:
lnk500 –o nosym.out –s file1.obj file2.obj
Using the –s option limits later use of a symbolic debugger and may prevent
a file from being relinked.
Linker Description
7-17
Linker Options
7.4.16 Define Stack Size (–stack constant Option)
The TMS320C54x C/C++ compiler uses an uninitialized section, .stack, to
allocate space for the runtime stack. You can set the size of the .stack section
at link time with the –stack option. Specify the size in words as a constant
immediately after the option:
lnk500 –stack 0x1000 /* defines a stack size */
If you specified a different stack size in an input section, the input section stack
size is ignored. Any symbols defined in the input section remain valid; only the
stack size will be different.
When the linker defines the .stack section, it also defines a global symbol,
__STACK_SIZE, and assigns it a value equal to the size of the section. The
default stack size is 1K words.
7.4.17 Introduce an Unresolved Symbol (–u symbol Option)
The –u option introduces an unresolved symbol into the linker’s symbol table.
This forces the linker to search a library and include the member that defines
the symbol. The linker must encounter the –u option before it links in the
member that defines the symbol.
For example, suppose a library named rts.lib contains a member that defines
the symbol symtab; none of the object files being linked reference symtab.
However, suppose you plan to relink the output module, and you would like to
include the library member that defines symtab in this link. Using the –u option
as shown below forces the linker to search rts.lib for the member that defines
symtab and to link in the member.
lnk500 –u symtab file1.obj file2.obj rts.lib
If you do not use –u, this member is not included because there is no explicit
reference to it in file1.obj or file2.obj.
7-18
Linker Options
7.4.18 Specify a COFF Format (–v Option)
The –v option specifies the format the linker will use to create the COFF object
file. The COFF object file is the output of the linker. The format specifies how
information in the object file is arranged.
The linker can read and write COFF0, COFF1, and COFF2 formats. By
default, the linker creates COFF2 files. To create a different output format, use
the –v option where n is 0 for COFF0 or 1 for COFF1.
Chapter 2, Introduction to Common Object File Format, and Appendix A,
Common Object File Format, provide further information on COFF.
7.4.19 Display a Message for Output Section Information (–w Option)
The –w option displays additional messages pertaining to the creation of
memory sections. Additional messages are displayed in the following
circumstances:
- In a linker command file, you can set up a SECTIONS directive that
describes how input sections are combined into output sections. However,
if the linker encounters one or more input sections that do not have a corresponding output section defined in the SECTIONS directive, the linker
combines the input sections that have the same name into an output
section with that name. By default, the linker does not display a message
to tell you when this has occurred.
If this situation occurs and you use the –w option, the linker displays a
message when it creates a new output section.
- If you do not use the –heap and –stack options, the linker creates the
.sysmem and .stack, respectively, sections for you. Each section has a
default size of 0x400 words. You might not have enough memory available
for one or both of these sections. In this case, the linker issues an error
message saying a section could not be allocated.
If you use the –w option, the linker displays another message with more
details, which includes the name of the directive to allocate the .sysmem
or .stack section yourself.
For more information about the SECTIONS directive, see Section 7.8, The
SECTIONS Directive, on page 7-32. For more information about the default
actions of the linker, see Section 7.12, Default Allocation Algorithm, on page
7-58.
Linker Description
7-19
Linker Options
7.4.20 Exhaustively Read Libraries (–x Option)
The linker normally reads input files, including archive libraries, only once
when they are encountered on the command line or in the command file. When
an archive is read, any members that resolve references to undefined symbols
are included in the link. If an input file later references a symbol defined in a
previously read archive library, the reference will not be resolved.
With the –x option, you can force the linker to reread all libraries. The linker
rereads libraries until no more references can be resolved. Linking using the
–x option may be slower, so you should use it only as needed. For example,
if a.lib contains a reference to a symbol defined in b.lib, and b.lib contains a
reference to a symbol defined in a.lib, you can resolve the mutual
dependencies by listing one of the libraries twice, as in:
lnk500 –la.lib –lb.lib –la.lib
or you can force the linker to do it for you:
lnk500 –x –la.lib –lb.lib
7-20
Linker Command Files
7.5 Linker Command Files
Linker command files allow you to put linking information in a file; this is useful
when you invoke the linker often with the same information. Linker command
files are also useful because they allow you to use the MEMORY and
SECTIONS directives to customize your application. You must use these
directives in a command file; you cannot use them on the command line.
Linker command files are ASCII files that contain one or more of the following:
- Input filenames, which specify object files, archive libraries, or other
command files.
- Linker options, which can be used in the command file in the same manner
that they are used on the command line.
- The MEMORY and SECTIONS linker directives. The MEMORY directive
defines the target memory configuration. The SECTIONS directive
controls how sections are built and allocated.
- Assignment statements, which define and assign values to global sym-
bols.
To invoke the linker with a command file, enter the lnk500 command and follow it with the name of the command file:
lnk500 command_filename
The linker processes input files in the order that it encounters them. If the linker
recognizes a file as an object file, it links it. Otherwise, it assumes that a file
is a command file and begins reading and processing commands from it.
Command filenames are case sensitive, regardless of the system used.
Linker Description
7-21
Linker Command Files
Example 7–1 shows a sample linker command file called link.cmd.
(Subsection 2.4.2, Placing Sections in the Memory Map, on page 2-15 contains another example of a linker command file.)
Example 7–1. Linker Command File
a.obj
b.obj
–o prog.out
–m prog.map
/*
/*
/*
/*
First input filename
Second input filename
Option to specify output file
Option to specify map file
*/
*/
*/
*/
The sample file in Example 7–1 contains only filenames and options. You can
place comments in a command file by delimiting them with /* and */. To invoke
the linker with this command file, enter:
lnk500 link.cmd
You can place other parameters on the command line when you use a
command file:
lnk500 –r link.cmd c.obj d.obj
The linker processes the command file as soon as it encounters it, so a.obj
and b.obj are linked into the output module before c.obj and d.obj.
You can specify multiple command files. If, for example, you have a file called
names.lst that contains filenames and another file called dir.cmd that contains
linker directives, you could enter:
lnk500 names.lst dir.cmd
One command file can call another command file; this type of nesting is limited
to 16 levels.
Blanks and blank lines are insignificant in a command file except as delimiters.
This also applies to the format of linker directives in a command file.
Note:
Filenames and Option Parameters With Spaces or Hyphens
Within the command file, filenames and option parameters containing
embedded spaces or hyphens must be surrounded with quotation marks.
For example: “this-file.obj”
7-22
Linker Command Files
Example 7–2 shows a sample command file that contains linker directives.
(Linker directive formats are discussed in later sections.)
Example 7–2. Command File With Linker Directives
a.obj b.obj c.obj
–o prog.out –m prog.map
MEMORY
{
RAM:
ROM:
}
/* Input filenames
/* Options
/* MEMORY directive
origin = 100h
origin = 01000h
SECTIONS
{
.text:
.data:
.bss:
}
*/
*/
*/
length = 0100h
length = 0100h
/* SECTIONS directive
*/
> ROM
> RAM
> RAM
Linker Description
7-23
Linker Command Files
7.5.1
Reserved Names in Linker Command Files
The following names are reserved as keywords for linker directives. Do not
use them as symbol or section names in a command file.
align
ALIGN
attr
ATTR
block
BLOCK
COPY
DSECT
f
fill
FILL
group
7.5.2
GROUP
l (lowercase L)
len
length
LENGTH
load
LOAD
MEMORY
NOLOAD
o
org
origin
ORIGIN
page
PAGE
range
run
RUN
SECTIONS
spare
type
TYPE
UNION
Constants in Command Files
Constants can be specified with either of two syntax schemes: the scheme
used for specifying decimal, octal, or hexadecimal constants used in the
assembler (see Section 3.6, Constants, on page 3-15) or the scheme used for
integer constants in C syntax.
Examples:
7-24
Decimal
Octal
Hexadecimal
Assembler Format:
32
40q
20h
C Format:
32
040
0x20
Object Libraries
7.6 Object Libraries
An object library is a partitioned archive file that contains complete object files
as members. Usually, a group of related modules are grouped together into
a library. When you specify an object library as linker input, the linker includes
any members of the library that define existing unresolved symbol references.
You can use the archiver to build and maintain libraries. Chapter 6, Archiver
Description, contains more information about the archiver.
Using object libraries can reduce link time and the size of the executable
module. Normally, if an object file that contains a function is specified at link
time, it is linked whether it is used or not; however, if that same function is
placed in an archive library, it is included only if it is referenced.
The order in which libraries are specified is important because the linker
includes only those members that resolve symbols that are undefined when
the library is searched. The same library can be specified as often as necessary; it is searched each time it is included. Alternatively, the –x option can be
used. A library has a table that lists all external symbols defined in the library;
the linker searches through the table until it determines that it cannot use the
library to resolve any more references.
The following examples link several files and libraries. Assume that:
- Input files f1.obj and f2.obj both reference an external function named
clrscr
- Input file f1.obj references the symbol origin
- Input file f2.obj references the symbol fillclr
- Member 0 of library libc.lib contains a definition of origin
- Member 3 of library liba.lib contains a definition of fillclr
- Member 1 of both libraries defines clrscr
For example, if you enter the following, the references are resolved as shown:
lnk500 f1.obj liba.lib f2.obj libc.lib
- Member 1 of liba.lib satisfies both references to clrscr because the library
is searched and clrscr is defined before f2.obj references it.
- Member 0 of libc.lib satisfies the reference to origin.
- Member 3 of liba.lib satisfies the reference to fillclr.
Linker Description
7-25
Object Libraries
If, however, you enter the following, all the references to clrscr are satisfied
by member 1 of libc.lib:
lnk500 f1.obj f2.obj libc.lib liba.lib
If none of the linked files reference symbols defined in a library, you can use
the –u option to force the linker to include a library member. The next example
creates an undefined symbol rout1 in the linker’s global symbol table:
lnk500 –u rout1 libc.lib
If any member of libc.lib define rout1, the linker includes those members.
It is not possible to control the allocation of individual library members;
members are allocated according to the SECTIONS directive default
allocation algorithm.
Subsection 7.4.9, Alter the Library Search Algorithm (–i dir Option/C_DIR), on
page 7-13, describes methods for specifying directories that contain object
libraries.
7-26
The MEMORY Directive
7.7 The MEMORY Directive
The linker determines where output sections should be allocated in memory;
it must have a model of target memory to accomplish this task. The MEMORY
directive allows you to specify a model of target memory so that you can define
the types of memory your system contains and the address ranges they
occupy. The linker maintains the model as it allocates output sections and
uses it to determine which memory locations can be used for object code.
The memory configurations of TMS320C54x systems differ from application
to application. The MEMORY directive allows you to specify a variety of
configurations. After you use MEMORY to define a memory model, you can
use the SECTIONS directive to allocate output sections into defined memory.
Refer to Section 2.4, How the Linker Handles Sections, on page 2-13 for
details on how the linker handles sections. Refer to Section 2.5, Relocation,
on page 2-16 for information on the relocation of sections.
7.7.1
Default Memory Model
The assembler enables you to assemble code for the TMS320C54x device.
The assembler inserts a field in the output file’s header, identifying the device.
The linker reads this information from the object file’s header. If you do not use
the MEMORY directive, the linker uses a default memory model specific to the
named device. For more information about the default memory model, see
subsection 7.12.1, Allocation Algorithm, on page 7-58.
7.7.2
MEMORY Directive Syntax
The MEMORY directive identifies ranges of memory that are physically
present in the target system and can be used by a program. Each memory
range has a name, a starting address, and a length.
C54x devices have separate memory spaces that occupy the same address
ranges. In the default model, one space is dedicated to program areas, while
a second is dedicated to data (the number of separate address spaces
depends on the customized configuration of your chip. See the TMS320C54x
DSP Reference Set for more information).
The linker allows you to configure these address spaces separately by using
the MEMORY directive’s PAGE option. In the default model, PAGE 0 refers
to program memory, and PAGE 1 refers to data memory. The linker treats
these two pages as completely separate memory spaces. The C54x supports
as many as 255 PAGES, but the number available to you depends on the
configuration you have chosen.
Linker Description
7-27
The MEMORY Directive
When you use the MEMORY directive, be sure to identify all the memory
ranges that are available for object code. Memory defined by the MEMORY
directive is configured memory; any memory that you do not explicitly account
for with the MEMORY directive is unconfigured memory. The linker does not
place any part of a program into unconfigured memory. You can represent
nonexistent memory spaces by simply not including an address range in a
MEMORY directive statement.
The MEMORY directive is specified in a command file by the word MEMORY
(uppercase), followed by a list of memory range specifications enclosed in
braces. The MEMORY directive in Example 7–3 defines a system that has 4K
words of ROM at address C00h in program memory, 32 words of RAM at
address 60h in data memory, and 4K words at address 80h in data memory.
Example 7–3. The MEMORY Directive
/**************************************************/
/*
Sample command file with MEMORY directive
*/
/**************************************************/
file1.obj
file2.obj
/* Input files */
–o prog.out
/* Options
*/
MEMORY
directive
PAGE
options
MEMORY
{
PAGE 0:
PAGE 1:
ROM:
origin = C00h,
length = 1000h
SCRATCH:
ONCHIP:
origin =
origin =
length =
20h
length = 1000h
60h,
80h,
}
names
7-28
origins
lengths
The MEMORY Directive
The general syntax for the MEMORY directive is:
MEMORY
{
PAGE 0 : name 1 [(attr)] : origin = constant , length = constant;
PAGE n : name n [(attr)] : origin = constant , length = constant;
}
PAGE
identifies a memory space. You can specify up to 255 pages,
depending on your configuration; usually, PAGE 0 specifies
program memory, and PAGE 1 specifies data memory. If you do
not specify a PAGE, the linker acts as if you specified PAGE 0.
Each PAGE represents a completely independent address space.
Configured memory on PAGE 0 can overlap configured memory
on PAGE 1.
name
Names a memory range. A memory name may be one to 64 characters; valid characters include A–Z, a–z, $, ., and _. The names
have no special significance to the linker; they simply identify
memory ranges. Memory range names are internal to the linker
and are not retained in the output file or in the symbol table.
Memory ranges on separate pages can have the same name; within a page, however, all memory ranges must have unique names
and must not overlap.
attr
Specifies one to four attributes associated with the named range.
Attributes are optional; when used, they must be enclosed in
parentheses. Attributes restrict the allocation of output sections
into certain memory ranges. If you do not use any attributes, you
can allocate any output section into any range with no restrictions.
Any memory for which no attributes are specified (including all
memory in the default model) has all four attributes. Valid attributes
include:
R
W
X
I
origin
specifies that the memory can be read
specifies that the memory can be written to
specifies that the memory can contain executable code
specifies that the memory can be initialized
Specifies the starting address of a memory range; enter as origin,
org, or o. The value, specified in words, is a 16-bit constant and
may be decimal, octal, or hexadecimal.
Linker Description
7-29
The MEMORY Directive
length
Specifies the length of a memory range; enter as length, len, or l.
The value, specified in words, is a 16-bit constant and may be decimal, octal, or hexadecimal.
fill
Specifies a fill character for the memory range; enter as fill or f. Fills
are optional. The value is a 2-byte integer constant and may be
decimal, octal, or hexadecimal. The fill value will be used to fill
areas of the memory range that are not allocated to a section.
Note:
Filling Memory Ranges
If you specify fill values for large memory ranges, your output file will be very
large because filling a memory range (even with 0s) causes raw data to be
generated for all unallocated blocks of memory in the range.
The following example specifies a memory range with the R and W attributes
and a fill constant of 0FFFFh:
MEMORY
{
RFILE (RW) : o = 02h, l = 0FEh, f = 0FFFFh
}
You normally use the MEMORY directive in conjunction with the SECTIONS
directive to control allocation of output sections. After you use the MEMORY
directive to specify the target system’s memory model, you can use the
SECTIONS directive to allocate output sections into specific named memory
ranges or into memory that has specific attributes. For example, you could
allocate the .text and .data sections into the area named ROM and allocate
the .bss section into the area named ONCHIP.
Figure 7–2 illustrates the memory map shown in Example 7–3.
7-30
The MEMORY Directive
Figure 7–2. Memory Map Defined in Example 7–3
Data Memory
ÏÏÏÏ
ÏÏÏÏ
0005Fh
00060h
0007Fh
00080h
SCRATCH
ONCHIP
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
on-chip
RAM
0107Fh
01080h
0FFFFh
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
ÏÏÏÏ
Program Memory
00000h
00000h
00C00h
ROM
01C00h
0FFFFh
ÏÏÏÏ
ÏÏÏÏ
on-chip
ROM
Linker Description
7-31
The SECTIONS Directive
7.8 The SECTIONS Directive
The SECTIONS directive:
- Describes how input sections are combined into output sections
- Defines output sections in the executable program
- Specifies where output sections are placed in memory (in relation to each
other and to the entire memory space)
- Permits renaming of output sections
Refer to Section 2.4, How the Linker Handles Sections, on page 2-13 for
details on how the linker handles sections. Refer to Section 2.5, Relocation,
on page 2-16 for information on the relocation of sections. Refer to subsection
2.3.4, Subsections, on page 2-9 for information on defining subsections;
subsections allow you to manipulate sections with greater precision.
7.8.1
Default Configuration
If you do not specify a SECTIONS directive, the linker uses a default algorithm
for combining and allocating the sections. Section 7.12, Default Allocation
Algorithm, on page 7-58 describes this algorithm in detail.
7.8.2
SECTIONS Directive Syntax
The SECTIONS directive is specified in a command file by the word
SECTIONS (uppercase), followed by a list of output section specifications
enclosed in braces.
The general syntax for the SECTIONS directive is:
SECTIONS
{
name : [property, property, property,... ]
name : [property, property, property,... ]
name : [property, property, property,... ]
}
7-32
The SECTIONS Directive
Each section specification, beginning with name, defines an output section.
(An output section is a section in the output file.) After the section name is a
list of properties that define the section’s contents and how the section is
allocated. The properties may be separated by optional commas. Possible
properties for a section are:
- Load allocation, which defines where in memory the section is to be
loaded
Syntax:
load = allocation
allocation
> allocation
or
or
- Run allocation, which defines where in memory the section is to be run
Syntax:
run = allocation
run > allocation
or
- Input sections, which define the input sections that constitute the output
section
Syntax:
{ input_sections }
- Section type, which defines flags for special section types
Syntax:
type = COPY
or
type = DSECT
or
type = NOLOAD
For more information on section types, see Section 7.13, Special Section
Types (DSECT, COPY, and NOLOAD), on page 7-61.
- Fill value, which defines the value used to fill uninitialized holes
fill = value
or
name: ... { ... } = value
For more information on creating and filling holes, see Section 7.15,
Creating and Filling Holes, on page 7-66.
Syntax:
Example 7–4 shows a SECTIONS directive in a sample linker command file.
Figure 7–3 shows how these sections are allocated in memory.
Linker Description
7-33
The SECTIONS Directive
Example 7–4. The SECTIONS Directive
/**************************************************/
/* Sample command file with SECTIONS directive
*/
/**************************************************/
file1.obj
file2.obj
/* Input files */
–o prog.out
/* Options
*/
SECTIONS
directive
section
specifications
SECTIONS
{
.text:
load = ROM, run = 800h
.const:
load = ROM
.bss:
load = RAM
.vectors: load = FF80h
{
t1.obj(.intvec1)
t2.obj(.intvec2)
endvec = .;
}
.data:
align = 16
}
Figure 7–3 shows the five output sections defined by the sections directive in
Example 7–4: .vectors, .text, .const, .bss, and .data.
Figure 7–3. Section Allocation Defined by Example 7–4
RAM
00h
.bss
– allocated in RAM
.data
– aligned on 16-word
boundary
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
The .bss section combines the .bss sections from
file1.obj and file2.obj.
The .data section combines the .data sections from
file1.obj and file2.obj. The linker will place it anywhere there is space for it (in RAM in this illustration)
and align it to a 16-word boundary.
ROM
.text
– allocated in ROM
.const
– allocated in ROM
The .text section combines the .text sections from
file1.obj and file2.obj. The linker combines all sections named .text into this section. The application
must relocate the section to run at 0800h.
The .const section combines the .const sections
from file1.obj and file2.obj.
FF80h
7-34
.vectors
– bound at 0FF80h
The .vectors section is composed of the .intvec1
section from t1.obj and the .intvec2 section from
t2.obj.
The SECTIONS Directive
7.8.3
Allocation
The linker assigns each output section two locations in target memory: the
location where the section will be loaded and the location where it will be run.
Usually, these are the same, and you can think of each section as having only
a single address. In any case, the process of locating the output section in the
target’s memory and assigning its address(es) is called allocation. For more
information about using separate load and run allocation, see Section 7.9,
Specifying a Section’s Runtime Address, on page 7-44.
If you do not tell the linker how a section is to be allocated, it uses a default
algorithm to allocate the section. Generally, the linker puts sections wherever
they fit into configured memory. You can override this default allocation for a
section by defining it within a SECTIONS directive and providing instructions
on how to allocate it.
You control allocation by specifying one or more allocation parameters. Each
parameter consists of a keyword, an optional equal sign or greater-than sign,
and a value optionally enclosed in parentheses. If load and run allocation is
separate, all parameters following the keyword LOAD apply to load allocation,
and those following RUN apply to run allocation. Possible allocation
parameters are:
Binding
allocates a section at a specific address.
.text: load = 0x1000
Memory
allocates the section into a range defined in the MEMORY
directive with the specified name (like ROM) or attributes.
.text: load > ROM
Alignment
uses the align keyword to specify that the section should
start on an address boundary.
.text: align = 0x80
To force the output section containing the assignment to also
be aligned, assign . (dot) with an align expression. For example, the following will align bar.obj, and it will force outsect to
align on a 0x40 word boundary:
SECTIONS
{
outsect:
{
bar.obj(.bss)
. = align(0x40);
}
}
Linker Description
7-35
The SECTIONS Directive
Blocking
uses the block keyword to specify that the section must fit
between two address boundaries: if the section is too big, it
will start on an address boundary.
.text: block(0x80)
Page
specifies the memory page to be used (see Section 7.11,
Overlay Pages, on page 7-53).
.text: PAGE 0
For the load (usually the only) allocation, you may simply use a greater-than
sign and omit the load keyword:
.text: > ROM
.text: > 0x1000
.text: {...} > ROM
If more than one parameter is used, you can string them together as follows:
.text: > ROM align 16 PAGE 2
Or, if you prefer, use parentheses for readability:
.text: load = (ROM align(16) page (2))
7.8.3.1
Binding
You can supply a specific starting address for an output section by following
the section name with an address:
.text: 0x1000
This example specifies that the .text section must begin at word location
1000h. The binding address must be a 16-bit constant.
Output sections can be bound anywhere in configured memory (assuming
there is enough space), but they cannot overlap. If there is not enough space
to bind a section to a specified address, the linker issues an error message.
Note:
Binding and Alignment or Named Memory are Incompatible
You cannot bind a section to an address if you use alignment or named
memory. If you try to do so, the linker issues an error message.
7-36
The SECTIONS Directive
7.8.3.2
Named memory
You can allocate a section into a memory range that is defined by the
MEMORY directive. This example names ranges and links sections into them:
MEMORY
{
ROM (RIX) :
RAM (RWIX) :
}
origin = 0C00h,
origin = 0080h,
SECTIONS
{
.text :
.data ALIGN(128) :
.bss
:
length = 1000h
length = 1000h
> ROM
> RAM
> RAM
In this example, the linker places .text into the area called ROM. The .data and
.bss output sections are allocated into RAM. You can align a section within a
named memory range; the .data section is aligned on a 128-word boundary
within the RAM range.
Similarly, you can link a section into an area of memory that has particular
attributes. To do this, specify a set of attributes (enclosed in parentheses)
instead of a memory name. Using the same MEMORY directive declaration,
you can specify:
SECTIONS
{
.text:
.data:
.bss :
}
> (X)
> (RI)
> (RW)
/* .text ––> executable memory
/* .data ––> read or init memory
/* .bss ––> read or write memory
*/
*/
*/
In this example, the .text output section can be linked into either the ROM or
RAM area because both areas have the X attribute. The .data section can also
go into either ROM or RAM because both areas have the R and I attributes.
The .bss output section, however, must go into the RAM area because only
RAM is declared with the W attribute.
You cannot control where in a named memory range a section is allocated,
although the linker uses lower memory addresses first and avoids fragmentation when possible. In the preceding examples, assuming that no conflicting
assignments exist, the .text section would start at address 0. If a section must
start on a specific address, use binding instead of named memory.
Linker Description
7-37
The SECTIONS Directive
7.8.3.3
Alignment and blocking
You can tell the linker to place an output section at an address that falls on an
n-word boundary, where n is a power of 2. For example:
.text: load = align(128)
allocates .text so that it falls on a 128-word boundary.
Blocking is a weaker form of alignment that allocates a section anywhere
within a block of size n. If the section is larger than the block size, the section
will begin on that boundary. As with alignment, n must be a power of 2. For
example:
bss: load = block(0x80)
allocates .bss so that the section either is contained in a single 128-word page
or begins on a page.
You can use alignment or blocking alone or in conjunction with a memory area,
but alignment and blocking cannot be used together.
7.8.3.4
Specifying input sections
An input section specification identifies the sections from input files that are
combined to form an output section. The size of an output section is the sum
of the sizes of the input sections that comprise it. The linker combines input
sections by concatenating them in the order in which they are specified, unless
alignment or blocking is specified for any of the input sections.
If alignment or blocking is specified for any input section, the input sections
within an output section are ordered as follows:
1) all aligned sections, from largest to smallest, followed by
2) all blocked sections, from largest to smallest, followed by
3) all other input sections from largest to smallest
Example 7–5 shows the most common type of section specification; note that
no input sections are listed.
Example 7–5. The Most Common Method of Specifying Section Contents
SECTIONS
{
.text:
.data:
.bss:
}
7-38
The SECTIONS Directive
In Example 7–5 the linker takes all the .text sections from the input files and
combines them into the .text output section. The linker concatenates the .text
input sections in the order that it encounters them in the input files. The linker
performs similar operations with the .data and .bss sections. You can use this
type of specification for any output section.
You can explicitly specify the input sections that form an output section. Each
input section is identified by its filename and section name:
SECTIONS
{
.text :
{
f1.obj(.text)
f2.obj(sec1)
f3.obj
f4.obj(.text,sec2)
}
}
/* Build .text output section
*/
/*
/*
/*
/*
*/
*/
*/
*/
Link
Link
Link
Link
.text section from f1.obj
sec1 section from f2.obj
ALL sections from f3.obj
.text and sec2 from f4.obj
It is not necessary for input sections to have the same name as each other or
as the output section they become part of. If a file is listed with no sections,
all of its sections are included in the output section. If any additional input sections have the same name as an output section, but are not explicitly specified
by the SECTIONS directive, they are automatically linked in at the end of the
output section. For example, if the linker found more .text sections in the
preceding example, and these .text sections were not specified anywhere in
the SECTIONS directive, the linker would concatenate these extra sections
after f4.obj(sec2).
The specifications in Example 7–5 are actually a shorthand method for the
following:
SECTIONS
{
.text: { *(.text) }
.data: { *(.data) }
.bss: { *(.bss) }
}
The specification *(.text) means the unallocated .text sections from all the
input files. This format is useful when:
- You want the output section to contain all input sections that have a
specified name, but the output section name is different than the input
sections’ name.
- You want the linker to allocate the input sections before it processes addi-
tional input sections or commands within the braces.
Linker Description
7-39
The SECTIONS Directive
The following example illustrates the two purposes above:
SECTIONS
{
.text
:
{
abc.obj(xqt)
*(.text)
.data
}
:
{
*(.data)
fil.obj(table)
}
}
In this example, the .text output section contains a named section xqt from file
abc.obj, which is followed by all the .text input sections. The .data section
contains all the .data input sections, followed by a named section table from
the file fil.obj. This method includes all the unallocated sections. For example,
if one of the .text input sections was already included in another output section
when the linker encountered *(.text), the linker could not include that first .text
input section in the second output section.
7.8.3.5
Allocation Using Multiple Memory Ranges
The linker allows you to specify an explicit list of memory ranges into which
an output section can be allocated. Consider the following example:
MEMORY
{
P_MEM1
P_MEM2
P_MEM3
P_MEM4
}
SECTIONS
{
.text
}
:
:
:
:
origin
origin
origin
origin
=
=
=
=
02000h,
04000h,
06000h,
08000h,
length
length
length
length
=
=
=
=
01000h
01000h
01000h
01000h
: { } > P_MEM1 | P_MEM2 | P_MEM4
The “|” operator is used to specify the multiple memory ranges. The .text output section will be allocated as a whole into the first memory range in which
it fits. The memory ranges are accessed in the order specified. In this example,
the linker will first try to allocate the section in P_MEM1. If that attempt fails,
the linker will try to place the section into P_MEM2, and so on. If the output
section is not successfully allocated in any of the named memory ranges, the
linker issues an error message.
With this type of SECTIONS directive specification, the linker can seamlessly
handle an output section that grows beyond the available space of the memory
range in which it is originally allocated. Instead of modifying the linker command file, you can let the linker move the section into one of the other areas.
7-40
The SECTIONS Directive
7.8.3.6
Automatic Splitting of Output Sections Among Non-Contiguous Memory Ranges
The linker can split output sections among multiple memory ranges to achieve
an efficient allocation. Use the >> operator to indicate that an output section
can be split, if necessary, into the specified memory ranges. For example:
MEMORY
{
P_MEM1
P_MEM2
P_MEM3
P_MEM4
}
:
:
:
:
origin
origin
origin
origin
=
=
=
=
02000h,
04000h,
06000h,
08000h,
length
length
length
length
=
=
=
=
01000h
01000h
01000h
01000h
SECTIONS
{
.text: { *(.text) } >> P_MEM1 | P_MEM2 | P_MEM3 | P_MEM4
}
In this example, the >> operator indicates that the .text output section can be
split among any of the listed memory areas. If the .text section grows beyond
the available memory in P_MEM1, it is split on an input section boundary, and
the remainder of the output section is allocated to P_MEM2 | P_MEM3 |
P_MEM4.
The “|” operator is used to specify the list of multiple memory ranges.
You can also use the >> operator to indicate that an output section can be split
within a single memory range. This functionality is useful when several output
sections must be allocated into the same memory range, but the restrictions
of one output section cause the memory range to be partitioned. Consider the
following example:
MEMORY
{
RAM :
}
origin = 01000h,
length = 08000h
SECTIONS
{
.special: { f1.obj(.text) } = 04000h
.text: { *(.text) } >> RAM
}
The .special output section is allocated near the middle of the RAM memory
range. This leaves two unused areas in RAM: from 01000h to 04000h, and
from the end of f1.obj(.text) to 08000h. The specification for the .text section
allows the linker to split the .text section around the .special section and use
the available space in RAM on either side of .special.
Linker Description
7-41
The SECTIONS Directive
The >> operator can also be used to split an output section among all memory
ranges that match a specified attribute combination. For example:
MEMORY
{
P_MEM1 (RWX) : origin = 01000h,
P_MEM2 (RWI) : origin = 04000h,
}
length = 02000h
length = 01000h
SECTIONS
{
.text: { *(.text) } >> (RW)
}
The linker will attempt to allocate all or part of the output section into any
memory range whose attributes match the attributes specified in the
SECTIONS directive.
This SECTIONS directive has the same effect as:
SECTIONS
{
.text: { *(.text) } >> P_MEM1 | P_MEM2
}
Certain output sections should not be split:
- .cinit, which contains the autoinitialization table for C/C++ programs
- .pinit, which contains the list of global constructors for C++ programs
- an output section with separate load and run allocations. The code that
copies the output section from its load-time allocation to its run-time location cannot accommodate a split in the output section.
- an output section with an input section specification that includes an ex-
pression to be evaluated. The expression may define a symbol that is
used in the program to manage the output section at run-time.
If you use the >> operator on any of these sections, the linker will issue a warning and ignore the operator.
7-42
The SECTIONS Directive
7.8.3.7
Allocating an Archive Member to an Output Section
The linker allows you to allocate one or more members of an archive library
into a specific output section. The syntax for such an allocation is:
SECTIONS
{
.output_sec
{
[–l]lib_name<obj1 [obj2...objn]> (.sec_name)
}
}
In this syntax, the lib_name is the archive library. The –l is optional, since the
library search algorithm is always used to search for the archive. For more information on the –l option, see Section 7.4.9, Alter the Library Search Algorithm, on page 7-13. Brackets (<>) are used to specify the archive member(s).
The brackets may contain one or more object files, separated by a space. The
sec_name is the archive section to be allocated.
For example:
SECTIONS
{
.boot > BOOT1
{
–l rts.lib<boot.obj exit.obj strcpy.obj> (.text)
}
.rts > BOOT2
{
–l rts.lib (.text)
}
.text > RAM
{
* (.text)
}
}
In the specification above, the .text sections of boot.obj, exit.obj, and
strcpy.obj from rts.lib will be placed in the .boot section.
The remainder of the .text sections from rts.lib will be placed in the .rts section.
All other unallocated .text sections will be placed in the .text section.
Linker Description
7-43
Specifying a Section’s Runtime Address
7.9 Specifying a Section’s Runtime Address
At times, you may want to load code into one area of memory and run it in
another. For example, you may have performance-critical code in a ROMbased system. The code must be loaded into ROM, but it would run faster in
RAM.
The linker provides a simple way to accomplish this. You can use the
SECTIONS directive to direct the linker to allocate a section twice: once to set
its load address and again to set its run address. For example:
.fir: load = ROM, run = RAM
Use the load keyword for the load address and the run keyword for the run
address.
Refer to Section 2.6, Runtime Relocation, on page 2-19 for an overview on
runtime relocation.
7.9.1
Specifying Load and Run Addresses
The load address determines where a loader will place the raw data for the
section. All references to the section (such as labels in it) refer to its run
address. The application must copy the section from its load address to its run
address; this does not happen automatically when you specify a separate run
address.
If you provide only one allocation (either load or run) for a section, the section
is allocated only once and will load and run at the same address. If you provide
both allocations, the section is allocated as if it were two sections of the same
size. This means that both allocations occupy space in the memory map and
cannot overlay each other or other sections. (The UNION directive provides
a way to overlay sections; see subsection 7.10.1, Overlaying Sections With
the UNION Statement, on page 7-48.)
If either the load or run address has additional parameters, such as alignment
or blocking, list them after the appropriate keyword. Everything related to
allocation after the keyword load affects the load address until the keyword run
is seen, after which, everything affects the run address. The load and run
allocations are completely independent, so any qualification of one (such as
alignment) has no effect on the other. You may also specify run first, then load.
Use parentheses to improve readability.
7-44
Specifying a Section’s Runtime Address
The examples below specify load and run addresses:
.data: load = ROM, align = 32, run = RAM
(align applies only to load )
.data: load = (ROM align 32), run = RAM
(identical to previous example)
.data: run
load
=
=
RAM, align 32,
align 16
(align 32 in RAM for run; align 16 anywhere for load)
7.9.2
Uninitialized Sections
Uninitialized sections (such as .bss) are not loaded, so their only significant
address is the run address. The linker allocates uninitialized sections only
once: if you specify both run and load addresses, the linker warns you and
ignores the load address. Otherwise, if you specify only one address, the linker
treats it as a run address, regardless of whether you call it load or run. The
example below specifies load and run addresses for an uninitialized section:
.bss: load = 0x1000, run = RAM
A warning is issued, load is ignored, and space is allocated in RAM. All of the
following examples have the same effect. The .bss section is allocated in
RAM.
.bss: load = RAM
.bss: run = RAM
.bss: > RAM
7.9.3
Referring to the Load Address by Using the .label Directive
Normally, any reference to a symbol in a section refers to its runtime address.
However, it may be necessary at runtime to refer to a load-time address.
Specifically, the code that copies a section from its load address to its run
address must have access to the load address. The .label directive defines a
special symbol that refers to the section’s load address. Thus, whereas normal
symbols are relocated with respect to the run address, .label symbols are
relocated with respect to the load address. For more information on the .label
directive, see page 4-60.
Example 7–6 shows the use of the .label directive.
Linker Description
7-45
Specifying a Section’s Runtime Address
Example 7–6. Copying a Section From ROM to RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
; define a section to be copied from ROM to RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
.sect ”.fir”
.label fir_src
; load address of section
fir:
; run address of section
<code here>
; code for the section
.label fir_end
; load address of section end
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
; copy .fir section from ROM into RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
.text
STM
RPT
MVDP
fir_src, AR1
; get load address
#(fir_end – fir_src – 1)
*AR1+, fir
; copy address to program memory
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
; jump to section, now in RAM
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––
CALL fir
Linker Command File
/**************************************************/
/* PARTIAL LINKER COMMAND FILE FOR FIR EXAMPLE
*/
/**************************************************/
MEMORY
{
PAGE 0 :
PAGE 0 :
PAGE 1 :
}
ONCHIP :
PROG
:
DATA
:
origin = 0800h, length = 02400h
origin = 02C00h, length = 0D200h
origin = 0800h, length = 0F800h
SECTIONS
{
.text: load = PROG PAGE 0
.fir: load = DATA PAGE 1, run ONCHIP PAGE 0
}
7-46
Specifying a Section’s Runtime Address
Figure 7–4 illustrates the runtime execution of this example.
Figure 7–4. Runtime Execution of Example 7–6
Program Memory
800h
800h
ONCHIP
fir (relocated
to run here)
2C00h
Data Memory
DATA
.fir
(loads here)
PROG
.text
FE00h
Linker Description
7-47
Using UNION and GROUP Statements
7.10 Using UNION and GROUP Statements
Two SECTIONS statements allow you to conserve memory: GROUP and
UNION. Unioning sections causes the linker to allocate them to the same run
address. Grouping sections causes the linker to allocate them contiguously
in memory.
7.10.1 Overlaying Sections With the UNION Statement
For some applications, you may want to allocate more than one section to run
at the same address. For example, you may have several routines you want
in on-chip RAM at various stages of execution. Or you may want several data
objects that will not be active at the same time to share a block of memory. The
UNION statement within the SECTIONS directive provides a way to allocate
several sections at the same runtime address.
In Example 7–7, the .bss sections from file1.obj and file2.obj are allocated at
the same address in RAM. In the memory map, the union occupies as much
space as its largest component. The components of a union remain
independent sections; they are simply allocated together as a unit.
Example 7–7. The UNION Statement
SECTIONS
{
.text: load = ROM
UNION: run = RAM
{
.bss1: { file1.obj(.bss) }
.bss2: { file2.obj(.bss) }
}
.bss3: run = RAM { globals.obj(.bss) }
}
Allocation of a section as part of a union affects only its run address. Under
no circumstances can sections be overlaid for loading. If an initialized section
is a union member (an initialized section has raw data, such as .text), its load
allocation must be separately specified. For example:
Example 7–8. Separate Load Addresses for UNION Sections
UNION: run = RAM
{
.text1: load = ROM, { file1.obj(.text) }
.text2: load = ROM, { file2.obj(.text) }
}
7-48
Using UNION and GROUP Statements
Figure 7–5. Memory Allocation Shown in Example 7–7 and Example 7–8
Allocation for Example 7–7
Allocation for Example 7–8
RAM
.bss2
.bss1
RAM
Sections can run
as a union. This is
runtime allocation
only.
.text 2 (run)
.text 1 (run)
Copies at
runtime
.bss3
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ROM
.text
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ROM
.text 1 (load)
Sections cannot
load as a union.
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
.text 2 (load)
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
Since the .text sections contain data, they cannot load as a union, although
they can be run as a union. Therefore, each requires its own load address. If
you fail to provide a load allocation for an initialized section within a union, the
linker issues a warning and allocates load space anywhere it fits in configured
memory.
Uninitialized sections are not loaded and do not require load addresses.
The UNION statement applies only to allocation of run addresses, so it is
redundant to specify a load address for the union itself. For purposes of
allocation, the union is treated as an uninitialized section: any one allocation
specified is considered a run address, and, if both are specified, the linker
issues a warning and ignores the load address.
The alignment and block attributes of a union are the maximum alignment and
block attributes of any of its members.
Linker Description
7-49
Using UNION and GROUP Statements
Note:
UNION and Overlay Page Are Not the Same
The UNION capability and the overlay page capability (see Section 7.11,
Overlay Pages, on page 7-53) may sound similar because they both deal
with overlays. They are, in fact, quite different. UNION allows multiple
sections to be overlaid within the same memory space. Overlay pages, on
the other hand, define multiple memory spaces. It is possible to use the page
facility to approximate the function of UNION, but this is cumbersome.
7.10.2 Grouping Output Sections Together
The SECTIONS directive has a GROUP option that forces several output
sections to be allocated contiguously. For example, assume that a section
named term_rec contains a termination record for a table in the .data section.
You can force the linker to allocate .data and term_rec together:
Example 7–9. Allocate Sections Together
SECTIONS
{
.text
/*
.bss
/*
GROUP 1000h : /*
{
.data
/*
term_rec
/*
}
}
Normal output section
Normal output section
Specify a group of sections
*/
*/
*/
First section in the group
*/
Allocated immediately after .data */
You can use binding, alignment, or named memory to allocate a GROUP in
the same manner as a single output section. In the preceding example, the
GROUP is bound to word address 1000h. This means that .data is allocated
at word 1000h, and term_rec follows it in memory.
The alignment and block attributes of a GROUP are the maximum alignment
and block attributes of any of its members.
An allocator for a GROUP is subject to the consistency checking rules listed
in Section 7.10.4.
7-50
Using UNION and GROUP Statements
7.10.3 Nesting UNIONs and GROUPs
The linker allows arbitrary nesting of GROUP and UNION statements with the
SECTIONS directive. By nesting GROUP and UNION statements, you can
express hierarchical overlays and groupings of sections. Example 7–10
shows how two overlays of sections can be grouped together.
Example 7–10. Nesting GROUP and UNION statements
SECTIONS
{
GROUP 1000h : run
{
UNION:
{
mysect1: load
mysect2: load
}
UNION:
{
mysect3: load
mysect4: load
}
}
}
= RAM
= ROM
= ROM
= ROM
= ROM
Given the example linker control file above, the linker performs the following
allocations:
- The four sections (mysect1, mysect2, mysect3, mysect4) are assigned
unique, non-overlapping load addresses in the ROM memory region. This
assignment is determined by the particular load allocations given for each
section.
- Sections mysect1 and mysect2 are assigned the same run address in
RAM.
- Sections mysect3 and mysect4 are assigned the same run address in
RAM.
- The run addresses of mysect1/mysect2 and mysect3/mysect4 are allo-
cated contiguously, as directed by the GROUP statement (subject to
alignment and blocking restrictions).
To refer to groups and unions, linker diagnostic messages use the notation:
GROUP_ n
UNION_ n
In this notation, n is a sequential number (beginning at 1) that represents the
lexical ordering of the group or union in the linker control file, without regard
to nesting. Groups and unions each have their own counter.
Linker Description
7-51
Using UNION and GROUP Statements
7.10.4 Checking the Consistency of Allocators
The linker checks the consistency of load and run allocations specified for
unions, groups, and sections. The following rules are used:
- Run allocations are only allowed for top-level sections, groups, or unions
(sections, groups, or unions that are not nested under any other groups
or unions). The linker uses the run address of the top-level structure to
compute the run addresses of the components within groups and unions.
- As discussed in Section 7.10.1, the linker does not accept a load allocation
for UNIONs.
- As discussed in Section 7.10.1, the linker does not accept a load allocation
for uninitialized sections.
- In most cases, you must provide a load allocation for an initialized section.
However, the linker does not accept a load allocation for an initialized section that is located within a group that already defines a load allocator.
- As a shortcut, you can specify a load allocation for an entire group, to de-
termine the load allocations for every initialized section or subgroup
nested within the group. However, a load allocation is accepted for an
entire group only if all of the following conditions are true:
J
The group is initialized (i.e., it has at least one initialized member).
J
The group is not nested inside another group that has a load allocator.
J
The group does not contain a union containing initialized sections.
If the group contains a union with initialized sections, it is necessary to
specify the load allocation for each initialized section nested within the
group. Consider the following example:
SECTIONS
{
GROUP: load = ROM, run = ROM
{
.text1:
UNION:
{
.text2:
.text3:
}
}
}
The load allocator given for the group does not uniquely specify the load
allocation for the elements within the union: .text2 and .text3. In this case,
the linker will issue a diagnostic message to request that these load allocations be specified explicitly.
7-52
Overlay Pages
7.11 Overlay Pages
Some target systems use a memory configuration in which all or part of the
memory space is overlaid by shadow memory. This allows the system to map
different banks of physical memory into and out of a single address range in
response to hardware selection signals. In other words, multiple banks of
physical memory overlay each other at one address range. You may want the
linker to load various output sections into each of these banks or into banks
that are not mapped at load time.
The linker supports this feature by providing overlay pages. Each page
represents an address range that must be configured separately with the
MEMORY directive. You can then use the SECTIONS directive to specify the
sections to be mapped into various pages.
7.11.1 Using the MEMORY Directive to Define Overlay Pages
To the linker, each overlay page represents a completely separate memory
comprising the full 24-bit range of addressable locations. This allows you to
link two or more sections at the same (or overlapping) addresses if they are
on different pages.
Pages are numbered sequentially, beginning with 0. If you do not use the
PAGE option, the linker allocates initialized sections into PAGE 0 (program
memory) and uninitialized sections into PAGE 1 (data memory).
For example, assume that your system can select between two banks of
physical memory for data memory space: address range A00h to FFFFh for
PAGE 1 and 0A00h to 2BFF for PAGE 2. Although only one bank can be
selected at a time, you can initialize each bank with different data. This is how
you use the MEMORY directive to obtain this configuration:
Example 7–11. Memory Directive With Overlay Pages
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MEMORY
{
PAGE 0 : ONCHIP
: origin = 0800h,
: PROG
: origin = 02C00h,
PAGE 1 : OVR_MEM : origin = 0A00h,
: DATA
: origin = 02C00h,
PAGE 2 : OVR_MEM : origin = 0A00h,
}
length
length
length
length
length
=
=
=
=
=
0240h
0D200h
02200h
0D400h
02200h
Linker Description
7-53
Overlay Pages
Example 7–11 defines three separate address spaces. PAGE 0 defines an
area of on-chip program memory and the rest of program memory space.
PAGE 1 defines the first overlay memory area and the rest of data memory
space. PAGE 2 defines another area of overlay memory for data space. Both
OVR_MEM ranges cover the same address range. This is possible because
each range is on a different page and therefore represents a different memory
space.
Figure 7–6 shows overlay pages defined by the MEMORY directive in
Example 7–11 and the SECTIONS directive in Example 7–12.
Figure 7–6. Overlay Pages Defined by Example 7–11 and Example 7–12
Program Memory
Page 0
800h
ONCHIP
Data Memory
Page 1
A00h
Run address
for f1, f2, f3,
f4
2C00h
PROG
.text
FC00h
7-54
OVR_MEM
Data Memory
Page 2
A00h
f1.obj (.text)
f2.obj (.text)
2C00h
f3.obj (.text)
f4.obj (.text)
2C00h
DATA
.bss
OVR_MEM
Overlay Pages
7.11.2 Using Overlay Pages With the SECTIONS Directive
Assume that you are using the MEMORY directive as shown in Example 7–11.
Further assume that your code consists of, besides the usual sections, four
modules of code that you want to load in data memory space but that you
intend to run in the on-chip RAM in program memory space. Example 7–12
shows how to use the SECTIONS directive overlays accordingly.
Example 7–12. SECTIONS Directive Definition for Overlays in Figure 7–6
SECTIONS
{
UNION : run = ONCHIP
{
S1 : load = OVR_MEM PAGE 1
{
s1_load = 0A00h;
s1_start = .;
f1.obj (.text)
f2.obj (.text)
s1_length = . – s1_start;
}
S2 : load = OVR_MEM PAGE 2
{
s2_load = 0A00h;
s2_start = .;
f3.obj (.text)
f4.obj (.text)
s2_length = . – s2_start;
}
}
.text: load = PROG PAGE 0
.data: load = PROG PAGE 0
.bss : load = DATA PAGE 1
}\
The four modules of code are f1, f2, f3, and f4. The modules f1 and f2 are
combined into output section S1, and f3 and f4 are combined into output
section S2. The PAGE specifications for S1 and S2 tell the linker to link these
sections into the corresponding pages. As a result, they are both linked to load
address A00h, but in different memory spaces. When the program is loaded,
a loader can configure hardware so that each section is loaded into the
appropriate memory bank.
Output sections S1 and S2 are placed in a union that has a run address in
on-chip RAM. The application must move these sections at runtime before
executing them. You can use the symbols s1_load and s1_length to move
section S1, and s2_load and s2_length to move section S2. The special
symbol ”.” refers to the current run address, not the current load address.
Linker Description
7-55
Overlay Pages
Within a page, you can bind output sections or use named memory areas in
the usual way. In Example 7–12, S1 could have been allocated:
S1 : load = 01200h, page = 1
{ . . . }
This binds S1 at address 1200h in page 1. You can also use page as a qualifier
on the address. For example:
S1 : load = (01200h PAGE 1)
{ . . . }
If you do not specify any binding or named memory range for the section, the
linker allocates the section into the page wherever it can (just as it normally
does with a single memory space). For example, S2 could also be specified
as:
S2 : PAGE 2
{ . . . }
Because OVR_MEM is the only memory on page 2, it is not necessary (but
acceptable) to specify = OVR_MEM for the section.
7.11.3 Page Definition Syntax
To specify overlay pages as illustrated in Example 7–11 and Example 7–12,
use the following syntax for the MEMORY directive:
MEMORY
{
PAGE 0 : name 1 [(attr)] : origin = constant , length = constant;
PAGE n : name n [(attr)] : origin = constant , length = constant;
}
Each page is introduced by the keyword PAGE and a page number, followed
by a colon and a list of memory ranges the page contains. Bold portions must
be entered as shown. Memory ranges are specified in the normal way. You can
define up to 255 overlay pages.
Because each page represents a completely independent address space,
memory ranges on different pages can have the same name. Configured
memory on any page can overlap configured memory on any other page.
Within a single page, however, all memory ranges must have unique names
and must not overlap.
7-56
Overlay Pages
Memory ranges listed outside the scope of a PAGE specification default to
PAGE 0. Consider the following example:
MEMORY
{
PAGE1:
ROM
EPROM
RAM
XROM
XRAM
:
:
:
:
:
org
org
org
org
org
=
=
=
=
=
0h
1000h
2000h
0h
2000h
len
len
len
len
len
=
=
=
=
=
1000h
1000h
0E000h
1000h
0E000h
}
The memory ranges ROM, EPROM, and RAM are all on PAGE 0 (since no
page is specified). XROM and XRAM are on PAGE 1. Note that XROM on
PAGE 1 overlays ROM on PAGE 0, and XRAM on PAGE 1 overlays RAM on
PAGE 0.
In the output link map (obtained with the –m linker option), the listing of the
memory model is keyed by pages. This provides an easy method of verifying
that you specified the memory model correctly. Also, the listing of output
sections has a PAGE column that identifies the memory space into which each
section will be loaded.
Linker Description
7-57
Default Allocation Algorithm
7.12 Default Allocation Algorithm
The MEMORY and SECTIONS directives provide flexible methods for
building, combining, and allocating sections. However, any memory locations
or sections that you choose not to specify must still be handled by the linker.
The linker uses default algorithms to build and allocate sections within the
specifications you supply. Subsections 7.12.1, Allocation Algorithm, and
7.12.2, General Rules for Output Sections, describe default allocation.
7.12.1 Allocation Algorithm
If you do not use the MEMORY and SECTIONS directives, the linker allocates
output sections as though the following definitions are specified.
Example 7–13. Default Allocation for TMS320C54x Devices
MEMORY
{
PAGE 0: PROG: origin = 0x0080
length = 0xFF00
PAGE 1: DATA: origin = 0x0080 length = 0xFF80
}
SECTIONS
{
.text:
PAGE = 0
.data:
PAGE = 0
.cinit:
PAGE = 0
;cflag option only
.bss:
PAGE = 1
}
All .text input sections are concatenated to form a .text output section in the
executable output file, and all .data input sections are combined to form a .data
output section. The .text and .data sections are allocated into configured
memory on PAGE 0, which is the program memory space. All .bss sections
are combined to form a .bss output section. The .bss section is allocated into
configured memory on PAGE 1, which is the data memory space.
If the input files contain initialized named sections, the linker allocates them
into program memory following the .data section. If the input files contain
uninitialized named sections, the linker allocates them into data memory following the .bss section. You can override this by specifying an explicit PAGE
in the SECTIONS directive.
If you use a SECTIONS directive, the linker performs no part of the default
allocation. Allocation is performed according to the rules specified by the
SECTIONS directive and the general algorithm described in subsection
7.12.2, General Rules for Output Sections.
7-58
Default Allocation Algorithm
7.12.2 General Rules for Output Sections
An output section can be formed in one of two ways:
Rule 1
As the result of a SECTIONS directive definition.
Rule 2
By combining input sections with the same names into an output section that is not defined in a SECTIONS directive.
If an output section is formed as a result of a SECTIONS directive (rule 1), this
definition completely determines the section’s contents. (See Section 7.8, The
SECTIONS Directive, on page 7-32 for examples of how to define an output
section’s content.)
An output section can also be formed when input sections are not specified
by a SECTIONS directive (rule 2). In this case, the linker combines all such
input sections that have the same name into an output section with that name.
For example, suppose the files f1.obj and f2.obj both contain named sections
called Vectors and that the SECTIONS directive does not define an output
section for them. The linker combines the two Vectors sections from the input
files into a single output section named Vectors, allocates it into memory, and
includes it in the output file.
After the linker determines the composition of all output sections, it must allocate them into configured memory. The MEMORY directive specifies which
portions of memory are configured; if there is no MEMORY directive, the linker
uses the default configuration.
The linker’s allocation algorithm attempts to minimize memory fragmentation.
This allows memory to be used more efficiently and increases the probability
that your program will fit into memory. This is the algorithm:
1) Output sections for which you have supplied a specific binding address
are placed in memory at that address.
2) Output sections that are included in a specific, named memory range or
that have memory attribute restrictions are allocated. Each output section
is placed into the first available space within the named area, considering
alignment where necessary.
Linker Description
7-59
Default Allocation Algorithm
3) Any remaining sections are allocated in the order in which they are
defined. Sections not defined in a SECTIONS directive are allocated in the
order in which they are encountered. Each output section is placed into
the first available memory space, considering alignment where necessary.
Note:
The PAGE Option
If you do not use the PAGE option to explicitly specify a memory space for
an output section, the linker allocates the section into PAGE 0. This occurs
even if PAGE 0 has no room and other pages do. To use a page other than
PAGE 0, you must specify the page with the SECTIONS directive.
7-60
Special Section Types (DSECT, COPY, and NOLOAD)
7.13 Special Section Types (DSECT, COPY, and NOLOAD)
You can assign three special type designations to output sections: DSECT,
COPY, and NOLOAD. These types affect the way that the program is treated
when it is linked and loaded. You can assign a type to a section by placing the
type (enclosed in parentheses) after the section definition. For example:
SECTIONS
{
sec1 2000h
sec2 4000h
sec3 6000h
}
(DSECT)
(COPY)
(NOLOAD)
: {f1.obj}
: {f2.obj}
: {f3.obj}
- The DSECT type creates a dummy section with the following qualities:
J
It is not included in the output section memory allocation. It takes up
no memory and is not included in the memory map listing.
J
It can overlay other output sections, other DSECTs, and unconfigured
memory.
J
Global symbols defined in a dummy section are relocated normally.
They appear in the output module’s symbol table with the same value
they would have if the DSECT had actually been loaded. These symbols can be referenced by other input sections.
J
Undefined external symbols found in a DSECT cause specified
archive libraries to be searched.
J
The section’s contents, relocation information, and line number
information are not placed in the output module.
In the preceding example, none of the sections from f1.obj are allocated,
but all of the symbols are relocated as though the sections were linked at
word address 2000h. The other sections can refer to any of the global
symbols in sec1.
- A COPY section is similar to a DSECT section, except that its contents
and associated information are written to the output module. The .cinit
section that contains initialization tables for the TMS320C54x C compiler
has this attribute under the RAM model. The .comment section created
by pragma IDENT is a COPY section.
- A NOLOAD section differs from a normal output section in one respect:
the section’s contents, relocation information, and line number information are not placed in the output module. The linker allocates space for it,
and it appears in the memory map listing.
Linker Description
7-61
Assigning Symbols at Link Time
7.14 Assigning Symbols at Link Time
Linker assignment statements allow you to define external (global) symbols
and assign values to them at link time. You can use this feature to initialize a
variable or pointer to an allocation-dependent value.
7.14.1 Syntax of Assignment Statements
The syntax of assignment statements in the linker is similar to that of assignment statements in the C language:
symbol
=
expression; assigns the value of expression to symbol
symbol
+ = expression; adds the value of expression to symbol
symbol
– = expression; subtracts the value of expression from symbol
symbol
* = expression; multiplies symbol by expression
symbol
/=
expression; divides symbol by expression
The symbol should be defined externally. If it is not, the linker defines a new
symbol and enters it into the symbol table. The expression must follow the
rules defined in subsection 7.14.3, Assignment Expressions. Assignment
statements must terminate with a semicolon.
The linker processes assignment statements after it allocates all the output
sections. Therefore, if an expression contains a symbol, the address used for
that symbol reflects the symbol’s address in the executable output file.
For example, suppose a program reads data from one of two tables identified
by two external symbols, Table1 and Table2. The program uses the symbol
cur_tab as the address of the current table. cur_tab must point to either Table1
or Table2. You could accomplish this in the assembly code, but you would need
to reassemble the program to change tables. Instead, you can use a linker
assignment statement to assign cur_tab at link time:
prog.obj
cur_tab = Table1;
7-62
/* Input file
*/
/* Assign cur_tab to one of the tables */
Assigning Symbols at Link Time
7.14.2 Assigning the SPC to a Symbol
A special symbol, denoted by a dot (. ), represents the current value of the SPC
during allocation. The linker’s “.” symbol is analogous to the assembler’s $
symbol. The “.” symbol can be used only in assignment statements within a
SECTIONS directive because “.” is meaningful only during allocation, and
SECTIONS controls the allocation process. (See Section 7.8, The SECTIONS Directive, on page 7-32.) Note that the “.” symbol cannot be used outside of the braces that define a single output section.
The “.” symbol refers to the current run address, not the current load address,
of the section.
For example, suppose a program needs to know the address of the beginning
of the .data section. By using the .global directive, you can create an external
undefined variable called Dstart in the program. Then assign the value of “. ”
to Dstart:
SECTIONS
{
.text:
.data:
.bss:
}
{}
{ Dstart = .; }
{}
This defines Dstart to be the first linked address of the .data section. (Dstart
is assigned before .data is allocated.) The linker will relocate all references to
Dstart.
A special type of assignment assigns a value to the “.” symbol. This adjusts
the SPC within an output section and creates a hole between two input sections. Any value assigned to “.” to create a hole is relative to the beginning of
the section, not to the address actually represented by “.”. Assignments to “.”
and holes are described in Section 7.15, Creating and Filling Holes, on page
7-66.
7.14.3 Assignment Expressions
These rules apply to linker expressions:
- Expressions can contain global symbols, constants, and the C language
operators listed in Table 7–1.
- All numbers are treated as long (32-bit) integers.
- Constants are identified by the linker in the same way as by the assembler.
That is, numbers are recognized as decimal unless they have a suffix (H
Linker Description
7-63
Assigning Symbols at Link Time
or h for hexadecimal and Q or q for octal). C language prefixes are also
recognized (0 for octal and 0x for hex). Hexadecimal constants must begin
with a digit. No binary constants are allowed.
- Symbols within an expression have only the value of the symbol’s
address. No type-checking is performed.
- Linker expressions can be absolute or relocatable. If an expression
contains any relocatable symbols (and zero or more constants or absolute
symbols), it is relocatable. Otherwise, the expression is absolute. If a
symbol is assigned the value of a relocatable expression, it is relocatable;
if it is assigned the value of an absolute expression, it is absolute.
The linker supports the C language operators listed in Table 7–1 in order of
precedence. Operators in the same group have the same precedence.
Besides the operators listed in Table 7–1, the linker also has an align operator
that allows a symbol to be aligned on an n-word boundary within an output section (n is a power of 2). For example, the expression
. = align(16);
aligns the SPC within the current section on the next 16-word boundary.
Because the align operator is a function of the current SPC, it can be used only
in the same context as “.” —that is, within a SECTIONS directive.
Table 7–1. Operators Used in Expressions (Precedence)
Symbols
Operators
Evaluation
+
–
~
Unary plus, minus, 1s complement
Right to left
*
/
%
Multiplication, division, modulo
Left to right
+
–
Addition, subtraction
Left to right
Left shift, right shift
Left to right
Less than, LT or equal, greater than,
GT or equal
Left to right
!=, =[=]
Not equal to, equal to
Left to right
&
Bitwise AND
Left to right
^
Bitwise exclusive OR
Left to right
|
Bitwise OR
Left to right
<<
<
Note:
7-64
>>
<=
>
>=
Unary +, –, and * have higher precedence than the binary forms.
Assigning Symbols at Link Time
7.14.4 Symbols Defined by the Linker
The linker automatically defines several symbols that a program can use at
runtime to determine where a section is linked. These symbols are external,
so they appear in the link map. They can be accessed in any assembly
language module if they are declared with a .global directive. Values are
assigned to these symbols as follows:
.text
is assigned the first address of the .text output section.
(It marks the beginning of executable code.)
etext
is assigned the first address following the .text output section.
(It marks the end of executable code.)
.data
is assigned the first address of the .data output section.
(It marks the beginning of initialized data tables.)
edata is assigned the first address following the .data output section.
(It marks the end of initialized data tables.)
.bss
is assigned the first address of the .bss output section.
(It marks the beginning of uninitialized data.)
end
is assigned the first address following the .bss output section.
(It marks the end of uninitialized data.)
7.14.5 Symbols Defined Only For C Support (–c or –cr Option)
__STACK_SIZE
is assigned the size of the .stack section.
__SYSMEM_SIZE
is assigned the size of the .sysmem section.
Linker Description
7-65
Creating and Filling Holes
7.15 Creating and Filling Holes
The linker provides you with the ability to create areas within output sections
that have nothing linked into them. These areas are called holes. In special
cases, uninitialized sections can also be treated as holes. The following text
describes how the linker handles such holes and how you can fill holes (and
uninitialized sections) with a value.
7.15.1 Initialized and Uninitialized Sections
An output section contains one of the following:
- Raw data for the entire section
- No raw data
A section that has raw data is referred to as initialized. This means that the
object file contains the actual memory image contents of the section. When
the section is loaded, this image is loaded into memory at the section’s specified starting address. The .text and .data sections always have raw data if anything was assembled into them. Named sections defined with the .sect assembler directive also have raw data.
By default, the .bss section and sections defined with the .usect directive have
no raw data (they are uninitialized ). They occupy space in the memory map
but have no actual contents. Uninitialized sections typically reserve space in
RAM for variables. In the object file, an uninitialized section has a normal section header and may have symbols defined in it; however, no memory image
is stored in the section.
7.15.2 Creating Holes
You can create a hole in an initialized output section. A hole is created when
you force the linker to leave extra space between input sections within an output section. When such a hole is created, the linker must follow the first guideline above and supply raw data for the hole.
Holes can be created only within output sections. Space can exist between
output sections, but such space is not holes. There is no way to fill or initialize
the space between output sections with the SECTIONS directive.
To create a hole in an output section, you must use a special type of linker
assignment statement within an output section definition. The assignment
statement modifies the SPC (denoted by “.”) by adding to it, assigning a
greater value to it, or aligning it on an address boundary. The operators,
expressions, and syntaxes of assignment statements are described in Section
7.14, Assigning Symbols at Link Time, on page 7-62.
7-66
Creating and Filling Holes
The following example uses assignment statements to create holes in output
sections:
SECTIONS
{
outsect:
{
file1.obj(.text)
. += 100h; /* Create a hole with size 100h words */
file2.obj(.text)
. = align(16); /* Create a hole to align the SPC */
file3.obj(.text)
}
}
The output section outsect is built as follows:
- The .text section from file1.obj is linked in.
- The linker creates a 256-word hole.
- The .text section from file2.obj is linked in after the hole.
- The linker creates another hole by aligning the SPC on a 16-word
boundary.
- Finally, the .text section from file3.obj is linked in.
All values assigned to the “. ” symbol within a section refer to the relative
address within the section. The linker handles assignments to the “. ” symbol
as if the section started at address 0 (even if you have specified a binding
address). Consider the statement . = align(16) in the example. This statement
effectively aligns file3.obj .text to start on a 16-word boundary within outsect.
If outsect is ultimately allocated to start on an address that is not aligned,
file3.obj .text will not be aligned either.
Note that the “.” symbol refers to the current run address, not the current load
address, of the section.
Expressions that decrement “.” are illegal. For example, it is invalid to use the
–= operator in an assignment to “.”. The most common operators used in
assignments to “.” are += and align.
If an output section contains all input sections of a certain type (such as .text),
you can use the following statements to create a hole at the beginning or end
of the output section:
.text:
.data:
{
{
.+= 100h; }
/* Hole at the beginning */
*(.data)
. += 100h; }
/* Hole at the end
Linker Description
*/
7-67
Creating and Filling Holes
Another way to create a hole in an output section is to combine an uninitialized
section with an initialized section to form a single output section. In this case,
the linker treats the uninitialized section as a hole and supplies data for it. The
following example illustrates this method:
SECTIONS
{
outsect:
{
file1.obj(.text)
file1.obj(.bss)
}
}
/* This becomes a hole */
Because the .text section has raw data, all of outsect must also contain raw
data (rule 1). Therefore, the uninitialized .bss section becomes a hole.
Uninitialized sections become holes only when they are combined with
initialized sections. If several uninitialized sections are linked together, the
resulting output section is also uninitialized.
7.15.3 Filling Holes
When a hole exists in an initialized output section, the linker must supply raw
data to fill it. The linker fills holes with a 16-bit fill value that is replicated through
memory until it fills the hole. The linker determines the fill value as follows:
1) If the hole is formed by combining an uninitialized section with an initialized
section, you can specify a fill value for the uninitialized section. Follow the
section name with an = sign and a 16-bit constant:
SECTIONS
{
outsect:
{
file1.obj(.text)
file2.obj(.bss) = 00FFh
}
}
/* Fill this hole */
/* with 0FFh
*/
2) You can also specify a fill value for all the holes in an output section by
supplying the fill value after the section definition:
SECTIONS
{
outsect:fill = 0FF00h /* fills holes with 0FF00h */
{
. += 10h;
/* This creates a hole
*/
file1.obj(.text)
file1.obj(.bss)
/* This creates another hole*/
}
}
7-68
Creating and Filling Holes
3) If you do not specify an initialization value for a hole, the linker fills the hole
with the value specified by the –f option. For example, suppose the
command file link.cmd contains the following SECTIONS directive:
SECTIONS
{
.text: { .= 100; }
}
/* Create a 100-word hole */
Now invoke the linker with the –f option:
lnk500 –f 0FFFFh link.cmd
This fills the hole with 0FFFFh.
4) If you do not invoke the linker with the –f option, the linker fills holes
with 0s.
Whenever a hole is created and filled in an initialized output section, the hole
is identified in the link map along with the value the linker uses to fill it.
7.15.4 Explicit Initialization of Uninitialized Sections
An uninitialized section becomes a hole only when it is combined with an
initialized section. When uninitialized sections are combined with each other,
the resulting output section remains uninitialized.
However, you can force the linker to initialize an uninitialized section by
specifying an explicit fill value for it in the SECTIONS directive. This causes
the entire section to have raw data (the fill value). For example:
SECTIONS
{
.bss: fill = 1234h
}
Note:
/* Fills .bss with 1234h */
Filling Sections
Because filling a section (even with 0s) causes raw data to be generated for
the entire section in the output file, your output file will be very large if you
specify fill values for large sections or holes.
Linker Description
7-69
Partial (Incremental) Linking
7.16 Partial (Incremental) Linking
An output file that has been linked can be linked again with additional modules.
This is known as partial linking or incremental linking. Partial linking allows you
to partition large applications, link each part separately, and then link all the
parts together to create the final executable program.
Follow these guidelines for producing a file that you will relink:
- Intermediate files must have relocation information. Use the –r option
when you link the file the first time.
- Intermediate files must have symbolic information. By default, the linker
retains symbolic information in its output. Do not use the –s option if you
plan to relink a file, because –s strips symbolic information from the output
module.
- Intermediate link steps should be concerned only with the formation of out-
put sections and not with allocation. All allocation, binding, and MEMORY
directives should be performed in the final link step.
- If the intermediate files have global symbols that have the same name as
global symbols in other files and you wish them to be treated as static
(visible only within the intermediate file), you must link the files with the –h
option (See subsection 7.4.7, Make All Global Symbols Static (–h and –g
global_symbol Options), on page 7-12.)
- If you are linking C code, don’t use –c or –cr until the final link step. Every
time you invoke the linker with the –c or –cr option the linker will attempt
to create an entry point.
The following example shows how you can use partial linking:
Step 1: Link the file file1.com; use the –r option to retain relocation
information in the output file tempout1.out.
lnk500 –r –o tempout1 file1.com
file1.com contains:
SECTIONS
{
ss1:
}
7-70
{
f1.obj
f2.obj
.
.
.
fn.obj
}
Partial (Incremental) Linking
Step 2: Link the file file2.com; use the –r option to retain relocation
information in the output file tempout2.out.
lnk500 –r –o tempout2 file2.com
file2.com contains:
SECTIONS
{
ss2:
{
g1.obj
g2.obj
.
.
.
gn.obj
}
}
Step 3: Link tempout1.out and tempout2.out:
lnk500 –m final.map –o final.out tempout1.out tempout2.out
Linker Description
7-71
Linking C/C++ Code
7.17 Linking C/C++ Code
The TMS320C54x C/C++ compiler produces assembly language source code
that can be assembled and linked. For example, a C/C++ program consisting
of modules prog1, prog2, etc., can be assembled and then linked to produce
an executable file called prog.out:
lnk500 –c –o prog.out prog1.obj prog2.obj ... rts.lib
The –c option tells the linker to use special conventions that are defined by the
C/C++ environment. The runtime library contains C/C++ runtime-support
functions.
For more information about C/C++, including the runtime environment and
runtime-support functions, see the TMS320C54x Optimizing C/C++ Compiler
User’s Guide.
7.17.1 Runtime Initialization
All C/C++ programs must be linked with an object module called boot.obj.
When a program begins running, it executes boot.obj first. boot.obj contains
code and data for initializing the runtime environment. The module performs
the following tasks:
- Sets up the system stack
- Processes the runtime initialization table and autoinitializes global
variables (in the ROM model)
- Disables interrupts and calls _main
The runtime-support object library, rts.lib, contains boot.obj. You can:
- Use the archiver to extract boot.obj from the library and then link the
module in directly.
- Include rts.lib as an input file (the linker automatically extracts boot.obj
when you use the –c or –cr option).
7.17.2 Object Libraries and Runtime Support
The TMS320C54x Optimizing C Compiler User’s Guide describes additional
runtime-support functions that are included in rts.lib. If your program uses any
of these functions, you must link rts.lib with your object files.
You can also create your own object libraries and link them. The linker includes
and links only those library members that resolve undefined references.
7-72
Linking C/C++ Code
7.17.3 Setting the Size of the Stack and Heap Sections
C uses two uninitialized sections called .sysmem and .stack for the memory
pool used by the malloc( ) functions and the runtime stack, respectively. You
can set the size of these by using the –heap option or –stack option and specifying the size of the section as a constant immediately after the option. The
default size for both is 1K words.
For more information, see subsection 7.4.8, Define Heap Size (–heap
constant Option), on page 7-12, or subsection 7.4.16, Define Stack Size
(–stack constant Option), on page 7-18.
7.17.4 Autoinitialization (ROM and RAM Models)
The C/C++ compiler produces tables of data for autoinitializing global variables. These are in a named section called .cinit. The initialization tables can
be used in either of two ways:
- RAM Model (–cr option)
Variables are initialized at load time. This enhances performance by
reducing boot time and by saving memory used by the initialization tables.
You must use a smart loader (i.e., one capable of initializing variables) to
take advantage of the RAM model of autoinitialization.
When you use –cr, the linker marks the .cinit section with a special attribute. This attribute tells the linker not to load the .cinit section into memory.
The linker also sets the cinit symbol to –1; this tells the C/C++ boot routine
that initialization tables are not present in memory. Thus, no runtime initialization is performed at boot time.
When the program is loaded, the loader must be able to:
J
Detect the presence of the .cinit section in the object file
J
Detect the presence of the attribute that tells it not to copy the .cinit
section
J
Understand the format of the initialization tables. (This format is
described in the TMS320C54x Optimizing C/C++ Compiler User’s
Guide.)
The loader then uses the initialization tables directly from the object file to
initialize variables in .bss.
Linker Description
7-73
Linking C/C++ Code
Figure 7–7 illustrates the RAM autoinitialization model.
Figure 7–7. RAM Model of Autoinitialization
Object File
Memory
Loader
.cinit
.bss
- ROM Model (–c option)
Variables are initialized at runtime. The .cinit section is loaded into
memory along with all the other sections. The linker defines a special
symbol called cinit that points to the beginning of the tables in memory.
When the program begins running, the C/C++ boot routine copies data
from the tables into the specified variables in the .bss section. This allows
initialization data to be stored in ROM and copied to RAM each time the
program is started.
Figure 7–8 illustrates the ROM autoinitialization model.
Figure 7–8. ROM Model of Autoinitialization
Object File
.cinit
Memory
Loader
Initialization
tables
(possibly ROM)
Boot
routine
.bss
7-74
Linking C/C++ Code
7.17.5 The –c and –cr Linker Options
The following list outlines what happens when you invoke the linker with the
–c or –cr option.
- The symbol _c_int00 is defined as the program entry point. _c_int00 is the
start of the C/C++ boot routine in boot.obj; referencing _c_int00 ensures
that boot.obj is automatically linked in from the runtime-support library
rts.lib.
- The .cinit output section is padded with a termination record to designate
to the boot routine (ROM model) or the loader (RAM model) when to stop
reading the initialization tables.
- In the ROM model (–c option), the linker defines the symbol cinit as the
starting address of the .cinit section. The C/C++ boot routine uses this
symbol as the starting point for autoinitialization.
- In the RAM model (–cr option):
J
The linker sets the symbol cinit to –1. This indicates that the
initialization tables are not in memory, so no initialization is performed
at runtime.
J
The STYP_COPY flag (0010h) is set in the .cinit section header.
STYP_COPY is the special attribute that tells the loader to perform
autoinitialization directly and not to load the .cinit section into memory.
The linker does not allocate space in memory for the .cinit section.
Linker Description
7-75
Linker Example
7.18 Linker Example
This example links three object files named demo.obj, fft.obj, and tables.obj
and creates a program called demo.out. The symbol SETUP is the program
entry point.
Assume that target memory has the following configuration:
Program Memory
Address Range
0080 to 7000
C000 to FF80
Contents
On-chip RAM_PG
On-chip ROM
Data Memory
Address Range
0080 to 0FFF
0060 to FFFF
Contents
RAM block ONCHIP
Mapped external addresses EXT
The output sections are constructed from the following input sections:
- Executable code, contained in the .text sections of demo.obj, fft.obj, and
tables.obj must be linked into program ROM.
- Variables, contained in the var_defs section of demo.obj, must be linked
into data memory in block ONCHIP.
- Tables of coefficients in the .data sections of demo.obj, tables.obj and
fft.obj must be linked into RAM block ONCHIP in data memory. A hole is
created with a length of 100 words and a fill value of 07A1Ch. The remainder of block ONCHIP must be initialized to the value 07A1Ch.
- The .bss sections from demo.obj. tables.obj, and fft.obj, which contain
variables, must be linked into block RAM_PG of program RAM. The
unused part of this RAM must be initialized to 0FFFFh.
- The xy section from demo.obj, which contains buffers and variables, will
have the default linking into block ONCHIP of data RAM, since it was not
explicitly linked.
Example 7–14 shows the linker command file for this example. Example 7–15
shows the map file.
7-76
Linker Example
Example 7–14. Linker Command File, demo.cmd
/***************************************************************/
/***
Specify Linker Options
***/
/***************************************************************/
–e coeff
/* Define the program entry point */
–o demo.out
/* Name the output file
*/
–m demo.map
/* Create an output map
*/
/***************************************************************/
/***
Specify the Input Files
***/
/***************************************************************/
demo.obj
fft.obj
tables.obj
/***************************************************************/
/***
Specify the Memory Configurations
***/
/***************************************************************/
MEMORY
{
PAGE 0: RAM_PG:
ROM:
origin=00080h
origin=0C000h
length=06F80h
length=03F80h
PAGE 1: ONCHIP:
EXT:
origin=00080h
origin=01000h
length=0F7Fh
length=0EFFFh
}
/****************************************************************/
/***
Specify the Output Sections
***/
/****************************************************************/
SECTIONS
{
.text: load = ROM, page = 0
/*
var_defs: load = ONCHIP, page=1 /*
link .text into ROM */
defs in RAM
*/
.data: fill = 07A1Ch, load=ONCHIP, page=1
{
tables.obj(.data) /* .data input */
fft.obj(.data)
/* .data input */
. = 100h;
/* create hole, fill with 07A1Ch */
}
/* and link with ONCHIP
*/
.bss: load=RAM_PG,page=0,fill=0FFFFh
/* Remaining .bss; fill and link */
}
/***************************************************************/
/***
End of Command File
***/
/***************************************************************/
Linker Description
7-77
Linker Example
Invoke the linker with the following command:
lnk500 demo.cmd
This creates the map file shown in Example 7–15 and an output file called
demo.out that can be run on a TMS320C54x.
Example 7–15. Output Map File, demo.map
OUTPUT FILE NAME:
<demo.out>
ENTRY POINT SYMBOL: 0
MEMORY CONFIGURATION
name
origin
length
used
attributes
–––––––– –––––––– ––––––––– ––––––– ––––––––––
PAGE 0: RAM_PG
00000080 000006f80 00000002
RWIX
ROM
0000c000 000003f80 00000011
RWIX
PAGE 1: ONCHIP
00000080 000000f7f 00000105
RWIX
EXT
00001000 00000efff 00000000
RWIX
SECTION ALLOCATION MAP
output
section
page
origin
–––––––– –––– ––––––––––
.text
0
0000c000
0000c000
0000c008
0000c00c
var_defs
1
00000080
00000080
.data
1
00000082
00000082
00000083
00000087
00000182
.bss
0
00000080
00000080
00000082
00000082
xy
1
00000182
00000182
GLOBAL SYMBOLS
address name
–––––––– ––––
00000080 .bss
00000082 .data
0000c000 .text
0000c002 ARRAY
00000082 TEMP
00000182 edata
00000082 end
0000c011 etext
[8 symbols]
7-78
length
––––––––––
00000011
00000008
00000004
00000005
00000002
00000002
00000100
00000001
00000004
000000fb
00000000
00000002
00000002
00000000
00000000
00000003
00000003
fill
––––––––
attributes/
input sections
––––––––––––––––
demo.obj (.text)
fft.obj (.text)
tables.obj (.text)
demo.obj (var_defs)
tables.obj (.data)
fft.obj (.data)
––HOLE–– [fill = 7a1c]
demo.obj (.data)
demo.obj (.bss) [fill=ffff]
tables.obj (.bss)
fft.obj (.bss)
UNINITIALIZED
demo.obj (xy)
address
––––––––
00000080
00000082
00000082
0000c002
00000182
0000018a
0000c000
0000c011
name
––––
.bss
.data
TEMP
ARRAY
end
edata
.text
etext
Chapter 8
Absolute Lister Description
The absolute lister is a debugging tool that accepts linked object files as input
and creates .abs files as output. These .abs files can be assembled to produce
a listing that shows the absolute addresses of object code. Manually, this could
be a tedious process requiring many operations; however, the absolute lister
utility performs these operations automatically.
Topic
Page
8.1
Producing an Absolute Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
8.2
Invoking the Absolute Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
8.3
Absolute Lister Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-5
Absolute Lister Description
8-1
Producing an Absolute Listing
8.1
Producing an Absolute Listing
Figure 8–1 illustrates the steps required to produce an absolute listing.
Figure 8–1. Absolute Lister Development Flow
Step 1:
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
Assembler
source file
First, assemble a source file.
Assembler
Object
file
Step 2:
Link the resulting object file.
Linker
Linked object
file
Step 3:
Absolute
lister
Invoke the absolute lister; use the linked object
file as input. This creates a file with an .abs
extension.
.abs
file
Step 4:
Assembler
Absolute
listing
8-2
Finally, assemble the .abs file; you must
invoke the assembler with the –a option. This
produces a listing file that contains absolute
addresses.
Invoking the Absolute Lister
8.2
Invoking the Absolute Lister
The syntax for invoking the absolute lister is:
abs500 [–options ] input file
abs500
is the command that invokes the absolute lister.
options
identifies the absolute lister options that you want to use.
Options are not case sensitive and can appear anywhere on the
command line following the command. Precede each option
with a hyphen (–). The absolute lister options are as follows:
–e
enables you to change the default naming conventions
for filename extensions on assembly files, C source files,
and C header files. The three options are listed below.
- –ea [.]asmext
- –ec [.]cext
- –eh [.]hext
for assembly files (default is .asm)
for C source files (default is .c)
for C header files (default is .h)
The “.” in the extensions and the space between the
option and the extension are optional.
–q
input file
(quiet) suppresses the banner and all progress information.
names the linked object file. If you do not supply an extension,
the absolute lister assumes that the input file has the default
extension .out. If you do not supply an input filename when you
invoke the absolute lister, the absolute lister will prompt you for
one.
The absolute lister produces an output file for each file that was linked. These
files are named with the input filenames and an extension of .abs. Header files,
however, do not generate a corresponding .abs file.
Assemble these files with the –a assembler option as follows to create the
absolute listing:
asm500 –a filename.abs
The –e options affect both the interpretation of filenames on the command line
and the names of the output files. They should always precede any filename
on the command line.
Absolute Lister Description
8-3
Invoking the Absolute Lister
The –e options are useful when the linked object file was created from C files
compiled with the debugging option (–g compiler option). When the debugging
option is set, the resulting linked object file contains the name of the source
files used to build it. In this case, the absolute lister will not generate a
corresponding .abs file for the C header files. Also, the .abs file corresponding
to a C source file will use the assembly file generated from the C source file
rather than the C source file itself.
For example, suppose the C source file hello.csr is compiled with debugging
set; this generates the assembly file hello.s. hello.csr also includes hello.hsr.
Assuming the executable file created is called hello.out, the following
command will generate the proper .abs file:
abs500 –ea s –ec csr –eh hsr hello.out
An .abs file will not be created for hello.hsr (the header file), and hello.abs will
include the assembly file hello.s, not the C source file hello.csr.
8-4
Absolute Lister Example
8.3
Absolute Lister Example
This example uses three source files. module1.asm and module2.asm both
include the file globals.def.
module1.asm
.text
.bss
.bss
.copy
ld
ld
array,100
dflag, 2
globals.def
#offset, A
dflag, A
module2.asm
.bss
.copy
ld
ld
offset, 2
globals.def
#offset, A
#array, A
globals.def
.global dflag
.global array
.global offset
The following steps create absolute listings for the files module1.asm and
module2.asm:
Step 1: First, assemble module1.asm and module2.asm:
asm500 module1
asm500 module2
This creates two object files called module1.obj and module2.obj.
Absolute Lister Description
8-5
Absolute Lister Example
Step 2: Next, link module1.obj and module2.obj using the following linker
command file, called bttest.cmd:
/************************************************/
/* File bttest.cmd –– COFF linker command file */
/*
for linking TMS320C54x modules
*/
/*********************************** ************/
–o bttest.out
/* Name the output file */
–m bttest.map
/* Create an output map */
/************************************************/
/*
Specify the Input Files
*/
/************************************************/
module1.obj
module2.obj
/************************************************/
/*
Specify the Memory Configurations
*/
/************************************************/
MEMORY
{
PAGE 0:
ROM: origin=2000h
length=2000h
PAGE 1:
RAM: origin=8000h
length=8000h
}
/************************************************/
/*
Specify the Output Sections
*/
/************************************************/
SECTIONS
{
.data: >RAM PAGE 1
.text: >ROM PAGE 0
.bss:
>RAM PAGE 1
}
Invoke the linker:
lnk500 bttest.cmd
This creates an executable object file called bttest.out; use this new
file as input for the absolute lister.
8-6
Absolute Lister Example
Step 3: Now, invoke the absolute lister:
abs500 bttest.out
This creates two files called module1.abs and module2.abs:
module1.abs:
array
dflag
offset
.data
edata
.text
etext
.bss
end
.nolist
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsect
.setsect
.setsect
.list
.text
.copy
08000h
08064h
08066h
08000h
08000h
02000h
02007h
08000h
08068h
”.text”,02000h
”.data”,08000h
”.bss”,08000h
”module1.asm”
module2.abs:
array
dflag
offset
.data
edata
.text
etext
.bss
end
.nolist
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsym
.setsect
.setsect
.setsect
.list
.text
.copy
08000h
08064h
08066h
08000h
08000h
02000h
02007h
08000h
08068h
”.text”,02003h
”.data”,08000h
”.bss”,08066h
”module2.asm”
Absolute Lister Description
8-7
Absolute Lister Example
These files contain the following information that the assembler
needs when you invoke it in step 4:
- They contain .setsym directives, which equate values to global
symbols. Both files contain global equates for the symbol dflag.
The symbol dflag was defined in the file globals.def, which was
included in module1.asm and module2.asm.
- They contain .setsect directives, which define the absolute
addresses for sections.
- They contain .copy directives, which tell the assembler which
assembly language source file to include.
The .setsym and .setsect directives are not useful in normal
assembly; they are useful only for creating absolute listings.
Step 4: Finally, assemble the .abs files created by the absolute lister
(remember that you must use the –a option when you invoke the
assembler):
asm500
asm500
–a
–a
module1.abs
module2.abs
This creates two listing files called module1.lst and module2.lst; no
object code is produced. These listing files are similar to normal
listing files; however, the addresses shown are absolute addresses.
The absolute listing files created are module1.lst (see Figure 8–2)
and module2.lst (see Figure 8–3).
8-8
Absolute Lister Example
Figure 8–2. module1.lst
TMS320C54x COFF Assembler
Version x.xx
Wed Oct 16 12:00:05 2001
Copyright (c) 2001
Texas Instruments Incorporated
module1.abs
A
A
A
A
B
B
B
A
A
22
23
1
2
3
4
1
2
3
5
002000
002000
008000
008064
002000 F020
002001 8066!
6 002002 1064–
PAGE
1
.text
.copy
”module1.asm”
.text
.bss
array, 100
.bss
dflag, 2
.copy globals.def
.global dflag
.global array
.global offset
ld
#offset, A
ld
dflag, A
No Errors, No Warnings
Figure 8–3. module2.lst
TMS320C54x COFF Assembler
Version x.xx
Wed Oct 16 12:00:17 2001
Copyright (c) 2001
Texas Instruments Incorporated
module2.abs
A
A
B
B
B
A
A
22 002003
23
1 008066
2
1
2
3
3 002003 F020
002004 8066–
4 002005 F020
002006 8000!
PAGE
1
.text
.copy
”module2.asm”
.bss
offset, 2
.copy globals.def
.global dflag
.global array
.global offset
ld
#offset, A
ld
#array, A
No Errors, No Warnings
Absolute Lister Description
8-9
Chapter 9
Cross-Reference Lister Description
The cross-reference lister is a debugging tool. This utility accepts linked object
files as input and produces a cross-reference listing as output. This listing
shows symbols, their definitions, and their references in the linked source files.
Topic
Page
9.1
Producing a Cross-Reference Listing . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
9.2
Invoking the Cross-Reference Lister . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.3
Cross-Reference Listing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
Cross-Reference Lister Description
9-1
Producing a Cross-Reference Listing
9.1 Producing a Cross-Reference Listing
Figure 9–1. Cross-Reference Lister Development Flow
Step 1:
Assembler
source file
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
ÍÍ
Assembler
First, invoke the assembler with the –x option.
This option produces a cross-reference table
in the listing file and adds to the object file
cross-reference information. By default, the
assembler cross-references only global symbols. If you use the –s option when invoking
the assembler, it will cross-reference local
variables as well.
Object
file
Step 2:
Link the object file (.obj) to obtain an executable object file (.out).
Linker
Linked object
file
Step 3:
Cross-reference
lister
Cross-reference
listing
9-2
Invoke the cross-reference lister. The following section provides the command syntax for
invoking the cross-reference lister utility.
Invoking the Cross-Reference Lister
9.2 Invoking the Cross-Reference Lister
To use the cross-reference utility, the file must be assembled with the correct
options and then linked into an executable file. Assemble the assembly language files with the –x option. This option creates a cross-reference listing and
adds cross-reference information to the object file.
By default, the assembler cross-references only global symbols, but if assembler is invoked with the –s option, local symbols are also added. Link the object
files to obtain an executable file.
To invoke the cross-reference lister, enter the following:
xref500 [–options] [input filename [output filename] ]
xref500
is the command that invokes the cross-reference utility.
options
identifies the cross-reference lister options you want to
use. Options are not case sensitive and can appear anywhere on the command line following the command. Precede each option with a hyphen (–). The cross-reference
lister options are as follows:
–l
(lowercase L) specifies the number of lines per
page for the output file. The format of the –l option
is –lnum, where num is a decimal constant. For
example, –l30 sets the number of lines per page in
the output file to 30. The space between the option
and the decimal constant is optional. The default is
60 lines per page.
–q
(quiet) suppresses the banner and all progress
information.
input filename
is a linked object file. If you omit the input filename, the
utility prompts for a filename.
output filename
is the name of the cross-reference listing file. If you omit
the output filename, the default filename will be the input
filename with an .xrf extension.
Cross-Reference Lister Description
9-3
Cross-Reference Listing Example
9.3 Cross-Reference Listing Example
================================================================================
Symbol: INIT
Filename
RTYP
AsmVal
LnkVal
DefLn
RefLn
RefLn
RefLn
________
____
________
________
______ _______ _______ _______
file1.asm
EDEF
’000000
000080
3
1
file2.asm
EREF
000000
000080
2
11
================================================================================
Symbol: X
Filename
RTYP
AsmVal
LnkVal
DefLn
RefLn
RefLn
RefLn
________
____
________
________
______ _______ _______ _______
file1.asm
EREF
000000
000001
2
5
file2.asm
EDEF
000001
000001
5
1
================================================================================
Symbol: Y
Filename
________
file2.asm
RTYP
____
EDEF
AsmVal
________
–000000
LnkVal
________
000080
DefLn
______
7
RefLn
_______
1
RefLn
_______
RefLn
_______
================================================================================
Symbol: Z
Filename
________
file2.asm
RTYP
____
EDEF
AsmVal
________
000003
LnkVal
________
000003
DefLn
______
9
RefLn
_______
1
RefLn
_______
RefLn
_______
================================================================================
9-4
Cross-Reference Listing Example
The terms defined below appear in the preceding cross-reference listing:
Symbol Name
Name of the symbol listed
Filename
Name of the file where the symbol appears
RTYP
The symbol’s reference type in this file. The possible reference types are:
STAT
The symbol is defined in this file and is not
declared as global.
EDEF
The symbol is defined in this file and is declared
as global.
EREF
The symbol is not defined in this file but is referenced as a global.
UNDF
The symbol is not defined in this file and is not
declared as global.
AsmVal
This hexadecimal number is the value assigned to the
symbol at assembly time. A value may also be preceded
by a character that describes the symbol’s attributes.
Table 9–1 lists these characters and names.
LnkVal
This hexadecimal number is the value assigned to the
symbol after linking.
DefLn
The statement number where the symbol is defined.
RefLn
The line number where the symbol is referenced. If the line
number is followed by an asterisk(*), then that reference
may modify the contents of the object. If the line number
is followed by a letter (such as A, B, or C), the symbol is
referenced in a file specified by a .include directive in the
assembly source. “A” is assigned to the first file specified
by a .include directive; “B” is assigned to the second file,
etc. A blank in this column indicates that the symbol was
never used.
Cross-Reference Lister Description
9-5
Cross-Reference Listing Example
Table 9–1. Symbol Attributes
Character
9-6
Meaning
’
Symbol defined in a .text section
”
Symbol defined in a .data section
+
Symbol defined in a .sect section
–
Symbol defined in a .bss or .usect section
=
Symbol defined in a .reg section
Chapter 10
Hex Conversion Utility Description
The TMS320C54xt assembler and linker create object files that are in
common object file format (COFF). COFF is a binary object file format that
encourages modular programming and provides more powerful and flexible
methods for managing code segments and target system memory.
Most EPROM programmers do not accept COFF object files as input. The hex
conversion utility converts a COFF object file into one of several standard
ASCII hexadecimal formats, suitable for loading into an EPROM programmer.
The utility is also useful in other applications requiring hexadecimal conversion
of a COFF object file (for example, when using debuggers and loaders). This
utility also supports the on-chip boot loader built into the target device,
automating the code creation process for the C54x.
The hex conversion utility can produce these output file formats:
-
ASCII-Hex, supporting 16-bit addresses
Extended Tektronix (Tektronix)
Intel MCS-86 (Intel)
Motorola Exorciser (Motorola-S), supporting 16-bit, 24-bit, and 32-bit
addresses
- Texas Instruments SDSMAC (TI-Tagged), supporting 16-bit addresses
Topic
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
10.10
10.11
10.12
Page
Hex Conversion Utility Development Flow . . . . . . . . . . . . . . . . . . . . 10-2
Invoking the Hex Conversion Utility . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Command File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-7
Understanding Memory Widths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9
The ROMS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-16
The SECTIONS Directive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-22
Output Filenames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-24
Image Mode and the –fill Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-26
Building a Table for an On-Chip Boot Loader . . . . . . . . . . . . . . . . . 10-28
Controlling the ROM Device Address . . . . . . . . . . . . . . . . . . . . . . . . 10-35
Description of the Object Formats . . . . . . . . . . . . . . . . . . . . . . . . . . 10-39
Hex Conversion Utility Error Messages . . . . . . . . . . . . . . . . . . . . . . 10-45
Hex Conversion Utility Description
10-1
Hex Conversion Utility Development Flow
10.1 Hex Conversion Utility Development Flow
Figure 10–1 highlights the role of the hex conversion utility in the assembly
language development process.
Figure 10–1. Hex Conversion Utility Development Flow
C
source
files
Macro
source
files
C compiler
Archiver
Assembler
source
Macro
library
Assembler
Archiver
Library of
object
files
10-2
Assembler
source
Library-build
utility
Runtimesupport
library
Linker
Debugging
tools
Executable
COFF
file
Hex conversion
utility
EPROM
programmer
COFF
object
files
Translator
utility
Absolute lister
Cross-reference
lister
’C5000
Invoking the Hex Conversion Utility
10.2 Invoking the Hex Conversion Utility
There are two basic methods for invoking the hex conversion utility:
- Specify the options and filenames on the command line. The following
example converts the file firmware.out into TI-Tagged format, producing
two output files, firm.lsb and firm.msb.
hex500 –t firmware –o firm.lsb –o firm.msb
- Specify the options and filenames in a command file. You can create
a batch file that stores command line options and filenames for invoking
the hex conversion utility. The following example invokes the utility using
a command file called hexutil.cmd:
hex500 hexutil.cmd
In addition to regular command line information, you can use the hex
conversion utility ROMS and SECTIONS directives in a command file.
To invoke the hex conversion utility, enter:
hex500 [–options] filename
hex500
is the command that invokes the hex conversion utility.
–options
supplies additional information that controls the hex conversion
process. You can use options on the command line or in a command file.
- All options are preceded by a dash and are not case sensi-
tive.
- Several options have an additional parameter that must be
separated from the option by at least one space.
- Options with multicharacter names must be spelled exactly
as shown in this document; no abbreviations are allowed.
- Options are not affected by the order in which they are used.
The exception to this rule is the –q option, which must be
used before any other options.
filename
names a COFF object file or a command file (for more information on command files, see Section 10.3, Command Files, on
page 10-7).
Hex Conversion Utility Description
10-3
Invoking the Hex Conversion Utility
Table 10–1. Hex Conversion Utility Options
(a) General options
The general options control the overall operation of the hex conversion utility.
Option
Description
Page
–byte
Number bytes sequentially
10-37
–map filename
Generate a map file
10-21
–o filename
Specify an output filename
10-24
–q
Run quietly (when used, it must appear before
other options)
10-7
(b) Image options
The image options create a continuous image of a range of target memory.
Option
Description
Page
–fill value
Fill holes with value
10-27
–image
Specify image mode
10-26
–zero
Reset the address origin to zero
10-36
(c) Memory options
The memory options configure the memory widths for your output files.
10-4
Option
Description
Page
–memwidth value
Define the system memory word width (default 16
bits)
10-10
–order {LS | MS}
Specify the memory word ordering
10-14
–romwidth value
Specify the ROM device width (default depends on
format used)
10-11
Invoking the Hex Conversion Utility
Table 10–1. Hex Conversion Utility Options (Continued)
(d) Output formats
The output formats specify the format of the output file.
Option
Description
Page
–a
Select ASCII-Hex
10-40
–i
Select Intel
10-41
–m1
Select Motorola–S1
10-42
–m2 or –m
Select Motorola–S2 (default)
10-42
–m3
Select Motorola–S3
10-42
–t
Select TI-Tagged
10-43
–x
Select Tektronix
10-44
(e) Boot-loader options for all C54x devices
The boot-loader options for all C54x devices control how the hex conversion
utility builds the boot table.
Option
Description
Page
–boot
Convert all sections into bootable form (use instead 10-30
of a SECTIONS directive)
–bootorg PARALLEL
Specify the source of the boot loader table as the
parallel port
10-29
–bootorg SERIAL
Specify the source of the boot loader table as the
serial port
10-29
–bootorg value
Specify the source address of the boot loader table
10-30
–bootpage value
Specify the target page number of the boot loader
table
10-30
–e value
Specify the entry point at which to begin execution
after boot loading. The value can be an address or
a global symbol.
10-29
Hex Conversion Utility Description
10-5
Invoking the Hex Conversion Utility
Table 10–1. Hex Conversion Utility Options (Continued)
(f) Boot-loader options for the C54x LP devices only
10-6
Option
Description
Page
–bootorg WARM
or –warm
Specify the source of the boot loader table as the
table currently in memory
10-29
–bootorg COMM
Specify the source of the boot loader table as the
communications port
10-29
–spc value
Set the serial port control register value
10-29
–spce value
Set the serial port control extension register value
10-29
–arr value
Set the ABU receive address register value
10-29
–bkr value
Set the ABU transmit buffer size register value
10-29
–tcsr value
Set the TDM serial port channel select register
value
10-29
–trta value
Set the TDM serial port receive/transmit address
register value
10-29
–swwsr value
Set the Software Wait State Reg value for
PARALLEL/WARM boot mode
10-29
–bscr value
Set the Bank-Switch Control Reg value for
PARALLEL/WARM boot mode
10-29
Command File
10.3 Command File
A command file is useful if you plan to invoke the utility more than once with
the same input files and options. It is also useful if you want to use the ROMS
and SECTIONS hex conversion utility directives to customize the conversion
process.
Command files are ASCII files that contain one or more of the following:
- Options and filenames. These are specified in a command file in exactly
the same manner as on the command line.
- ROMS directive. The ROMS directive defines the physical memory con-
figuration of your system as a list of address-range parameters. (For more
information about the ROMS directive, see Section 10.5, The ROMS
Directive, on page 10-16.)
- SECTIONS directive. The SECTIONS directive specifies which sections
from the COFF object file should be selected. (For more information about
the SECTIONS directive, see Section 10.6, The SECTIONS Directive, on
page 10-22.)
You can also use this directive to identify specific sections that will be
initialized by an on-chip boot loader. (For more information on the on-chip
boot loader, see Section 10.9.3, Building a Table for an On-Chip Boot
Loader, on page 10-29.)
- Comments. You can add comments to your command file by using the /*
and */ delimiters. For example:
/*
This is a comment
*/
To invoke the utility and use the options you defined in a command file, enter:
hex500 command_filename
You can also specify other options and files on the command line. For example, you could invoke the utility by using both a command file and command
line options:
hex500 firmware.cmd –map firmware.mxp
The order in which these options and file names appear is not important. The
utility reads all input from the command line and all information from the
command file before starting the conversion process. However, if you are
using the –q option, it must appear as the first option on the command line or
in a command file.
The –q option suppresses the utility’s normal banner and progress information.
Hex Conversion Utility Description
10-7
Command File
10.3.1 Examples of Command Files
- Assume that a command file named firmware.cmd contains these lines:
firmware.out
–t
–o
firm.lsb
–o
firm.msb
/*
/*
/*
/*
input file
TI–Tagged
output file
output file
*/
*/
1, LSBs of ROM */
2, MSBs of ROM*/
You can invoke the hex conversion utility by entering:
hex500 firmware.cmd
- This example converts a file called appl.out into four hex files in Intel
format. Each output file is one byte wide and 16K bytes long. The .text
section is converted to boot loader format.
appl.out
–i
–map appl.mxp
/* input file
*/
/* Intel format */
/* map file
*/
ROMS
{
ROW1: origin=01000h len=04000h romwidth=8
files={ appl.u0 appl.u1 }
ROW2: origin 05000h len=04000h romwidth=8
files={ app1.u2 appl.u3 }
}
SECTIONS
{
.text: BOOT
.data, .cinit, .sect1, .vectors, .const:
}
10-8
Understanding Memory Widths
10.4 Understanding Memory Widths
The hex conversion utility makes your memory architecture more flexible by
allowing you to specify memory and ROM widths. In order to use the hex
conversion utility, you must understand how the utility treats word widths. Four
widths are important in the conversion process: target width, data width,
memory width, and ROM width. The terms target word, data word, memory
word, and ROM word refer to a word of such a width.
Figure 10–2 illustrates the three separate and distinct phases of the hex
conversion utility’s process flow.
Figure 10–2. Hex Conversion Utility Process Flow
COFF input file
Phase I
The raw data in the COFF file is
truncated to the size specified
by the default data width (16 bits).
Phase II
The data-width-sized internal
representation is divided into words
according to size specified by the
–memwidth option.
Phase III
The memwidth-sized words are
broken up according to the size
specified by the –romwidth option
and are written to a file(s)
according to the specified format
(i.e. Intel, Tektronix, etc..).
Raw data in COFF files is represented in target-width-sized
words. For C54x, this is 16 bits.
The target width is fixed and
cannot be changed.
Output file(s)
Hex Conversion Utility Description
10-9
Understanding Memory Widths
10.4.1 Target Width
Target width is the unit size (in bits) of raw data fields in the COFF file. This
corresponds to the size of an opcode on the target processor. The width is fixed
for each target and cannot be changed. The C54x targets have a width of 16
bits.
10.4.2 Data Width
Data width is the logical width (in bits) of the data words stored in a particular
section of a COFF file. Usually, the logical data width is the same as the target
width. The data width is fixed at 16 bits for the TMS320C54x and cannot be
changed.
10.4.3 Memory Width
Memory width is the physical width (in bits) of the memory system. Usually, the
memory system is physically the same width as the target processor width: a
16-bit processor has a 16-bit memory architecture. However, some applications require target words to be broken up into multiple, consecutive, narrower
memory words. Moreover, with certain processors like the C54x, the memory
width can be narrower than the target width.
The hex conversion utility defaults memory width to the target width (in this
case, 16 bits).
You can change the memory width by:
- Using the –memwidth option. This changes the memory width value for
the entire file.
- Setting the memwidth parameter of the ROMS directive. This changes
the memory width value for the address range specified in the ROMS
directive and overrides the –memwidth option for that range. See Section
10.5, The ROMS Directive, on page 10-16.
For both methods, use a value that is a power of 2 greater than or equal to 8.
You should change the memory width default value of 16 only in exceptional
situations: for example, when you need to break single target words into
consecutive, narrower memory words. Situations in which memory words are
narrower than target words are most common when you use an on-chip boot
loader that supports booting from narrower memory. For example, a 16-bit
TMS320C54x can be booted from 8-bit memory or an 8-bit serial port, with
each 16-bit value occupying two memory locations (this would be specified as
–memwidth 8).
10-10
Understanding Memory Widths
Figure 10–3 demonstrates how the memory width is related to the data width.
Figure 10–3. Data and Memory Widths
Source file
.word 0AABBh
.word 01122h
. . .
Data width = 16 (fixed)
Data after
phase I
of hex utility
0AABBh
01122h
. . .
Memory widths (variable)
data width = 16
–memwidth 16 (default)
Data after
phase II
of hex utility
–memwidth 8
AABB
BB
1122
. . .
AA
22
11
. . .
10.4.4 ROM Width
ROM width specifies the physical width (in bits) of each ROM device and corresponding output file (usually one byte or eight bits). The ROM width determines how the hex conversion utility partitions the data into output files. After
the target words are mapped to the memory words, the memory words are broken into one or more output files. The number of output files per address range
is determined by the following formula, where memory width w ROM width:
number of files = memory width ROM width
For example, for a memory width of 16, you could specify a ROM width of 16
and get a single output file containing 16-bit words. Or you can use a ROM
width value of 8 to get two files, each containing 8 bits of each word.
For more information on calculating the number of files per address range, see
Section 10.5, The ROMS Directive, on page 10-16.
Hex Conversion Utility Description
10-11
Understanding Memory Widths
The default ROM width that the hex conversion utility uses depends on the output format:
- All hex formats except TI-Tagged are configured as lists of 8-bit bytes; the
default ROM width for these formats is 8 bits.
- TI-Tagged is a 16-bit format; the default ROM width for TI-Tagged is 16
bits.
Note:
The TI-Tagged Format Is 16 Bits Wide
You cannot change the ROM width of the TI-Tagged format. The TI-Tagged
format supports a 16-bit ROM width only.
You can change ROM width (except for TI-Tagged) by:
- Using the –romwidth option. This changes the ROM width value for the
entire COFF file.
- Setting the romwidth parameter of the ROMS directive. This changes the
ROM width value for a specific ROM address range and overrides the
–romwidth option for that range. See Section 10.5, The ROMS Directive,
on page 10-16.
For both methods, use a value that is a power of 2 greater than or equal to 8.
If you select a ROM width that is wider than the natural size of the output format
(16 bits for TI-Tagged or 8 bits for all others), the utility simply writes multibyte
fields into the file.
Figure 10–4 illustrates how the target, memory, and ROM widths are related
to one another.
10-12
Understanding Memory Widths
Figure 10–4. Data, Memory, and ROM Widths
Source file
.word 0AABBCDDh
.word 01122344h
. . .
Data width = 16 (fixed)
Data after
phase I
of hex utility
0AABBh
01122h
. . .
Memory widths (variable)
–memwidth 16
Data after
phase II
of hex utility
–memwidth 8
AABB
BB
1122
. . .
AA
22
11
. . .
Output files
Data after
phase III
of hex utility
–romwidth 16
–o file.wrd
AABB1122
–romwidth 8
–o file.b0
BB 22
–o file.b1
AA 11
–romwidth 8
–o file.byt
. . .
. . .
. . .
BBAA2211
. . .
Hex Conversion Utility Description
10-13
Understanding Memory Widths
10.4.5 A Memory Configuration Example
Figure 10–5 shows a typical memory configuration example. This memory
system consists of two 128K 8-bit ROM devices.
Figure 10–5. C54x Memory Configuration Example
Data width = 16 bits
Lower 8 bits (data)
AABBh
Upper 8 bits (data)
CPU
Source file
word AABBh
AAh
BBh
128K x 8
ROM0
128K x 8
ROM1
ROM width
8 bits
ROM width
8 bits
System memory width 16 bits
10.4.6 Specifying Word Order for Output Words
When memory words are narrower than target words (memory width < 16), target words are split into multiple consecutive memory words. There are two
ways to split a wide word into consecutive memory locations in the same hex
conversion utility output file:
- –order MS specifies big-endian ordering, in which the most significant
part of the wide word occupies the first of the consecutive locations
- –order LS specifies little-endian ordering, in which the the least signifi-
cant part of the wide word occupies the first of the consecutive locations
By default, the utility uses little-endian format because the C54x boot loaders
expect the data in this order. Unless you are using your own boot loader program, avoid using –order MS.
10-14
Understanding Memory Widths
Note:
When the –order Option Applies
- This option applies only when you use a memory width with a value less
than 16. Otherwise, –order is ignored.
- This option does not affect the way memory words are split into output
files. Think of the files as a set: the set contains a least significant file and
a most significant file, but there is no ordering over the set. When you list
filenames for a set of files, you always list the least significant first, regardless of the –order option.
Figure 10–6 demonstrates how –order affects the conversion process. This
figure, and the previous figure, Figure 10–4, explain the condition of the data
in the hex conversion utility output files.
Figure 10–6. Varying the Word Order
Source file
.word 0AABBh
.word 01122h
. . .
Target width = 16 (fixed)
0AABBh
01122h
. . .
Memory widths (variable)
–memwidth 8
–order LS (default)
–memwidth 8
–order MS
BB
AA
22
11
. . .
AA
BB
11
22
. . .
Hex Conversion Utility Description
10-15
The ROMS Directive
10.5 The ROMS Directive
The ROMS directive specifies the physical memory configuration of your
system as a list of address-range parameters.
Each address range produces one set of files containing the hex conversion
utility output data that corresponds to that address range. Each file can be
used to program one single ROM device.
If you do not use a ROMS directive, the utility defines a default memory configuration that includes two address spaces (PAGE 0 and PAGE 1). Each address
space contains a single address range. PAGE 0 contains a default range of the
entire program address space, and PAGE 1 contains a default range of the entire data address space.
The ROMS directive is similar to the MEMORY directive of the TMS320C54x
linker: both define the memory map of the target address space. Each line
entry in the ROMS directive defines a specific address range. The general
syntax is:
ROMS
{
[PAGE n:]
romname: [origin=value,] [length=value,] [romwidth=value,]
[memwidth=value,] [fill=value,]
[files={filename1, filename2, ...}]
romname: [origin=value,] [length=value,] [romwidth=value,]
[memwidth=value,] [fill=value,]
[files={filename1, filename2, ...}]
...
}
10-16
ROMS
begins the directive definition.
PAGE
identifies a memory space for targets that use program- and
data-address spaces. If your program has been linked normally, PAGE 0 specifies program memory and PAGE 1 specifies data memory. Each memory range after the PAGE command belongs to that page until you specify another PAGE. If
you don’t include PAGE, all ranges belong to page 0.
romname
identifies a memory range. The name of the memory range
may be one to eight characters in length. The name has no significance to the program; it simply identifies the range. (Duplicate memory range names are allowed.)
The ROMS Directive
origin
specifies the starting address of a memory range. It can be
entered as origin, org, or o. The associated value must be a
decimal, octal, or hexadecimal constant. If you omit the origin
value, the origin defaults to 0.
The following table summarizes the notation you can use to
specify a decimal, octal, or hexadecimal constant:
Constant
Notation
Example
Hexadecimal
0x prefix or h suffix
0x77 or 077h
Octal
0 prefix
077
Decimal
No prefix or suffix
77
length
specifies the length of a memory range as the physical length
of the ROM device. It can be entered as length, len, or l. The
value must be a decimal, octal, or hexadecimal constant. If you
omit the length value, it defaults to the length of the entire
address space.
romwidth
specifies the physical ROM width of the range in bits (see
subsection 10.4.4, ROM Width, on page 10-11). Any value you
specify here overrides the –romwidth option. The value must
be a decimal, octal, or hexadecimal constant that is a power of
2 greater than or equal to 8.
memwidth
specifies the memory width of the range in bits (see subsection
10.4.3, Memory Width, on page 10-10). Any value you specify
here overrides the –memwidth option. The value must be a
decimal, octal, or hexadecimal constant that is a power of 2
greater than or equal to 8. When using the memwidth
parameter, you must also specify the paddr parameter for each
section in the SECTIONS directive.
fill
specifies a fill value to use for the range. In image mode, the hex
conversion utility uses this value to fill any holes between
sections in a range. The value must be a decimal, octal, or
hexadecimal constant with a width equal to the target width.
Any value you specify here overrides the –fill option. When
using fill, you must also use the –image command line option.
See subsection 10.8.2, Specifying a Fill Value, on page 10-27.
Hex Conversion Utility Description
10-17
The ROMS Directive
files
identifies the names of the output files that correspond to this
range. Enclose the list of names in curly braces and order them
from least significant to most significant output file.
The number of file names should equal the number of output
files that the range will generate. To calculate the number of
output files, refer to Section 10.4.4, ROM Width, on page
10-11. The utility warns you if you list too many or too few filenames.
Unless you are using the –image option, all of the parameters defining a range
are optional; the commas and equals signs are also optional. A range with no
origin or length defines the entire address space. In image mode, an origin and
length are required for all ranges.
Ranges on the same page must not overlap and must be listed in order of
ascending address.
10.5.1 When to Use the ROMS Directive
If you do not use a ROMS directive, the utility defines a default memory configuration that includes two address spaces (PAGE 0 and PAGE 1). Each address
space contains a single address range. PAGE 0 contains a default range of the
entire program address space, and PAGE 1 contains a default range of the entire data address space. If nothing is loaded into a particular page, no output
is created for that page.
Use the ROMS directive when you want to:
- Program large amounts of data into fixed-size ROMs. When you spe-
cify memory ranges corresponding to the length of your ROMs, the utility
automatically breaks the output into blocks that fit into the ROMs.
- Restrict output to certain segments. You can also use the ROMS direc-
tive to restrict the conversion to a certain segment or segments of the target address space. The utility does not convert the data that falls outside
of the ranges defined by the ROMS directive. Sections can span range
boundaries; the utility splits them at the boundary into multiple ranges. If
a section falls completely outside any of the ranges you define, the utility
does not convert that section and issues no messages or warnings. In this
way, you can exclude sections without listing them by name with the
SECTIONS directive. However, if a section falls partially in a range and
partially in unconfigured memory, the utility issues a warning and converts
only the part within the range.
- Use image mode. When you use the –image option, you must use a
ROMS directive. Each range is filled completely so that each output file in
10-18
The ROMS Directive
a range contains data for the whole range. Gaps before, between, or after
sections are filled with the fill value from the ROMS directive, with the value
specified with the –fill option, or with the default value of 0.
10.5.2 An Example of the ROMS Directive
The ROMS directive in Example 10–1 shows how 16K words of 16-bit memory
could be partitioned for four 8K 8-bit EPROMs.
Example 10–1. A ROMS Directive Example
infile.out
–image
–memwidth 16
ROMS
{
EPROM1: org = 04000h, len = 02000h, romwidth = 8
files = { rom4000.b0, rom4000.b1 }
EPROM2: org = 06000h, len = 02000h, romwidth = 8,
fill = 0FFh,
files = { rom6000.b0, rom6000.b1 }
}
In this example, EPROM1 defines the address range from 4000h through
5FFFh. The range contains the following sections:
This section
Has this range
.text
4000h through 487Fh
.data
5B80H through 5FFFh
The rest of the range is filled with 0h (the default fill value). The data from this
range is converted into two output files:
- rom4000.b0 contains bits 0 through 7
- rom4000.b1 contains bits 8 through 15
EPROM2 defines the address range from 6000h through 7FFFh. The range
contains the following sections:
This section
Has this range
.data
6000h through 633Fh
.table
6700h through 7C7Fh
Hex Conversion Utility Description
10-19
The ROMS Directive
The rest of the range is filled with 0FFh (from the specified fill value). The data
from this range is converted into two output files:
- rom6000.b0 contains bits 0 through 7
- rom6000.b1 contains bits 8 through 15
Figure 10–7 shows how the ROMS directive partitions the infile.out file into
four output files.
Figure 10–7. The infile.out File From Example 10–1 Partitioned Into Four Output Files
COFF File:
Output Files:
EPROM1
rom4000.b0 rom4000.b1
infile.out
04000h
.text
04000h
(org)
04880h
05B80h
.data
0633Fh
06700h
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
.text
0487Fh
05B80h
0h
0h
.data
.data
05FFFh
width = 8 bits
.table
len =
2000h (8K)
EPROM2
rom6000.b0 rom6000.b1
07C7Fh
memwidth = 16 bits
06000h
06340h
06700h
07C80h
07FFFh
10-20
.text
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
.data
0FFh
.data
0FFh
.table
.table
0FFh
0FFh
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
The ROMS Directive
10.5.3 Creating a Map File of the ROMS Directive
The map file (specified with the –map option) is advantageous when you use
the ROMS directive with multiple ranges. The map file shows each range, its
parameters, names of associated output files, and a list of contents (section
names and fill values) broken down by address. Following is a segment of the
map file resulting from the example in Example 10–1.
Example 10–2. Map File Output From Example 10–1 Showing Memory Ranges
–––––––––––––––––––––––––––––––––––––––––––––––––––––
00004000..00005fff Page=0 Width=8 ”EPROM1”
–––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES:
rom4000.b0
[b0..b7]
rom4000.b1
[b8..b15]
CONTENTS: 00004000..0000487f .text
00004880..00005b7f FILL = 00000000
00005b80..00005fff .data
–––––––––––––––––––––––––––––––––––––––––––––––––––––
00006000..00007fff Page=0 Width=8 ”EPROM2”
–––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES:
rom6000.b0
[b0..b7]
rom6000.b1
[b8..b15]
CONTENTS: 00006000..0000633f
00006340..000066ff
00006700..00007c7f
00007c80..00007fff
.data
FILL = 000000ff
.table
FILL = 000000ff
Hex Conversion Utility Description
10-21
The SECTIONS Directive
10.6 The SECTIONS Directive
You can convert specific sections of the COFF file by name with the
SECTIONS directive. You can also specify those sections you want the utility
to configure for loading from an on-chip boot loader, and those sections that
you want to locate in ROM at a different address than the load address specified in the linker command file:
- If you use a SECTIONS directive, the utility converts only the sections that
you list in the directive and ignores all other sections in the COFF file.
- If you don’t use a SECTIONS directive, the utility converts all initialized
sections that fall within the configured memory. The TMS320C54x
compiler-generated initialized sections include: .text, .const, .cinit, and
.switch.
Uninitialized sections are never converted, whether or not you specify them
in a SECTIONS directive.
Note:
Sections Generated by the C/C++ Compiler
The TMS320C54x C/C++ compiler automatically generates these sections:
- Initialized sections: .text, .const, .cinit, and .switch.
- Uninitialized sections: .bss, .stack, and .sysmem.
Use the SECTIONS directive in a command file. (For more information about
using a command file, see Section 10.3, Command Files, on page 10-7.) The
general syntax for the SECTIONS directive is:
SECTIONS
{
sname: [paddr=value]
sname: [paddr=boot]
sname: [= boot ],
...
}
10-22
The SECTIONS Directive
SECTIONS begins the directive definition.
sname
identifies a section in the COFF input file. If you specify a section that doesn’t exist, the utility issues a warning and ignores
the name.
paddr
specifies the physical ROM address at which this section
should be located. This value overrides the section load
address given by the linker. (See Section 10.10, Controlling the
ROM Device Address, on page 10-35).This value must be a
decimal, octal, or hexadecimal constant. It can also be the word
boot (to indicate a boot table section for use with the on-chip
boot loader). If your file contains multiple sections, and if one
section uses a paddr parameter, then all sections must use a
paddr parameter.
= boot
configures a section for loading by the on-chip boot loader. This
is equivalent to using paddr=boot. Boot sections have a physical address determined both by the target processor type and
by the various boot-loader-specific command line options.
The commas separating section names are optional. For more similarity with
the linker’s SECTIONS directive, you can use colons after the section names
(in place of the equal sign on the boot keyboard). For example, the following
statements are equivalent:
SECTIONS { .text: .data: boot }
SECTIONS { .text, .data = boot }
In the example below, the COFF file contains six initialized sections: .text,
.data, .const, .vectors, .coeff, and .tables. Suppose you want only .text and
.data to be converted. Use a SECTIONS directive to specify this:
SECTIONS { .text, .data }
To configure both of these sections for boot loading, add the boot keyword:
SECTIONS { .text = boot, .data = boot }
Note:
Using the –boot Option and the SECTIONS Directive
When you use the SECTIONS directive with the on-chip boot loader, the
–boot option is ignored. You must explicitly specify any boot sections in the
SECTIONS directive. For more information about –boot and other command
line options associated with the on-chip boot loader, see Table 10–2, page
10-29.
Hex Conversion Utility Description
10-23
Output Filenames
10.7 Output Filenames
When the hex conversion utility translates your COFF object file into a data
format, it partitions the data into one or more output files. When multiple files
are formed by splitting data into byte-wide or word-wide files, filenames are
always assigned in order from least to most significant. This is true, regardless
of target or COFF endian ordering, or of any –order option.
10.7.1 Assigning Output Filenames
The hex conversion utility follows this sequence when assigning output filenames:
1) It looks for the ROMS directive. If a file is associated with a range in the
ROMS directive and you have included a list of files (files = {. . .}) on that
range, the utility takes the filename from the list.
For example, assume that the target data is 16-bit words being converted
to two files, each eight bits wide. To name the output files using the ROMS
directive, you could specify:
ROMS
{
RANGE1: romwidth=8, files={ xyz.b0 xyz.b1 }
}
The utility creates the output files by writing the least significant bits (LSBs)
to xyz.b0 and the most significant bits (MSBs) to xyz.b1.
2) It looks for the –o options. You can specify names for the output files by
using the –o option. If no filenames are listed in the ROMS directive and
you use –o options, the utility takes the filename from the list of –o options.
The following line has the same effect as the example above using the
ROMS directive:
–o xyz.b0 –o xyz.b1
Note that if both the ROMS directive and –o options are used together, the
ROMS directive overrides the –o options.
10-24
Output Filenames
3) It assigns a default filename. If you specify no filenames or fewer names
than output files, the utility assigns a default filename. A default filename
consists of the base name from the COFF input file plus a 2- to 3-character
extension (e.g., filename.abc). The extension has three parts:
a) A format character, based on the output format:
a
i
t
m
x
for ASCII-Hex
for Intel
for TI-Tagged
for Motorola-S
for Tektronix
b) The range number in the ROMS directive. Ranges are numbered
starting with 0. If there is no ROMS directive, or only one range, the
utility omits this character.
c) The file number in the set of files for the range, starting with 0 for the
least significant file.
For example, assume coff.out is for a 16-bit target processor and you are
creating Intel format output. With no output filenames specified, the utility
produces two output files named coff.i00 and coff.i01.
If you include the following ROMS directive when you invoke the hex
conversion utility, you would have two output files:
ROMS
{
range1: o = 1000h l = 1000h
range2: o = 2000h l = 1000h
}
These Output Files
Contain This Data
coff.i00
1000h through 1FFFh
coff.i10
2000h through 2FFFh
Hex Conversion Utility Description
10-25
Image Mode and the –fill Option
10.8 Image Mode and the –fill Option
This section points out the advantages of operating in image mode and
describes how to produce output files with a precise, continuous image of a
target memory range.
10.8.1 The –image Option
With the –image option, the utility generates a memory image by completely
filling all of the mapped ranges specified in the ROMS directive.
A COFF file consists of blocks of memory (sections) with assigned memory
locations. Typically, all sections are not adjacent: there are gaps between sections in the address space for which there is no data. When such a file is converted without the use of image mode, the hex conversion utility bridges these
gaps by using the address records in the output file to skip ahead to the start
of the next section. In other words, there may be discontinuities in the output
file addresses. Some EPROM programmers do not support address discontinuities.
In image mode, there are no discontinuities. Each output file contains a continuous stream of data that corresponds exactly to an address range in target
memory. Any gaps before, between, or after sections are filled with a fill value
that you supply.
An output file converted by using image mode still has address records
because many of the hexadecimal formats require an address on each line.
However, in image mode, these addresses will always be contiguous.
Note:
Defining the Ranges of Target Memory
If you use image mode, you must also use a ROMS directive. In image mode,
each output file corresponds directly to a range of target memory. You must
define the ranges. If you don’t supply the ranges of target memory, the utility
tries to build a memory image of the entire target processor address space—
potentially a huge amount of output data. To prevent this situation, the utility
requires you to explicitly restrict the address space with the ROMS directive.
10-26
Image Mode and the –fill Option
10.8.2 Specifying a Fill Value
The –fill option specifies a value for filling the holes between sections. The fill
value must be specified as an integer constant following the –fill option. The
width of the constant is assumed to be that of a word on the target processor.
For example, for the C54x, specifying –fill 0FFh results in a fill pattern of
00FFh. The constant value is not sign extended.
The hex conversion utility uses a default fill value of zero if you don’t specify
a value with the fill option. The –fill option is valid only when you use –image;
otherwise, it is ignored.
10.8.3 Steps to Follow in Image Mode
Step 1: Define the ranges of target memory with a ROMS directive. See
Section 10.5, The ROMS Directive, on page 10-16 for details.
Step 2: Invoke the hex conversion utility with the –image option. To number
the bytes sequentially, use the –byte option; to reset the address
origin to zero for each output file, use the –zero option. See
subsection 10.10.3, The –byte Option, on page 10-37 for details on
the –byte option, and page 10-36 for details on the –zero option. If
you don’t specify a fill value with the ROMS directive and you want
a value other than the default of zero, use the –fill option.
Hex Conversion Utility Description
10-27
Building a Table for an On-Chip Boot Loader
10.9 Building a Table for an On-Chip Boot Loader
Some DSP devices, such as the C54x, have a built-in boot loader that initializes memory with one or more blocks of code or data. The boot loader uses
a special table (a boot table) stored in memory (such as EPROM) or loaded
from a device peripheral (such as a serial or communications port) to initialize
the code or data. The hex conversion utility supports the boot loader by automatically building the boot table.
10.9.1 Description of the Boot Table
The input for a boot loader is the boot table. The boot table contains records
that instruct the on-chip loader to copy blocks of data contained in the table to
specified destination addresses. Some boot tables also contain values for initializing various processor control registers. The boot table can be stored in
memory or read in through a device peripheral.
The hex conversion utility automatically builds the boot table for the boot
loader. Using the utility, you specify the COFF sections you want the boot
loader to initialize, the table location, and the values for any control registers.
The hex conversion utility identifies the target device type from the COFF file,
builds a complete image of the table according to the format required by that
device, and converts it into hexadecimal in the output files. Then, you can burn
the table into ROM or load it by other means.
The boot loader supports loading from memory that is narrower than the normal width of memory. For example, you can boot a 16-bit TMS320C54x from
a single 8-bit EPROM by using the –memwidth option to configure the width
of the boot table. The hex conversion utility automatically adjusts the table’s
format and length. See the boot loader example in the TMS320C54x DSP Reference Set for an illustration of a boot table.
10.9.2 The Boot Table Format
The boot table format is simple. Typically, there is a header record containing
values for various control registers. Each subsequent block has a header containing the size and destination address of the block followed by data for the
block. Multiple blocks can be entered; a termination block follows the last
block. Finally, the table can have a footer containing more control register values. See the boot loader section in the TMS320C54x DSP Reference Set for
more information.
10-28
Building a Table for an On-Chip Boot Loader
10.9.3 How to Build the Boot Table
Table 10–2 summarizes the hex conversion utility options available for the
boot loader.
Table 10–2. Boot-Loader Options
(a) Options for all C54x devices
Option
Description
–boot
Convert all sections into bootable form (use instead of a
SECTIONS directive)
–bootorg PARALLEL
Specify the source of the boot loader table as the parallel
port
–bootorg SERIAL
Specify the source of the boot loader table as the serial port
–bootorg value
Specify the source address of the boot loader table
–bootpage value
Specify the target page number of the boot loader table
–e value
Specify the entry point at which to begin execution after boot
loading. The value can be an address or a global symbol.
(b) Options for C54x LP devices only
Option
Description
–bootorg WARM
or –warm
Specify the source of the boot loader table as the table currently in memory
–bootorg COMM
Specify the source of the boot loader table as the communications port
–spc value
Set the serial port control register value
–spce value
Set the serial port control extension register value
–arr value
Set the ABU receive address register value
–bkr value
Set the ABU transmit buffer size register value
–tcsr value
Set the TDM serial port channel select register value
–trta value
Set the TDM serial port receive/transmit address register
value
–swwsr value
Set the software wait state register value for PARALLEL/
WARM boot mode
–bscr value
Set the bank-switch control register value for PARALLEL/
WARM boot mode
Hex Conversion Utility Description
10-29
Building a Table for an On-Chip Boot Loader
10.9.3.1 Building the Boot Table
To build the boot table, follow these steps:
Step 1: Link the file. Each block of the boot table data corresponds to an
initialized section in the COFF file. Uninitialized sections are not converted by the hex conversion utility (see Section 10.6, The
SECTIONS Directive, on page 10-22).
When you select a section for placement in a boot-loader table, the
hex conversion utility places the section’s load address in the destination address field for the block in the boot table. The section
content is then treated as raw data for that block.
10-30
Building a Table for an On-Chip Boot Loader
The hex conversion utility does not use the section run address.
When linking, you need not worry about the ROM address or the
construction of the boot table —the hex conversion utility handles
this.
Step 2: Identify the bootable sections. You can use the –boot option to tell
the hex conversion utility to configure all sections for boot loading.
Or, you can use a SECTIONS directive to select specific sections to
be configured (see Section 10.6, The SECTIONS Directive, on page
10-22). Note that if you use a SECTIONS directive, the –boot option
is ignored.
Step 3: Set the ROM address of the boot table. Use the –bootorg option
to set the source address of the complete table. For example, if you
are using the C54x and booting from memory location 8000h, specify
–bootorg 8000h. The address field in the the hex conversion utility
output file will then start at 8000h.
If you use –bootorg SERIAL or –bootorg PARALLEL, or if you do not
use the –bootorg option at all, the utility places the table at the origin
of the first memory range in a ROMS directive. If you do not use a
ROMS directive, the table will start at the first section load address.
There is also a –bootpage option for starting the table somewhere
other than page 0.
Step 4: Set boot-loader-specific options. Set such options as entry point
and memory control registers as needed.
Step 5: Describe your system memory configuration. See Section 10.4,
Understanding Memory Widths, on page 10-9 and Section 10.5,
The ROMS Directive, on page 10-16 for details.
10.9.3.2 Leaving Room for the Boot Table
The complete boot table is similar to a single section containing all of the
header records and data for the boot loader. The address of this “section” is
the boot table origin. As part of the normal conversion process, the hex
conversion utility converts the boot table to hexadecimal format and maps it
into the output files like any other section.
Be sure to leave room in your system memory for the boot table, especially
when you are using the ROMS directive. The boot table cannot overlap other
nonboot sections or unconfigured memory. Usually, this is not a problem; typically, a portion of memory in your system is reserved for the boot table. Simply
configure this memory as one or more ranges in the ROMS directive, and use
the –bootorg option to specify the starting address.
Hex Conversion Utility Description
10-31
Building a Table for an On-Chip Boot Loader
10.9.4 Booting From a Device Peripheral
You can choose to boot from a serial or parallel port by using the SERIAL or
PARALLEL keyword with the –bootorg option. Your selection of a keyword
depends on the target device and the channel you want to use. For example,
to boot a C54x from its serial port, specify –bootorg SERIAL on the command
line or in a command file. To boot a C54x from one of its parallel ports, specify
–bootorg PARALLEL.
Note:
On-Chip Boot Loader Concerns
- Possible memory conflicts. When you boot from a device peripheral,
the boot table is not actually in memory; it is being received through the
device peripheral. However, as explained in Step 3 on page 10-31, a
memory address is assigned.
If the table conflicts with a nonboot section, put the boot table on a
different page. Use the ROMS directive to define a range on an unused
page and the –bootpage option to place the boot table on that page. The
boot table will then appear to be at location 0 on the dummy page.
- Why the System Might Require an EPROM Format for a Peripheral
Boot Loader Address. In a typical system, a parent processor boots a
child processor through that child’s peripheral. The boot loader table
itself may occupy space in the memory map of the parent processor. The
EPROM format and ROMS directive address correspond to those used
by the parent processor, not those that are used by the child.
10.9.5 Setting the Entry Point for the Boot Table
After completing the boot load process, execution starts at the default entry
point specified by the linker and contained in the COFF file. By using the –e
option with the hex conversion utility, you can set the entry point to a different
address.
For example, if you want your program to start running at address 0123h after
loading, specify –e 0123h on the command line or in a command file. You can
determine the –e address by looking at the map file that the linker generates.
Note:
Valid Entry Points
The value can be a constant, or it can be a symbol that is externally defined
(for example, with a .global) in the assembly source.
10-32
Building a Table for an On-Chip Boot Loader
When you use the –e option, the utility builds a dummy block of length 1 and
data value 0 that loads at the specified address. Your blocks follow this dummy
block. Since the dummy block is loaded first, the dummy value of 0 is overwritten by the subsequent blocks. Then, the boot loader jumps to the –e option
address after the boot load is completed.
When using the –bootorg WARM option, the –e option sets the address of
where the boot table is loaded in ROM.
10.9.6 Using the C54x Boot Loader
This subsection explains and gives an example on using the hex conversion
utility with the boot loader for C54x devices.
The C54x boot loader has several different modes. You can select these
modes by using the –bootorg and –memwidth options:
Mode
–bootorg Setting
–memwidth Setting
8-bit parallel I/O
–bootorg PARALLEL
–memwidth 8
16-bit parallel I/O
–bootorg PARALLEL
–memwidth 16
8-bit serial RS232
–bootorg SERIAL
–memwidth 8
16-bit serial RS232
–bootorg SERIAL
–memwidth 16
8-bit parallel EPROM
–bootorg 0x8000
–memwidth 8
16-bit parallel EPROM
–bootorg 0x8000
–memwidth 16
8-bit parallel
–bootorg WARM
–memwidth 8
16-bit parallel
–bootorg WARM
–memwidth 16
8-bit I/O
–bootorg COMM
–memwidth 8
You should set the –romwidth equal to the –memwidth unless you want to have
multiple output files.
The C54x can boot through either the serial or parallel interface with either 8or 16-bit data. The format is the same for any combination: the boot table
consists of a field containing the destination address, a field containing the
length, and a block containing the data.
You can boot only one section. If you are booting from an 8-bit channel, 16-bit
words are stored in the table with the MSBs first; the hex conversion utility
automatically builds the table in the correct format.
- To boot from a serial port, specify –bootorg SERIAL when invoking the
utility. Use either –memwidth 8 or –memwidth 16.
Hex Conversion Utility Description
10-33
Building a Table for an On-Chip Boot Loader
- To load from a parallel I/O port, invoke the utility by specifying –bootorg
PARALLEL. Use either –memwidth 8 or –memwidth 16.
- To boot from external memory (EPROM), specify the source address of
the boot memory by using the –bootorg option. Use either –memwidth 8
or –memwidth 16.
For example, the command file in Figure 10–8 allows you to boot the .text
section of abc.out from a byte-wide EPROM at location 0x8000.
Figure 10–8. Sample Command File for Booting From a C54x EPROM
abc.out
–o abc.i
–i
–memwidth 8
–romwidth 8
–bootorg 0x8000
/*
/*
/*
/*
/*
/*
input file
output file
Intel format
8-bit memory
outfile is bytes, not words
external memory boot
SECTIONS { .text: BOOT }
10-34
*/
*/
*/
*/
*/
*/
Controlling the ROM Device Address
10.10 Controlling the ROM Device Address
The hex conversion utility output address field corresponds to the ROM device
address. The EPROM programmer burns the data into the location specified
by the hex conversion utility output file address field. The hex conversion utility
offers some mechanisms to control the starting address in ROM of each section and/or to control the address index used to increment the address field.
However, many EPROM programmers offer direct control of the location in
ROM in which the data is burned.
10.10.1 Controlling the Starting Address
Depending on whether or not you are using the boot loader, the hex conversion
utility output file controlling mechanisms are different.
Non-boot loader mode. The address field of the hex conversion utility output
file is controlled by the following mechanisms listed from low to high priority:
1) The linker command file. By default, the address field of the hex conversion utility output file is a function of the load address (as given in the linker
command file) and the hex conversion utility parameter values. The relationship is summarized as follows:
out_file_addr† = load_addr (data_width mem_width)
out_file_addr
is the address of the output file.
load_addr
is the linker-assigned load address.
data_width
is specified as 16 bits for the TMS320C54x devices.
See subsection 10.4.2, Data Width, on page 10-10.
mem_width
is the memory width of the memory system. You can
specify the memory width by the –memwidth option
or by the memwidth parameter inside the ROMS
directive. See subsection 10.4.3, Memory Width, on
page 10-10.
† If paddr is not specified
The value of data width divided by memory width is a correction factor for
address generation. When data width is larger than memory width, the
correction factor expands the address space. For example, if the load
address is 01 and data width divided by memory width is 2, the output file
address field would be 02. The data is split into two consecutive locations the size of the memory width.
2) The paddr parameter of the SECTIONS directive. When the paddr
parameter is specified for a section, the hex conversion utility bypasses
Hex Conversion Utility Description
10-35
Controlling the ROM Device Address
the section load address and places the section in the address specified
by paddr. The relationship between the hex conversion utility output file
address field and the paddr parameter can be summarized as follows:
out_file_addr† = paddr_val + ( load_addr – sect_beg_load_addr ) (data_width mem_width)
out_file_addr
is the address of the output file.
paddr_val
is the value supplied with the paddr parameter
inside the SECTIONS directive.
sec_beg_load_addr
is the section load address assigned by the
linker.
† If paddr is not specified
The value of data width divided by memory width is a correction factor for
address generation. The section beginning load address factor subtracted
from the load address is an offset from the beginning of the section.
3) The –zero option. When you use the –zero option, the utility resets the
address origin to 0 for each output file. Since each file starts at 0 and
counts upward, any address records represent offsets from the beginning
of the file (the address within the ROM) rather than actual target addresses
of the data.
You must use the –zero option in conjunction with the –image option to
force the starting address in each output file to be zero. If you specify the
–zero option without the –image option, the utility issues a warning and
ignores the –zero option.
Boot-Loader Mode. When the boot loader is used, the hex conversion utility
places the different COFF sections that are in the boot table into consecutive
memory locations. Each COFF section becomes a boot table block whose
destination address is equal to the linker-assigned section load address.
In a boot table, the address field of the the hex conversion utility output file is
not related to the section load addresses assigned by the linker. The address
fields of the boot table are simply offsets to the beginning of the table, multiplied by the correction factor (data width divided by memory width). The
section load addresses assigned by the linker will be encoded into the boot
table along with the size of the section and the data contained within the
section. These addresses will be used to store the data into memory during
the boot load process.
The beginning of the boot table defaults to the linked load address of the first
bootable section in the COFF input file, unless you use one of the following
mechanisms, listed here from low to high priority. Higher priority mechanisms
override the values set by low priority options in an overlapping range.
10-36
Controlling the ROM Device Address
1) The ROM origin specified in the ROMS directive. The hex conversion
utility places the boot table at the origin of the first memory range in a
ROMS directive.
2) The –bootorg option. The hex conversion utility places the boot table at
the address specified by the –bootorg option if you select boot loading
from memory.
3) The –bootorg option. The hex conversion utility places the boot table at
the address specified by the –bootorg option if you select boot loading
from memory. Neither –bootorg PARALLEL nor –bootorg SERIAL affect
the address field.
10.10.2 Controlling the Address Increment Index
By default, the hex conversion utility increments the output file address field
according to the memory width value. If memory width equals 16, the address
increments on the basis of how many 16-bit words are present in each line of
the output file.
10.10.3 The –byte Option
Some EPROM programmers may require the output file address field to
contain a byte count rather than a word count. If you use the –byte option, the
output file address increments once for each byte. For example, if the starting
address is 0h, the first line contains eight words, and you use no –byte option,
the second line would start at address 8 (8h). If the starting address is 0h, the
first line contains eight words, and you use the –byte option, the second line
would start at address 16 (010h). The data in both examples are the same;
–byte affects only the calculation of the output file address field, not the actual
target processor address of the converted data.
The –byte option causes the address records in an output file to refer to byte
locations within the file, whether the target processor is byte-addressable or
not.
10.10.4 Dealing With Address Holes
When memory width is different from data width, the automatic multiplication
of the load address by the correction factor might create holes at the beginning
of a section or between sections.
For example, assume you want to load a COFF section (.sec1) at address
0x0100 of an 8-bit EPROM. If you specify the load address in the linker comHex Conversion Utility Description
10-37
Controlling the ROM Device Address
mand file at location 0x0100, the hex conversion utility will multiply the address
by 2 (data width divided by memory width = 16/8 = 2), giving the output file a
starting address of 0x0200. Unless you control the starting address of the
EPROM with your EPROM programmer, you could create holes within the
EPROM. The programmer will burn the data starting at location 0x0200
instead of 0x0100. To solve this, you can:
- Use the paddr parameter of the SECTIONS directive. This forces a sec-
tion to start at the specified value. Figure 10–9 shows a command file that
can be used to avoid the hole at the beginning of .sec1.
Figure 10–9. Hex Command File for Avoiding a Hole at the Beginning of a Section
–i
a.out
–map a.map
ROMS
{
ROM : org = 0x0100, length = 0x200, romwidth = 8,
memwidth = 8
}
SECTIONS
{
sec1: paddr = 0x100
}
Note:
If your file contains multiple sections, and, if one section uses a paddr parameter,
then all sections must use the paddr parameter.
- Use the –bootorg option or use the ROMS origin parameter (for boot
loading only). As described on page 10-36, when you are boot loading,
the EPROM address of the entire boot-loader table can be controlled by
the –bootorg option or by the ROMS directive origin.
- For another example, see Section C.4, Example 3: Generating a Boot
Table for Non-LP Core Devices, on page C-10.
10-38
Description of the Object Formats
10.11 Description of the Object Formats
The hex conversion utility converts a COFF object file into one of five object
formats that most EPROM programmers accept as input: ASCII-Hex, Intel
MCS-86, Motorola-S, Extended Tektronix, or TI-Tagged.
Table 10–3 specifies the format options.
- If you use more than one of these options, the last one you list overrides
the others.
- The default format is Tektronix (–x option).
Table 10–3. Options for Specifying Hex Conversion Formats
Address
Bits
Default
Width
ASCII-Hex
16
8
–i
Intel
32
8
–m1
Motorola-S1
16
8
–m2 or –m
Motorola-S2
24
8
–m3
Motorola-S3
32
8
–t
TI-Tagged
16
16
–x
Tektronix
32
8
Option
Format
–a
Address bits determine how many bits of the address information the format
supports. Formats with 16-bit addresses support addresses up to 64K only.
The utility truncates target addresses to fit in the number of available bits.
The default width determines the default output width. You can change the
default width by using the –romwidth option or by using the romwidth parameter in the ROMS directive. You cannot change the default width of the TITagged format, which supports a 16-bit width only.
Hex Conversion Utility Description
10-39
Description of the Object Formats
10.11.1 ASCII-Hex Object Format (–a Option)
The ASCII-Hex object format supports 16-bit addresses. The format consists
of a byte stream with bytes separated by spaces. Figure 10–10 illustrates the
ASCII-Hex format.
Figure 10–10. ASCII-Hex Object Format
Nonprintable
start code
Address
Nonprintable
end code
^B $AXXXX,
XX XX XX XX XX XX XX XX XX XX. . .^C
Data byte
The file begins with an ASCII STX character (ctrl-B, 02h) and ends with an
ASCII ETX character (ctrl-C, 03h). Address records are indicated with
$AXXXX, in which XXXX is a 4-digit (16-bit) hexadecimal address. The
address records are present only in the following situations:
- When discontinuities occur
- When the byte stream does not begin at address 0
You can avoid all discontinuities and any address records by using the –image
and –zero options. The output created is a list of byte values.
10-40
Description of the Object Formats
10.11.2 Intel MCS-86 Object Format (–i Option)
The Intel object format supports 16-bit addresses and 32-bit extended
addresses. Intel format consists of a 9-character (4-field) prefix— which
defines the start of record, byte count, load address, and record type —the
data, and a 2-character checksum suffix.
The 9-character prefix represents three record types:
Record Type
Description
00
Data record
01
End-of-file record
04
Extended linear address record
Record type 00, the data record, begins with a colon ( : ) and is followed by the
byte count, the address of the first data byte, the record type (00), and the
checksum. Note that the address is the least significant 16 bits of a 32-bit
address; this value is concatenated with the value from the most recent 04
(extended linear address) record to create a full 32-bit address. The checksum
is the 2s complement (in binary form) of the preceding bytes in the record,
including byte count, address, and data bytes.
Record type 01, the end-of-file record, also begins with a colon ( : ), followed
by the byte count, the address, the record type (01), and the checksum.
Record type 04, the extended linear address record, specifies the upper 16
address bits. It begins with a colon ( : ), followed by the byte count, a dummy
address of 0h, the record type (04), the most significant 16 bits of the address,
and the checksum. The subsequent address fields in the data records contain
the least significant bits of the address.
Figure 10–11 illustrates the Intel hexadecimal object format.
Figure 10–11. Intel Hex Object Format
Start
character
Address
Extended linear
address record
Most significant 16 bits
:020000040001F9
:2000000000000100020003000400050006000700080009000A000B000C000D000E000F0068
:2000200010001100120013001400150016001700180019001A001B001C001D001E001F0048 Data
:2000400000000100020003000400050006000700080009000A000B000C000D000E000F0028 records
:2000600010001100120013001400150016001700180019001A001B001C001D001E001F0008
:00000001FF
Byte Record
count type
Checksum
End-of-file
record
Hex Conversion Utility Description
10-41
Description of the Object Formats
10.11.3 Motorola Exorciser Object Format (–m1, –m2, –m3 Options)
The Motorola S1, S2, and S3 formats support 16-bit, 24-bit, and 32-bit
addresses, respectively. The formats consist of a start-of-file (header) record,
data records, and an end-of-file (termination) record. Each record is made up
of five fields: record type, byte count, address, data, and checksum. The
record types are:
Record Type
Description
S0
Header record
S1
Code/data record for 16-bit addresses (S1 format)
S2
Code/data record for 24-bit addresses (S2 format)
S3
Code/data record for 32-bit addresses (S3 format)
S7
Termination record for 32-bit addresses (S3 format)
S8
Termination record for 24-bit addresses (S2 format)
S9
Termination record for 16-bit addresses (S1 format)
The byte count is the character pair count in the record, excluding the type and
byte count itself.
The checksum is the least significant byte of the 1s complement of the sum
of the values represented by the pairs of characters making up the byte count,
address, and the code/data fields.
Figure 10–12 illustrates the Motorola-S object format.
Figure 10–12. Motorola-S Format
Type
S00B00004441544120492F4FF3
S1130000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFC
S1130010FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFED
S1130020FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFDC
S1130030FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFCC
S1130040FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFBC
S9030000FC
Byte
Count
Checksum
Address
10-42
Header
Record
Data
Records
Termination
Record
Description of the Object Formats
10.11.4 Texas Instruments SDSMAC Object Format (–t Option)
The TI-Tagged object format supports 16-bit addresses. It consists of a startof-file record, data records, and end-of-file record. Each of the data records is
made up of a series of small fields and is signified by a tag character. The significant tag characters are:
Tag Character
Description
K
followed by the program identifier
7
followed by a checksum
8
followed by a dummy checksum (ignored)
9
followed by a 16-bit load address
B
followed by a data word (four characters)
F
identifies the end of a data record
*
followed by a data byte (two characters)
Figure 10–13 illustrates the tag characters and fields in TI-Tagged object
format.
Figure 10–13. TI-Tagged Object Format
Start-of-file
record
Program
identifier
Load
address
Tag characters
K000COFFTOTI90000BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7EF3DF
BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7EE37F
BFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFFBFFFF7F245F
:
End-of-file
record
Data
words
Data
records
Checksum
If any data fields appear before the first address, the first field is assigned
address 0000h. Address fields may be expressed for any data byte, but none
is required. The checksum field, which is preceded by the tag character 7, is
a 2s complement of the sum of the 8-bit ASCII values of characters, beginning
with the first tag character and ending with the checksum tag character (7 or
8). The end-of-file record is a colon ( : ).
Hex Conversion Utility Description
10-43
Description of the Object Formats
10.11.5 Extended Tektronix Object Format (–x Option)
The Tektronix object format supports 32-bit addresses and has two types of
records:
data record
contains the header field, the load address, and the
object code.
termination record signifies the end of a module.
The header field in the data record contains the following information:
Number of
ASCII
Characters
Item
Description
%
1
Data type is Tektronix format
Block length
2
Number of characters in the record, minus the %
Block type
1
6 = data record
8 = termination record
Checksum
2
A 2-digit hex sum modulo 256 of all values in the
record except the % and the checksum itself.
The load address in the data record specifies where the object code will be
located. The first digit specifies the address length; this is always 8. The
remaining characters of the data record contain the object code, two characters per byte.
Figure 10–14 illustrates the Tektronix object format.
Figure 10–14. Extended Tektronix Object Format
Checksum: 21h =
Block length
15h = 21
Header
character
1+5+6+8+1+0+0+0+0+0+0+0+
2+0+2+0+2+0+2+0+2+0+2+0
Object code: 6 bytes
%15621810000000202020202020
Load address: 10000000h
Block type: 6
(data)
10-44
Length of
load address
Hex Conversion Utility Error Messages
10.12 Hex Conversion Utility Error Messages
section mapped to reserved memory message
Description A section or a boot-loader table is mapped into a reserved
memory area listed in the processor memory map.
Action
Correct the section or boot-loader address. Refer to the
TMS320C54x DSP Reference Set for valid memory locations.
sections overlapping
Description Two or more COFF section load addresses overlap or a boot
table address overlaps another section.
Action
This problem may be caused by an incorrect translation from
load address to hex output file address that is performed by the
hex conversion utility when memory width is less than data
width. See Section 10.4, Understanding Memory Widths, on
page 10-9 and Section 10.10, Controlling the ROM Device
Address, on page 10-35.
unconfigured memory error
Description This error could have one of two causes:
Action
J
The COFF file contains a section whose load address falls
outside the memory range defined in the ROMS directive.
J
The boot-loader table address is not within the memory
range defined by the ROMS directive.
Correct the ROM range as defined by the ROMS directive to
cover the memory range as needed, or modify the section load
address or boot-loader table address. Remember that if the
ROMS directive is not used, the memory range defaults to the
entire processor address space. For this reason, removing the
ROMS directive could also be a workaround.
Hex Conversion Utility Description
10-45
Chapter 11
Mnemonic-to-Algebraic Translator Description
The TMS320C54x mnemonic-to-algebraic translator utility converts assembly
code written in the mnemonic instruction set to code written in the algebraic
instruction set.
Topic
11.1
11.2
11.3
11.4
11.5
Page
Translator Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Translator Development Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invoking the Translator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Translation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
How the Translator Works With Macros . . . . . . . . . . . . . . . . . . . . . . .
11-2
11-3
11-4
11-5
11-8
11-1
Translator Overview
11.1 Translator Overview
The TMS320C54x mnemonic-to-algebraic translator utility converts
mnemonic assembly instructions into algebraic assembly instructions.
Mnemonic instructions usually consist of a keyword and operands. Algebraic
instructions usually consist of operands and operators. Algebraic instructions
resemble higher-level programming language instructions.
The translator requires error-free code. When the translator encounters
unrecognized instructions or macro invocations, it prints a message to standard output and does not translate the line of code.
The translator accepts assembly code source files containing mnemonic
instructions and produces assembly code source files containing algebraic
instructions. The input file can have no extension or an extension of asm. The
output file will have the same name as the input file with an extension of cnv.
11.1.1 What the Translator Does
The translator accomplishes the following:
- Replaces a mnemonic with an algebraic representation of what the
instruction does as defined by the language specifications. The algebraic
representation might consist of more than one line of code.
- Reformats mnemonic instruction operands into algebraic syntax as de-
scribed in the language specifications. This reformatting includes the
following:
J
Data memory address (dma) accesses are prefixed with a @ symbol.
J
The mnemonic indirect shorthand * is replaced with *AR0.
J
When necessary, constants are prefixed with a # symbol.
J
Algebraic expressions that are used as a single operand and have
more than one term are enclosed in parentheses.
11.1.2 What the Translator Does Not Do
The translator has the following limitations:
- The translator cannot convert macro definitions. It ignores them. Optional-
ly, the translator replaces macro invocations with the expanded macro,
replacing the formal parameters with the actual arguments used at invocation.
- The translator attempts to translate any macro that has the same name
as a mnemonic instruction. Insure that macro names are different from
mnemonic instructions.
11-2
Translator Development Flow
11.2 Translator Development Flow
Figure 6–1 shows the translator’s role in the assembly language development
process. The assembler accepts mnemonic or algebraic syntax.
Figure 11–1.Translator Development Flow
C
source
files
Macro
source files
C compiler
Archiver
Assembler
source
Mnemonic-toalgebraic
translator
Macro
library
Assembler
COFF
Archiver
Assembler
source
Library-build
utility
object files
Runtimesupport library
Library of object
files
Linker
Debugging
tools
Executable
COFF file
Hex conversion
utility
EPROM
programmer
Absolute lister
Cross-reference
lister
’C54x
Mnemonic-to-Algebraic Translator Description
11-3
Invoking the Translator
11.3 Invoking the Translator
To invoke the translator, enter:
mnem2alg [option ] inputfile
mnem2alg
is the command that invokes the translator.
option
specifies the translator mode (see Section 11.4, Translation
Modes, on page 11-5). The options are:
inputfile
11-4
–t
Literal mode, which is the default if no option is specified
–e
Expansion mode
names the assembly source file you want to translate. If you
do not specify an extension, asm is assumed.
Translation Modes
11.4 Translation Modes
The translator runs in one of the following modes:
Literal
Keeps the original mnemonic instruction, commented out, followed by the translated instruction
Expansion
Expands and preprocesses macro invocations and replaces
substitution symbols
11.4.1 Literal Mode (–t Option)
When running in the default literal mode (–t option), the translator translates
instructions without any preprocessing. The translator does not process
macros, nor does it expand substitution symbols. When the translator does not
recognize a macro invocation or instruction, it prints a message to standard
output and does not translate the code. The translator creates a file with the
same name as the assembler source file and an extension of cnv.
Figure 11–2.Literal Mode Process
Command:
mnem2alg filename.asm
Translation:
Translator
Converted file:
filename.cnv
11.4.2 About Symbol Names in Literal Mode
In literal mode, the translator treats symbol names defined by .asg as labels
and not as the value they represent. In the following example, the source code
is translated as shown, with sym treated as a data memory address:
Example 11–1. Treatment of Symbol Names in Literal Mode
(a) Source code:
sym
.asg
*AR2
LD sym,B
(b) Converted code:
sym
.asg *AR2
B = @sym
Mnemonic-to-Algebraic Translator Description
11-5
Translation Modes
11.4.3 Expansion Mode (–e Option)
Expansion mode is invoked using the –e option. In expansion mode, the
translator preprocesses macros and substitution symbols and then translates
instructions. The translator invokes the assembler with a switch that preprocesses the input to expand macros and insert substitution symbols. The
assembler creates a file with an exp extension. The exp file is passed back to
the translator for processing. The translator creates a file with the same name
as the assembler source file and an extension of cnv.
Since the translator invokes the assembler in expansion mode, you must
include the assembler executable in your path. The assembler executable
version must be 1.11 or above. If the assembler encounters errors during preprocessing, the translator aborts and no output is produced.
Figure 11–3.Expansion Mode Process
Command:
Assembly with switch:
Intermediate file:
Translation:
Converted file:
menm2alg –e filename.asm
Assembler
filename.exp
Translator
filename.cnv
The following example demonstrates how expansion mode works. In the
intermediate file, the macro invocation is commented out and the expanded
macro is inserted in its place, with the actual arguments substituted in.
Although the macro definition was not translated, the resulting cnv file can be
assembled by the algebraic assembler to produce output. The assembler
does not process macro definitions (for the same reasons the translator does
not translate definitions). The exp intermediate file that the assembler produces is deleted after the translation is complete.
11-6
Translation Modes
Example 11–2. Expansion Mode
(a) Source code
file.asm
********************************
.asg *AR0,sym
mymac
.macro parm1,parm2
LD
parm1,parm2
ADD
sym,5,parm2,B
.endm
mymac sym,A
********************************
(b) Intermediate code
file.exp – after preprocessing
before translation
*********************************
.asg *AR0,sym
mymac
.macro parm1,parm2
LD
parm1,parm2
ADD
sym,5,parm2,B
.endm
;
mymac sym,A
LD
*AR0,A
ADD
*AR0,5,A,B
*********************************
(c) Converted code
file.cnv – after translation
********************************
.asg *AR0, sym
mymac
.macro parm1,parm2
LD
parm1,parm2
ADD
sym,5,parm2,B
.endm
;
mymac sym,A
A = *AR0
B = A + *AR0 << 5
********************************
Mnemonic-to-Algebraic Translator Description
11-7
How the Translator Works With Macros
11.5 How the Translator Works With Macros
This section describes how the translator works with macros. The following
subjects are discussed:
- Directives in macros
- Macro local variables
- Defining labels when invoking a macro
11.5.1 Directives in Macros
When macro invocations are expanded, directives in macro definitions are not
copied to the intermediate file. Instead, the macro is inlined, and the code is
no longer in a macro environment. The following source code preprocesses
to the intermediate code as shown:
Example 11–3. Directives in Macros
(a) Source code
mymac .macro parm1
.var temp
.eval parm1, temp
.word temp
.endm
mymac 5
(b) Intermediate code
mymac .macro parm1
.var
temp
.eval parm1,temp
.word temp
.endm
;
11-8
mymac 5
.word 5
How the Translator Works With Macros
11.5.2 Macro Local Variables
When macro local variables are encountered, they are changed so that
repeated calls to the macro do not generate identical labels. The following
source code preprocesses to the intermediate code as shown:
Example 11–4. Macro Local Variables
(a) Source code
mymac .macro
lab?
.word
.endm
parm1
parm1
mymac 4
mymac 40
mymac 400
(b) Intermediate code
mymac
lab?
.macro
.word
.endm
parm1
parm1
;
lab$1$
;
lab$2$
;
lab$3$
mymac
.word
mymac
.word
mymac
.word
4
4
40
40
400
400
The local label name is appended with $n$, where n is the number of the macro
invocation. Insure that there are no other labels that could be identical to a
generated macro local label.
Mnemonic-to-Algebraic Translator Description
11-9
How the Translator Works With Macros
11.5.3 Defining Labels When Invoking A Macro
If there is a label associated with a macro invocation, that label is not used after
expansion and translation. This is because the label is commented out with the
macro invocation. The following source code preprocesses to the intermediate
code as shown:
Figure 11–4.Defining Labels
(a) Source code:
mymac .macro
.word F403
.endm
LABEL mymac
(b) Intermediate code:
mymac .macro
.word F403
.endm
;LABEL
mymac
.word F403
LABEL is not defined when the code is assembled. Insure that label definitions
do not appear on the same line as the macro invocations. Rewrite the source
code in the example above as follows:
Figure 11–5.Rewritten Source Code
mymac .macro
.word F403
.endm
LABEL
mymac
11-10
Running Title—Attribute Reference
Appendix
AppendixAA
Common Object File Format
The compiler, assembler, and linker create object files in common object file
format (COFF). COFF is an implementation of an object file format of the same
name that was developed by AT&T for use on UNIX-based systems. This format is used because it encourages modular programming and provides more
powerful and flexible methods for managing code segments and target system
memory.
Sections
are
a
basic
COFF
concept.
Chapter
2,
Introduction to Common Object File Format, discusses COFF sections in detail. If you understand section operation, you will be able to use the assembly
language tools more efficiently.
This appendix contains technical details about COFF object file structure.
Much of this information pertains to the symbolic debugging information that
is produced by the C/C++ compiler. The purpose of this appendix is to provide
supplementary information about the internal format of COFF object files.
Topic
Page
A.1
COFF File Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A.2
File Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
A.3
Optional File Header Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
A.4
Section Header Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
A.5
Structuring Relocation Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10
A.6
Line-Number Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-12
A.7
Symbol Table Structure and Content . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
Chapter Title—Attribute Reference
A-1
COFF File Structure
A.1 COFF File Structure
The elements of a COFF object file describe the file’s sections and symbolic
debugging information. These elements are:
-
A file header
Optional header information
A table of section headers
Raw data for each initialized section
Relocation information for each initialized section
Line-number entries for each initialized section
A symbol table
A string table
The assembler and linker produce object files with the same COFF structure;
however, a program that is linked for the final time does not usually contain
relocation entries. Figure A–1 illustrates the overall object file structure.
Figure A–1. COFF File Structure
file header
optional file header
section 1 header
section headers
section n header
section 1
raw data
section n
raw data
raw data
(executable code
and initialized data)
section 1
relocation information
section n
relocation information
relocation
information
section 1
line numbers
line-number
entries
section n
line numbers
symbol table
string table
A-2
COFF File Structure
Figure A–2 shows a typical example of a COFF object file that contains the
three default sections, .text, .data, and .bss, and a named section (referred to
as <named>). By default, the tools place sections into the object file in the
following order: .text, .data, initialized named sections, .bss, and uninitialized
named sections. Although uninitialized sections have section headers, notice
that they have no raw data, relocation information, or line-number entries. This
is because the .bss and .usect directives simply reserve space for uninitialized
data; uninitialized sections contain no actual code.
Figure A–2. COFF Object File
file header
.text
section header
.data
section header
section headers
.bss
section header
<named> section
section header
.text
raw data
.data
raw data
raw data
<named> section
raw data
.text
relocation information
.data
relocation information
relocation
information
<named> section
relocation information
.text
line numbers
.data
line numbers
line-number
entries
<named> section
line numbers
symbol table
string table
Common Object File Format
A-3
COFF File Structure
A.1.1 Impact of Switching Operating Systems
The C54x COFF files are recognized by all operating system versions of the
development tools. When you switch from one operating system to another,
only the file header information in the COFF files needs to be byte swapped.
The raw data in the COFF files does not need any changes.
The C54x development tools can detect the difference in the file headers and
automatically compensate for it. This is true if using only C54x development
tools.
To tell the difference between COFF files, you can look at the magic number
in the optional file header. Bytes 0 and 1 contain the magic number. For the
SunOSt or HP-UXt operating systems, the magic number is 108h. For the
DOS operating system, the magic number is 801h.
A-4
File Header Structure
A.2 File Header Structure
The file header contains 22 bytes of information that describe the general
format of an object file. Table A–1 shows the structure of the COFF file header.
Table A–1. File Header Contents
Byte
Number Type
Description
0–1
Unsigned short integer
Version ID; indicates version of COFF file
structure
2–3
Unsigned short integer
Number of section headers
4–7
Long integer
Time and date stamp; indicates when the file
was created
8–11
Long integer
File pointer; contains the symbol table’s
starting address
12–15
Long integer
Number of entries in the symbol table
16–17
Unsigned short integer
Number of bytes in the optional header. This
field is either 0 or 28; if it is 0, then there is no
optional file header
18–19
Unsigned short integer
Flags (see Table A–2)
20–21
Unsigned short integer
Target ID; magic number indicates the file
can be executed in a TMS320C54xt
system
Table A–2 lists the flags that can appear in bytes 18 and 19 of the file header.
Any number and combination of these flags can be set at the same time (for
example, if bytes 18 and 19 are set to 0003h, F_RELFLG and F_EXEC are
both set.)
Table A–2. File Header Flags (Bytes 18 and 19)
Mnemonic
Flag
Description
F_RELFLG
0001h
Relocation information was stripped from the file.
F_EXEC
0002h
The file is relocatable (it contains no unresolved
external references).
F_LNNO
0004h
Line numbers were stripped from the file.
F_LSYMS
0008h
Local symbols were stripped from the file.
F_LITTLE
0100h
The file has the byte ordering used by C54x
devices (16 bits per word, least significant byte
first)
F_SYMMERGE
1000h
Duplicate symbols were removed.
Common Object File Format
A-5
Optional File Header Format
A.3 Optional File Header Format
The linker creates the optional file header and uses it to perform relocation at
download time. Partially linked files do not contain optional file headers.
Table A–3 illustrates the optional file header format.
Table A–3. Optional File Header Contents
Byte
Number
A-6
Type
Description
0–1
Short integer
Magic number (for SunOS or HP-UX it is
108h; for DOS it is 801h)
2–3
Short integer
Version stamp
4–7
Long integer
Size (in words) of executable code
8–11
Long integer
Size (in words) of initialized .data sections
12–15
Long integer
Size (in words) of uninitialized .bss sections
16–19
Long integer
Entry point
20–23
Long integer
Beginning address of executable code
24–27
Long integer
Beginning address of initialized data
Section Header Structure
A.4 Section Header Structure
COFF object files contain a table of section headers that define where each
section begins in the object file. Each section has its own section header. The
COFF1 and COFF2 file types contain different section header information.
Table A–4 shows the section header contents for COFF1 files. Table A–5
shows the section header contents for COFF2 files.
Table A–4. Section Header Contents for COFF1 Files
Byte
Type
Description
0–7
Character
8-character section name, padded with nulls
8–11
Long integer
Section’s physical address
12–15
Long integer
Section’s virtual address
16–19
Long integer
Section size in words
20–23
Long integer
File pointer to raw data
24–27
Long integer
File pointer to relocation entries
28–31
Long integer
File pointer to line-number entries
32–33
Unsigned short integer
Number of relocation entries
34–35
Unsigned short integer
Number of line-number entries
36–37
Unsigned short integer
Flags (see Table A–6)
38
Character
Reserved
39
Character
Memory page number
Table A–5. Section Header Contents for COFF2 Files
Byte
Type
Description
0–7
Character
8-character section name, padded with nulls
8–11
Long integer
Section’s physical address
12–15
Long integer
Section’s virtual address
16–19
Long integer
Section size in words
20–23
Long integer
File pointer to raw data
24–27
Long integer
File pointer to relocation entries
28–31
Long integer
File pointer to line-number entries
32–35
Unsigned long
Number of relocation entries
36–39
Unsigned long
Number of line-number entries
40–43
Unsigned long
Flags (see Table A–6)
44–45
Short
Reserved
46–47
Unsigned short
Memory page number
Common Object File Format
A-7
Section Header Structure
Table A–6 lists the flags that can appear in the section header. The flags can
be combined. For example, if the flag’s word is set to 024h, both
STYP_GROUP and STYP_TEXT are set.
Table A–6. Section Header Flags
Mnemonic
Flag
Description
STYP_REG
0000h
Regular section (allocated, relocated, loaded)
STYP_DSECT
0001h
Dummy section (relocated, not allocated, not loaded)
STYP_NOLOAD
0002h
Noload section (allocated, relocated, not loaded)
STYP_GROUP
0004h
Grouped section (formed from several input sections)
STYP_PAD
0008h
Padding section (loaded, not allocated, not relocated)
STYP_COPY
0010h
Copy section (relocated, loaded, but not allocated; relocation and line-number entries are processed normally)
STYP_TEXT
0020h
Section that contains executable code
STYP_DATA
0040h
Section that contains initialized data
STYP_BSS
0080h
Section that contains uninitialized data
STYP_CLINK
4000h
Section that is conditionally linked
Note:
The term loaded means that the raw data for this section appears in the object file.
The flags are in:
A-8
Bytes
For This COFF Format
36 and 37
COFF1
40 to 43
COFF2
Section Header Structure
Figure A–3 illustrates how the pointers in a section header would point to the
elements in an object file that are associated with the .text section.
Figure A–3. Section Header Pointers for the .text Section
.text
Section
Header
0–7
.text
8–11
12–15 16–19 20–23 24–27
•
•
28–31 32–33
34–35 36–37
38
39
•
.text
raw data
.text
relocation information
.text
line-number entries
As Figure A–2 on page A-3 shows, uninitialized sections (created with the
.bss and .usect directives) vary from this format. Although uninitialized
sections have section headers, they have no raw data, relocation information,
or line-number information. They occupy no actual space in the object file.
Therefore, the number of relocation entries, the number of line-number entries, and the file pointers are 0 for an uninitialized section. The header of an
uninitialized section simply tells the linker how much space for variables it
should reserve in the memory map.
Common Object File Format
A-9
Structuring Relocation Information
A.5 Structuring Relocation Information
A COFF object file has one relocation entry for each relocatable reference.
The assembler automatically generates relocation entries. The linker reads
the relocation entries as it reads each input section and performs relocation.
The relocation entries determine how references within each input section are
treated.
COFF file relocation information entries use the 12-byte format shown in
Table A–7.
Table A–7. Relocation Entry Contents
Byte
Number
Type
Description
0–3
Long integer
Virtual address of the reference
4–7
Unsigned long integer
Symbol table index
8–9
Unsigned short integer
For COFF1 files: Reserved
For COFF2 files: Additional byte used for
extended address calculations
10–11
Unsigned short integer
Relocation type (see Table A–8)
The virtual address is the symbol’s address in the current section before relocation; it specifies where a relocation must occur. (This is the address of the
field in the object code that must be patched.)
Following is an example of code that generates a relocation entry:
2
3
0000
0001
FF80
0000!
.global
B
X
X
In this example, the virtual address of the relocatable field is 0001.
The symbol table index is the index of the referenced symbol. In the
preceding example, this field would contain the index of X in the symbol table.
The amount of the relocation is the difference between the symbol’s current
address in the section and its assembly-time address. The relocatable field
must be relocated by the same amount as the referenced symbol. In the
example, X has a value of 0 before relocation. Suppose X is relocated to
address 2000h. This is the relocation amount (2000h – 0 = 2000h), so the
relocation field at address 1 is patched by adding 2000h to it.
You can determine a symbol’s relocated address if you know which section it
is defined in. For example, if X is defined in .data and .data is relocated by
2000h, X is relocated by 2000h.
A-10
Structuring Relocation Information
If the symbol table index in a relocation entry is –1 (0FFFFh), this is called an
internal relocation. In this case, the relocation amount is simply the amount by
which the current section is being relocated.
The relocation type specifies the size of the field to be patched and describes
how to calculate the patched value. The type field depends on the addressing
mode that was used to generate the relocatable reference. In the preceding
example, the actual address of the referenced symbol (X) will be placed in a
16-bit field in the object code. This is a 16-bit direct relocation, so the relocation
type is R_RELWORD. Table A–8 lists the relocation types.
Table A–8. Relocation Types (Bytes 8 and 9)
Mnemonic
Flag
Relocation Type
R_ABS
0000h
No relocation
R_REL24
0005h
24-bit direct reference to symbol’s address
R_RELBYTE
0017h
8-bit direct reference to symbol’s address
R_REL13
002Ah
13-bit direct reference
R_RELWORD
0020h
16-bit direct reference to symbol’s address
R_RELLONG
0021h
32-bit direct reference to symbol’s address
R_PARTLS7
0028h
7 LSBs of an address
R_PARTMS9
0029h
9 MSBs of an address
Common Object File Format
A-11
Line-Number Table Structure
A.6 Line-Number Table Structure
The object file contains a table of line-number entries that are useful for
symbolic debugging. When the C/C++ compiler produces several lines of
assembly language code, it creates a line-number entry that maps these lines
back to the original line of C/C++ source code that generated them. Each single line-number entry contains 6 bytes of information. Table A–9 shows the format of a line-number entry.
Table A–9. Line-Number Entry Format
Byte
Number Type
0–3
Long integer
Description
This entry may have one of two values:
1) If it is the first entry in a block of line-number entries,
it points to a symbol entry in the symbol table.
2) If it is not the first entry in a block, it is the physical address of the line indicated by bytes 4–5.
4–5
Unsigned
short integer
This entry may have one of two values:
1) If this field is 0, this is the first line of a function entry.
2) If this field is not 0, this is the line number of a line in
C/C++ source code.
Figure A–4 shows how line-number entries are grouped into blocks.
Figure A–4. Line-Number Blocks
Symbol Index 1
0
physical address
line number
physical address
line number
Symbol Index n
0
physical address
line number
physical address
line number
As Figure A–4 shows, each entry is divided as follows:
- For the first line of a function, bytes 0–3 point to the name of a symbol or
a function in the symbol table, and bytes 4–5 contain a 0, which indicates
the beginning of a block.
A-12
Line-Number Table Structure
- For the remaining lines in a function, bytes 0 –3 show the physical address
(the number of words created by a line of C/C++ source) and bytes 4 –5
show the address of the original C/C++ source, relative to its appearance
in the C/C++ source program.
The line-number entry table can contain many of these blocks.
Figure A–5 illustrates line-number entries for a function named XYZ. As
shown, the function name is entered as a symbol in the symbol table. The first
portion on XYZ’s block of line-number entries points to the function name in
the symbol table. Assume that the original function in the C/C++ source contained three lines of code. The first line of code produces 4 words of assembly
language code, the second line produces 3 words, and the third line produces
10 words.
Figure A–5. Line-Number Entries
•
0
4
7
XYZ
•
0
1
2
3
line-number
entries
symbol table
(Note that the symbol table entry for XYZ has a field that points back to the
beginning of the line-number block.)
Because line numbers are not often needed, the linker provides an option (–s)
that strips line-number information from the object file; this provides a more
compact object module.
Common Object File Format
A-13
Symbol Table Structure and Content
A.7 Symbol Table Structure and Content
The order of symbols in the symbol table is very important; they appear in the
sequence shown in Figure A–6.
Figure A–6. Symbol Table Contents
filename 1
function 1
local symbols
for function 1
function 2
local symbols for
function 2
filename 2
function 1
local symbols
for function 1
static variables
defined global symbols
undefined global symbols
Static variables refer to symbols defined in C/C++ that have storage class
static outside any function. If you have several modules that use symbols with
the same name, making them static confines the scope of each symbol to the
module that defines it (this eliminates multiple-definition conflicts).
A-14
Symbol Table Structure and Content
The entry for each symbol in the symbol table contains the symbol’s:
-
Name (or a pointer into the string table)
Type
Value
Section it was defined in
Storage class
Basic type (integer, character, etc.)
Derived type (array, structure, etc.)
Dimensions
Line number of the source code that defined the symbol
Section names are also defined in the symbol table.
All symbol entries, regardless of class and type, have the same format in the
symbol table. Each symbol table entry contains the 18 bytes of information
listed in Table A–10. Each symbol may also have an 18-byte auxiliary entry;
the special symbols listed in Table A–11 on page A-16 always have an auxiliary
entry. Some symbols may not have all the characteristics listed above; if a particular field is not set, it is set to null.
Table A–10. Symbol Table Entry Contents
Byte
Number
0–7
Type
Description
Character
This field contains one of the following:
1) An 8-character symbol name, padded with nulls
2) A pointer into the string table if the symbol name
is longer than 8 characters
8–11
Long integer
Symbol value; storage class dependent
12–13
Short integer
Section number of the symbol
14–15
Unsigned short
integer
Basic and derived type specification
16
Character
Storage class of the symbol
17
Character
Number of auxiliary entries (always 0 or 1)
Common Object File Format
A-15
Symbol Table Structure and Content
A.7.1 Special Symbols
The symbol table contains some special symbols that are generated by the
compiler, assembler, and linker. Each special symbol contains ordinary
symbol table information as well as an auxiliary entry. Table A–11 lists these
symbols.
Table A–11. Special Symbols in the Symbol Table
Symbol
Description
.file
File name
.text
Address of the .text section
.data
Address of the .data section
.bss
Address of the .bss section
.bb
Address of the beginning of a block
.eb
Address of the end of a block
.bf
Address of the beginning of a function
.ef
Address of the end of a function
.target
Pointer to a structure or union that is returned by a function
.n fake
Dummy tag name for a structure, union, or enumeration
.eos
End of a structure, union, or enumeration
etext
Next available address after the end of the .text output section
edata
Next available address after the end of the .data output section
end
Next available address after the end of the .bss output section
Several of these symbols appear in pairs:
- .bb/.eb indicate the beginning and end of a block.
- .bf/.ef indicate the beginning and end of a function.
- n fake/.eos name and define the limits of structures, unions, and enumera-
tions that were not named. The .eos symbol is also paired with named
structures, unions, and enumerations.
When a structure, union, or enumeration has no tag name, the compiler
assigns it a name so that it can be entered into the symbol table. These names
are of the form nfake, where n is an integer. The compiler begins numbering
these symbol names at 0.
A-16
Symbol Table Structure and Content
A.7.1.1 Symbols and Blocks
In C, a block is a compound statement that begins and ends with braces. A
block always contains symbols. The symbol definitions for any particular block
are grouped together in the symbol table and are delineated by the .bb/.eb
special symbols. Blocks can be nested in C, and their symbol table entries can
be nested correspondingly. Figure A–7 shows how block symbols are grouped
in the symbol table.
Figure A–7. Symbols for Blocks
Symbol Table
Block 1:
.bb
symbols for
block 1
.eb
Block 2:
.bb
symbols for
block 2
.eb
A.7.1.2 Symbols and Functions
The symbol definitions for a function appear in the symbol table as a group,
delineated by .bf/.ef special symbols. The symbol table entry for the function
name precedes the .bf special symbol. Figure A–8 shows the format of symbol
table entries for a function.
Figure A–8. Symbols for Functions
function name
.bf
symbols for
the function
.ef
If a function returns a structure or union, a symbol table entry for the special
symbol .target will appear between the entries for the function name and the
.bf special symbol.
Common Object File Format
A-17
Symbol Table Structure and Content
A.7.2 Symbol Name Format
The first eight bytes of a symbol table entry (bytes 0–7) indicate a symbol’s
name:
- If the symbol name is eight characters or less, this field has type character.
The name is padded with nulls (if necessary) and stored in bytes 0–7.
- If the symbol name is greater than 8 characters, this field is treated as two
long integers. The entire symbol name is stored in the string table. Bytes
0–3 contain 0, and bytes 4–7 are an offset into the string table.
A.7.3 String Table Structure
Symbol names that are longer than eight characters are stored in the string
table. The field in the symbol table entry that would normally contain the symbol’s name contains, instead, a pointer to the symbol’s name in the string table.
Names are stored contiguously in the string table, delimited by a null byte. The
first four bytes of the string table contain the size of the string table in bytes;
thus, offsets into the string table are greater than or equal to four.
Figure A–9 is a string table that contains two symbol names, Adaptive-Filter
and Fourier-Transform. The index in the string table is 4 for Adaptive-Filter and
20 for Fourier-Transform.
Figure A–9. String Table
38
‘A’
A-18
‘d’
‘a’
‘p’
‘e’
‘t’
‘i’
‘v’
‘-’
‘F’
‘i’
‘l’
‘t’
‘e’
‘r’
‘\0’
‘F’
‘o’
‘u’
‘r’
‘i’
‘e’
‘r’
‘-’
‘T’
‘r’
‘a’
‘n’
‘s’
‘f’
‘o’
‘r’
‘m’
‘\0’
Symbol Table Structure and Content
A.7.4 Storage Classes
Byte 16 of the symbol table entry indicates the storage class of the symbol.
Storage classes refer to the method in which the C/C++ compiler accesses a
symbol. Table A–12 lists valid storage classes.
Table A–12. Symbol Storage Classes
Mnemonic
Value
Storage Class
Mnemonic
Value
Storage Class
C_NULL
0
No storage class
C_UNTAG
12
Union tag
C_AUTO
1
Automatic variable
C_TPDEF
13
Type definition
C_EXT
2
External symbol
C_USTATIC
14
Uninitialized static
C_STAT
3
Static
C_ENTAG
15
Enumeration tag
C_REG
4
Register variable
C_MOE
16
Member of an enumeration
C_EXTREF
5
External definition
C_REGPARM
17
Register parameter
C_LABEL
6
Label
C_FIELD
18
Bit field
C_ULABEL
7
Undefined label
C_BLOCK
100
Beginning or end of a block;
used only for the .bb and .eb
special symbols
C_MOS
8
Member of a structure
C_FCN
101
Beginning or end of a function; used only for the .bf and
.ef special symbols
C_ARG
9
Function argument
C_EOS
102
End of structure; used only
for the .eos special symbol
C_STRTAG
10
Structure tag
C_FILE
103
Filename; used only for the
.file special symbol
C_MOU
11
Member of a union
C_LINE
104
Used only by utility programs
Some special symbols are restricted to certain storage classes. Table A–13
lists these symbols and their storage classes.
Common Object File Format
A-19
Symbol Table Structure and Content
Table A–13. Special Symbols and Their Storage Classes
Special
Symbol
Restricted to This
Storage Class
Special
Symbol
Restricted to This
Storage Class
.file
C_FILE
.eos
C_EOS
.bb
C_BLOCK
.text
C_STAT
.eb
C_BLOCK
.data
C_STAT
.bf
C_FCN
.bss
C_STAT
.ef
C_FCN
A.7.5 Symbol Values
Bytes 8–11 of a symbol table entry indicate a symbol’s value. A symbol’s value
depends on the symbol’s storage class; Table A–14 summarizes the storage
classes and related values.
Table A–14. Symbol Values and Storage Classes
Storage Class Value Description
Storage Class Value Description
C_AUTO
Stack offset in bits
C_UNTAG
0
C_EXT
Relocatable address
C_TPDEF
0
C_STAT
Relocatable address
C_ENTAG
0
C_REG
Register number
C_MOE
Enumeration value
C_LABEL
Relocatable address
C_REGPARM
Register number
C_MOS
Offset in bits
C_FIELD
Bit displacement
C_ARG
Stack offset in bits
C_BLOCK
Relocatable address
C_STRTAG
0
C_FCN
Relocatable address
C_MOU
Offset in bits
C_FILE
0
If a symbol’s storage class is C_FILE, the symbol’s value is a pointer to the next
.file symbol. Thus, the .file symbols form a one-way linked list in the symbol
table. When there are no more .file symbols, the final .file symbol points back
to the first .file symbol in the symbol table.
The value of a relocatable symbol is its virtual address. When the linker
relocates a section, the value of a relocatable symbol changes accordingly.
A-20
Symbol Table Structure and Content
A.7.6 Section Number
Bytes 12–13 of a symbol table entry contain a number that indicates which
section the symbol was defined in. Table A–15 lists these numbers and the
sections they indicate.
Table A–15. Section Numbers
Mnemonic
Section
Number
N_DEBUG
–2
Special symbolic debugging symbol
N_ABS
–1
Absolute symbol
N_UNDEF
0
Undefined external symbol
N_SCNUM
1
.text section (typical)
N_SCNUM
2
.data section (typical)
N_SCNUM
3
.bss section (typical)
N_SCNUM
4 –32,767
Description
Section number of a named section, in the order in
which the named sections are encountered
If there were no .text, .data, or .bss sections, the numbering of named sections
would begin with 1.
If a symbol has a section number of 0, –1, or –2, it is not defined in a section.
A section number of –2 indicates a symbolic debugging symbol, which
includes structure, union, and enumeration tag names; type definitions; and
the filename. A section number of –1 indicates that the symbol has a value but
is not relocatable. A section number of 0 indicates a relocatable external
symbol that is not defined in the current file.
A.7.7 Type Entry
Bytes 14–15 of the symbol table entry define the symbol’s type. Each symbol
has one basic type and one to six derived types.
Following is the format for this 16-bit type entry:
Size
(in bits):
Derived
Type
6
Derived
Type
5
Derived
Type
4
Derived
Type
3
Derived
Type
2
Derived
Type
1
Basic
Type
2
2
2
2
2
2
4
Bits 0–3 of the type field indicate the basic type. Table A–16 lists valid basic
types.
Common Object File Format
A-21
Symbol Table Structure and Content
Table A–16. Basic Types
Mnemonic
Value
Type
T_NULL
0
Type not assigned
T_CHAR
2
Character
T_SHORT
3
Short integer
T_INT
4
Integer
T_LONG
5
Long integer
T_FLOAT
6
Floating point
T_DOUBLE
7
Double word
T_STRUCT
8
Structure
T_UNION
9
Union
T_ENUM
10
Enumeration
T_MOE
11
Member of an enumeration
T_UCHAR
12
Unsigned character
T_USHORT
13
Unsigned short integer
Bits 4–15 of the type field are arranged as six 2-bit fields that can indicate one
to six derived types. Table A–17 lists the possible derived types.
Table A–17. Derived Types
Mnemonic
Value
Type
DT_NON
0
No derived type
DT_PTR
1
Pointer
DT_FCN
2
Function
DT_ARY
3
Array
An example of a symbol with several derived types would be a symbol with a
type entry of 00000000110100112. This entry indicates that the symbol is an
array of pointers to short integers.
A-22
Symbol Table Structure and Content
A.7.8 Auxiliary Entries
Each symbol table entry may have one or no auxiliary entry. An auxiliary symbol table entry contains the same number of bytes as a symbol table entry (18),
but the format of an auxiliary entry depends on the symbol’s type and storage
class. Table A–18 summarizes these relationships.
Table A–18. Auxiliary Symbol Table Entries Format
Type Entry
Name
Storage
Class
Derived
Type 1
Basic
Type
Auxiliary Entry Format
.file
C_FILE
DT_NON
T_NULL
Filename (see Table A–19)
.text, .data, .bss
C_STAT
DT_NON
T_NULL
Section (see Table A–20)
tagname
C_STRTAG
C_UNTAG
C_ENTAG
DT_NON
T_NULL
Tag name (see Table A–21)
.eos
C_EOS
DT_NON
T_NULL
End of structure (see Table A–22)
fcname
C_EXT
C_STAT
DT_FCN
(See note 1)
Function (see Table A–23)
arrname
(See note 2)
DT_ARY
(See note 1)
Array (see Table A–24)
.bb, .eb
C_BLOCK
DT_NON
T_VOID
Beginning and end of a block (see
Table A–25 and Table A–26)
.bf, .ef
C_FCN
DT_NON
T_VOID
Beginning and end of a function (see
Table A–25 and Table A–26)
Name related to a
structure, union, or
enumeration
(See note 2)
DT_PTR
DT_ARR
DT_NON
T_STRUCT
T_UNION
T_ENUM
Name related to a structure, union, or
enumeration (see Table A–27)
Notes:
1) Any type except T_MOE
2) C_AUTO, C_STAT, C_MOS, C_MOU, C_TPDEF
In Table A–18, tagname refers to any symbol name (including the special
symbol nfake). Fcname and arrname refer to any symbol name.
A symbol that satisfies more than one condition in Table A–18 should have a
union format in its auxiliary entry. A symbol that satisfies none of these conditions should not have an auxiliary entry.
Common Object File Format
A-23
Symbol Table Structure and Content
A.7.8.1 Filenames
Each of the auxiliary table entries for a filename contains a 14-character filename in bytes 0–13. Bytes 14–17 are unused.
Table A–19. Filename Format for Auxiliary Table Entries
Byte
Number
Type
0–13
Character
14–17
—
Description
File name
Unused
A.7.8.2 Sections
Table A–20 illustrates the format of auxiliary table entries.
Table A–20. Section Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–6
Unsigned short integer
Number of relocation entries
7–8
Unsigned short integer
Number of line-number entries
9–17
—
Description
Section length
Not used (zero filled)
A.7.8.3 Tag Names
Table A–21 illustrates the format of auxiliary table entries for tag names.
Table A–21. Tag Name Format for Auxiliary Table Entries
A-24
Byte
Number
Type
0–5
—
6–7
Unsigned short integer
8–11
—
12–15
Long integer
16–17
—
Description
Unused (zero filled)
Size of structure, union, or enumeration
Unused (zero filled)
Index of next entry beyond this function
Unused (zero filled)
Symbol Table Structure and Content
A.7.8.4 End of Structure
Table A–22 illustrates the format of auxiliary table entries for ends of
structures.
Table A–22. End-of-Structure Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–5
—
6–7
Unsigned short integer
8–17
—
Description
Tag index
Unused (zero filled)
Size of structure, union, or enumeration
Unused (zero filled)
A.7.8.5 Functions
Table A–23 illustrates the format of auxiliary table entries for functions.
Table A–23. Function Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
Tag index
4–7
Long integer
Size of function (in bits)
8–11
Long integer
File pointer to line number
12–15
Long integer
Index of next entry beyond this function
16–17
—
Description
Unused (zero filled)
Common Object File Format
A-25
Symbol Table Structure and Content
A.7.8.6 Arrays
Table A–24 illustrates the format of auxiliary table entries for arrays. Note that
multi-dimensional arrays are limited to 4 dimensions. This limitation can be
avoided by using DWARF format (compile with the –gw shell option).
Table A–24. Array Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–5
Unsigned short integer
line-number declaration
6–7
Unsigned short integer
Size of array
8–9
Unsigned short integer
First dimension
10–11
Unsigned short integer
Second dimension
12–13
Unsigned short integer
Third dimension
14–15
Unsigned short integer
Fourth dimension
16–17
—
Description
Tag index
Unused (zero filled)
A.7.8.7 End of Blocks and Functions
Table A–25 illustrates the format of auxiliary table entries for the ends of blocks
and functions.
Table A–25. End-of-Blocks/Functions Format for Auxiliary Table Entries
A-26
Byte
Number
Type
0–3
—
4–5
Unsigned short integer
6–17
—
Description
Unused (zero filled)
C source line number
Unused (zero filled)
Symbol Table Structure and Content
A.7.8.8 Beginning of Blocks and Functions
Table A–26 illustrates the format of auxiliary table entries for the beginnings
of blocks and functions.
Table A–26. Beginning-of-Blocks/Functions Format for Auxiliary Table Entries
Byte
Number
Type
0–3
—
4–5
Unsigned short integer
6–11
—
12–15
Long integer
16–17
—
Description
Unused (zero filled)
C source line number
Unused (zero filled)
Index of next entry past this block
Unused (zero filled)
A.7.8.9 Names Related to Structures, Unions, and Enumerations
Table A–27 illustrates the format of auxiliary table entries for the names of
structures, unions, and enumerations.
Table A–27. Structure, Union, and Enumeration Names Format for Auxiliary Table Entries
Byte
Number
Type
0–3
Long integer
4–5
—
6–7
Unsigned short integer
8–17
—
Unused (zero filled)
16–17
—
Unused (zero filled)
Description
Tag index
Unused (zero filled)
Size of the structure, union, or enumeration
Common Object File Format
A-27
Running Title—Attribute Reference
Appendix
AppendixBA
Symbolic Debugging Directives
The TMS320C54xt assembler supports several directives that the
TMS320C54x C/C++ compiler uses for symbolic debugging:
- The .sym directive defines a global variable, a local variable, or a function.
Several parameters allow you to associate various debugging information
with the symbol or function.
- The .stag, .etag, and .utag directives define structures, enumerations,
and unions, respectively. The .member directive specifies a member of a
structure, enumeration, or union. The .eos directive ends a structure, enumeration, or union definition.
- The .func and .endfunc directives specify the beginning and ending lines
of a C/C++ function.
- The .block and .endblock directives specify the bounds of C/C++ blocks.
- The .file directive defines a symbol in the symbol table that identifies the
current source file name.
- The .line directive identifies the line number of a C/C++ source statement.
These symbolic debugging directives are not usually listed in the assembly
language file that the compiler creates. If you want them to be listed, invoke
the compiler shell with the –g option, as shown below:
cl500 –g input file
This appendix contains an alphabetical directory of the symbolic debugging
directives. With the exception of the .file directive, each directive contains an
example of C/C++ source and the resulting assembly language code.
Chapter Title—Attribute Reference
B-1
.block/.endblock
Define a Block
Syntax
.block beginning line number
.endblock ending line number
Description
The .block and .endblock directives specify the beginning and end of a
C/C++ block. The line numbers are optional; they specify the location in the
source file where the block is defined.
Block definitions can be nested. The assembler will detect improper block
nesting.
Example
Following is an example of C source that defines a block, and the resulting
assembly language code.
C source:
.
.
.
{
/*
Beginning of a block */
/*
End of a block
int a,b;
a = b;
}
.
.
.
Resulting assembly language code:
.block 8
.sym
_a,2,4,1,16
.sym
_b,3,4,1,16
.line 9
LD
*SP(3),A
STL
A,*SP(2)
.endblock
10
B-2
; cycle 3
; cycle 4
*/
Supply a File Identifier
.file
Syntax
.file ”filename”
Description
The .file directive allows a debugger to map locations in memory back to lines
in a C/C++ source file. The filename is the name of the file that contains the
original C/C++ source program. The first 14 characters of the filename are significant.
You can also use the .file directive in assembly code to provide a name in the
file and improve program readability.
Example
In the following example, the filename text.c contained the C source that produced this directive.
.file
”text.c”
Symbolic Debugging Directives
B-3
.func/.endfunc
Define a Function
Syntax
.func beginning line number
.endfunc ending line number
Description
The .func and .endfunc directives specify the beginning and end of a C/C++
function. The line numbers are optional; they specify the location in the source
file where the function is defined. Function definitions cannot be nested.
Example
Following is an example of C source that defines a function, and the resulting
assembly language code:
C source:
power(x, n) /* Beginning of a function */
int x,n;
{
int i, p;
p = 1;
for (i = 1; i <= n; ++i)
p = p * x;
return p;
/* End of function */
}
B-4
Define a Function
.func/.endfunc
Resulting assembly language code:
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
.global _power
.sym
_power,_power,36,2,0
.func
3
000000
000000
000001
000002
000003
000004
28
29 000005
000006
30 000007
31 000008
32 000009
33 00000a
34 00000b
00000c
35
36 00000d
37
38 00000d
39 00000e
40 00000f
41
42 000010
000011
43 000012
44 000013
45 000014
46 000015
47 000016
000017
48
49 000018
50
51 000018
52
53 000019
54 00001a
55
56
;***************************************************************
;* FUNCTION DEF: _power
*
;***************************************************************
_power:
eefd
FRAME
#–3
f495
nop
;* A
assigned to _x
.sym
_x,0,4,17,16
.sym
_n,4,4,9,16
.sym
_x,0,4,1,16
.sym
_i,1,4,1,16
.sym
_p,2,4,1,16
.line
3
8000
STL
A,*SP(0)
.line
5
7602
ST
#1,*SP(2)
0001
.line
6
7601
ST #1,*SP(1)
0001
f7b8
SSBX SXM
f495
nop
1004
LD *SP(4),A
0801
SUB *SP(1),A
f843
BC L3,ALT
0018’
; branch occurs
L2:
.line
7
4400
LD *SP(0),16,A
3102
MPYA *SP(2)
8102
STL B,*SP(2)
.line
6
6b01
ADDM #1,*SP(1)
0001
f7b8
SSBX SXM
f495
nop
1004
LD *SP(4),A
0801
SUB *SP(1),A
f842
BC L2,AGEQ
000d’
; branch occurs
L3:
.line 8
1002
LD *SP(2),A
.line 9
ee03
FRAME #3
fc00
RET
; return occurs
.endfunc
9,000000000h, 3
Symbolic Debugging Directives
B-5
.line
Create a Line Number Entry
Syntax
.line line number [, address]
Description
The .line directive creates a line number entry in the object file. Line number
entries are used in symbolic debugging to associate addresses in the object
code with the lines in the source code that generated them.
The .line directive has two operands:
- The line number indicates the line of the C/C++ source that generated a
portion of code. Line numbers are relative to the beginning of the current
function. This is a required parameter.
- The address is an expression that is the address associated with the line
number. This is an optional parameter; if you don’t specify an address, the
assembler will use the current SPC value.
Example
The .line directive is followed by the assembly language source statements
that are generated by the indicated line of C source. For example, assume that
the lines of C source below are line 4 and 5 in the original C source; line 5
produces the assembly language source statements that are shown below.
C source:
for (i = 1; i <= n; ++i)
p = p * x;
Resulting assembly language code:
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
B-6
.line
LD
MPYA
STL
.line
ADDM
00000d 4400
00000e 3102
00000f 8102
000010
000011
000012
000013
000014
000015
000016
000017
6b01
0001
f7b8
f495
1004
0801
f842
000d’
SSBX
nop
LD
SUB
BC
7
*SP(0),16,A
*SP(2)
B,*SP(2)
; cycle 1
; cycle 2
; cycle 3
#1,*SP(1)
; cycle 4
SXM
; cycle 6
*SP(4),A
*SP(1),A
L2,AGEQ
; cycle 8
; cycle 9
; cycle 10
6
; branch occurs
000018
000018 1002
000019 ee03
00001a fc00
; cycle 15
L3:
.line
8
LD
*SP(2),A
.line
9
FRAME
#3
; cycle 1
RET
; cycle 2
; branch occurs
; cycle 7
.endfunc
9,000000000h,3
Define a Member
.member
Syntax
.member name, value [, type, storage class, size, tag, dims]
Description
The .member directive defines a member of a structure, union, or enumeration. It is valid only when it appears in a structure, union, or enumeration definition.
- Name is the name of the member that is put in the symbol table. The first
32 characters of the name are significant.
- Value is the value associated with the member. Any legal expression
(absolute or relocatable) is acceptable.
- Type is the C/C++ type of the member. Appendix A, Common Object File
Format, contains more information about C/C++ types.
- Storage class is the C/C++ storage class of the member. Appendix A,
Common Object File Format, contains more information about C/C++
storage classes.
- Size is the number of bits of memory required to contain this member.
- Tag is the name of the type (if any) or structure of which this member is a
type. This name must have been previously declared by a .stag, .etag, or
.utag directive.
- Dims may be one to four expressions separated by commas. This allows
up to four dimensions to be specified for the member.
The order of parameters is significant. The name and value are required
parameters. All other parameters may be omitted or empty. (Adjacent commas
indicate an empty entry.) This allows you to skip a parameter and specify a
parameter that occurs later in the list. Operands that are omitted or empty
assume a null value.
Example
Following is an example of a C structure definition and the corresponding assembly language statements:
C source:
struct doc {
char title;
char group;
int
job_number;
} doc_info;
Resulting assembly language code:
.stag
.member
.member
.member
.eos
_doc,48
_title,0,2,8,16
_group,16,2,8,16
_job_number,32,4,8,16
Symbolic Debugging Directives
B-7
.stag/.etag/.utag/.eos
Define a Structure
Syntax
.stag name [, size]
member definitions
.eos
.etag name [, size]
member definitions
.eos
.utag name [, size]
member definitions
.eos
Description
The .stag directive begins a structure definition. The .etag directive begins an
enumeration definition. The .utag directive begins a union definition. The .eos
directive ends a structure, enumeration, or union definition.
- Name is the name of the structure, enumeration, or union. The first 32
characters of the name are significant. This is a required parameter.
- Size is the number of bits the structure, enumeration, or union occupies
in memory. This is an optional parameter; if omitted, the size is unspecified.
The .stag, .etag, or .utag directive should be followed by a number of .member
directives, which define members in the structure. The .member directive is
the only directive that can appear inside a structure, enumeration, or union
definition.
The assembler does not allow nested structures, enumerations, or unions.
The C/C++ compiler unwinds nested structures by defining them separately
and then referencing them from the structure they are referenced in.
Example 1
Following is an example of a structure definition.
C source:
struct doc
{
char title;
char group;
int
job_number;
} doc_info;
Resulting assembly language code:
.stag
.member
.member
.member
.eos
B-8
_doc,48
_title,0,2,8,16
_group,16,2,8,16
_job_number,32,4,8,16
Define a Structure
Example 2
.stag/.etag/.utag/.eos
Following is an example of a union definition.
C source:
union u_tag
int
float
char
} valu;
{
val1;
val2;
valc;
Resulting assembly language code:
.utag
.member
.member
.member
.eos
Example 3
_u_tag,32
_val1,0,4,11,16
_val2,0,6,11,32
_valc,0,2,11,16
Following is an example of an enumeration definition.
C Source:
{
enum o_ty { reg_1, reg_2, result } optypes;
}
Resulting assembly language code:
.etag
.member
.member
.member
.eos
_o_ty,16
_reg_1,0,4,16,16
_reg_2,1,4,16,16
_result,2,4,16,16
Symbolic Debugging Directives
B-9
.sym Define a Symbol
Syntax
.sym name, value [, type, storage class, size, tag, dims]
Description
The .sym directive specifies symbolic debug information about a global variable, local variable, or a function.
- Name is the name of the variable that is put in the object symbol table. The
first 32 characters of the name are significant.
- Value is the value associated with the variable. Any legal expression
(absolute or relocatable) is acceptable.
- Type is the C/C++ type of the variable. Appendix A, Common Object File
Format, contains more information about C/C++ types.
- Storage class is the C/C++ storage class of the variable. Appendix A,
Common Object File Format, contains more information about C/C++
storage classes.
- Size is the number of bits of memory required to contain this variable.
- Tag is the name of the type (if any) or structure of which this variable is a
type. This name must have been previously declared by a .stag, .etag, or
.utag directive.
- Dims may be up to four expressions separated by commas. This allows
up to four dimensions to be specified for the variable.
The order of parameters is significant. The name and value are required
parameters. All other parameters may be omitted or empty (adjacent commas
indicate an empty entry). This allows you to skip a parameter and specify a
parameter that occurs later in the list. Operands that are omitted or empty
assume a null value.
Example
These lines of C source produce the .sym directives shown below:
C source:
struct s { int member1, member2; } str;
int
ext;
int
array[5][10];
long *ptr;
int
strcmp();
main(arg1,arg2)
int
arg1;
char *arg2;
{
register r1;
}
B-10
Define a Symbol
.sym
Resulting assembly language code:
.global
.bss
.sym
.global
.bss
.sym
.global
.bss
.sym
.global
.bss
.sym
_array
_array,50,0,0
_array,_array,244,2,800,,5,10
_ptr
_ptr,1,0,0
_ptr,_ptr,21,2,16
_str
_str,2,0,0
_str,_str,8,2,32,_s
_ext
_ext,1,0,0
_ext,_ext,4,2,16
Symbolic Debugging Directives
B-11
Running Title—Attribute Reference
Appendix
AppendixCA
Hex Conversion Utility Examples
The flexible hex conversion utility offers many options and capabilities. Once
you understand the proper ways to configure the EPROM system and the
requirements of the EPROM programmer, you will find that converting a file for
a specific application is easy.
Topic
Page
C.1
Base Code for the Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
C.2
Example 1: Building a Hex Command File
for Two 8-Bit EPROMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-3
C.3
Example 2: Avoiding Holes With Multiple Sections . . . . . . . . . . . . . . . C-8
C.4
Example 3: Generating a Boot Table . . . . . . . . . . . . . . . . . . . . . . . . . . . C-10
C.5
Example 4: Generating a Boot Table for LP Core Devices . . . . . . . . C-17
Chapter Title—Attribute Reference
C-1
Base Code for the Examples
C.1 Base Code for the Examples
The three major examples in this appendix show how to develop a hex command file for multiple EPROM memory systems, avoid holes, and generate a
boot table. The first two examples use the assembly code shown in
Example C–1.
Example C–1. Assembly Code for Hex Conversion Utility Examples
**********************************************************
* Assemble two words into section, ”sec1”
*
**********************************************************
.sect ”sec1”
.word 1234h
.word 5678h
**********************************************************
* Assemble two words into section, ”sec2”
*
**********************************************************
.sect ”sec2”
.word 0aabbh
.word 0ccddh
.end
C-2
Example 1: Building a Command File for Two 8-Bit EPROMS
C.2 Example 1: Building A Hex Command File for Two 8-Bit EPROMs
Example 1 shows how to build the hex command file you need for converting
a COFF object file for the memory system shown in Figure C–1. In this system,
there are two external 64K 8-bit EPROMs interfacing with a C54x target processor. Each of the EPROMs contributes 8 bits of a 16-bit word for the target
processor.
Figure C–1. A Two 8-Bit EPROM System
Upper 8 bits
Lower 8 bits
CPU
64K
8
ROM0
64K
8
ROM1
ROM width
8 bits
ROM width
8 bits
Width 16 Bits
EPROM system memory width 16 bits
By default, the hex conversion utility uses the linker load address as the base
for generating addresses in the converted output file. However, for this
application, the code will reside at physical EPROM address 0x0010, rather
than the address specified by the linker (0x1400). The circuitry of the target
board handles the translation of this address space. The paddr parameter allocates a section and burns the code at EPROM address 0x0010.
The paddr parameter is specified within the SECTIONS directive (see Section
10.6, The SECTIONS Directive, on page 10-22 for details). If you use the
paddr parameter to specify a load address for one section included in the conversion, then you must specify a paddr for each section included in the conversion. When setting the paddr parameter, you must ensure that the specified
addresses do not overlap the linker-assigned load addresses of sections that
follow.
In Example 1, two sections are defined: sec1 and sec2. You can easily add a
paddr parameter for each of these sections from within the SECTIONS directive. However, the task may become unmanageable for large applications with
many sections, or in cases where section sizes may change often during code
development.
Hex Conversion Utility Examples
C-3
Example 1: Building a Command File for Two 8-Bit EPROMS
To work around this problem, you can combine the sections at link stage, creating a single section for conversion. To do this, use the linker command shown
in Example C–2.
Example C–2. A Linker Command File for Two 8-Bit EPROMs
test.obj
–o test.out
–m test.map
MEMORY
{
PAGE 0 : EXT_PRG : org = 0x1400 , len = 0xEB80
}
SECTIONS
{
outsec: { *(sec1)
*(sec2)
}
} > EXT_PRG PAGE 0
The EPROM programmer in this example has the following system requirements:
- EPROM system memory width must be 16 bits.
- ROM1 contains the upper 8 bits of a word.
- ROM0 contains the lower 8 bits of a word.
- The hex conversion utility must locate code starting at EPROM address
0x0010.
- Intel format must be used.
- Byte increment must be selected for addresses in the hex conversion
utility output file (memory width is the default).
Use the following options to set up the requirements of the system:
C-4
Option
Description
–i
Create Intel format
–byte
Select byte increment for addresses in converted
output file
–memwidth 16
Set EPROM system memory width to 16
–romwidth 8
Set physical ROM width to 8
Example 1: Building a Command File for Two 8-Bit EPROMS
With the memory width and ROM width values above, the utility will automatically generate two output files. The ratio of memory width to ROM width determines the number of output files. The ROM0 file contains the lower 8 of the 16
bits of raw data, and the ROM1 file contains the upper 8 bits of the corresponding data.
Example C–3 shows the hex command file with all of the selected options.
Example C–3. A Hex Command File for Two 8-Bit EPROMs
test.out
/* COFF object input file
–map example1.mxp
*/
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
/* Set parameters for EPROM programmer
*/
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
–i
–byte
/* Select Intel format
/* Select byte increment for addresses
*/
*/
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
/* Set options required to describe EPROM memory system */
/*––––––––––––––––––––––––––––––––––––––––––––––––––––––*/
–memwidth 16
–romwidth 8
/* Set EPROM system memory width
/* Set physical width of ROM device
*/
*/
ROMS
{
PAGE 0 : EPROM : origin = 0x00, length = 0x10000,
files = {low8.bit, upp8.bit}
}
SECTIONS
{ outsec: paddr = 0x10 }
Figure C–2 (a) shows the contents of the converted file for ROM0 (low8.bit)
containing the lower 8 bits. Figure C–2 (b) shows the contents of the converted
file for ROM1 (upp8.bit) containing the upper 8 bits of data.
Hex Conversion Utility Examples
C-5
Example 1: Building a Command File for Two 8-Bit EPROMS
Figure C–2. Data From Output File
(a) low8.bit (Lower Bits)
Data from converted output file
:040010003478BBDDA8
:00000001FF
Corresponding map in EPROM — ROM0 (See Example C–1 on page
C-2)
0x0010
34
78
BB
DD
(b) upp8.bit (Upper Bits)
Data from converted output file
:040010001256AACC0E
:00000001FF
Corresponding map in EPROM — ROM1 (See Example C–1 on page
C-2)
0x0010
12
56
AA
CC
C-6
Example 1: Building a Command File for Two 8-Bit EPROMS
To illustrate precisely how the utility performs the conversion, specify the –map
option. Although not required, the –map option generates useful information
about the output. The resulting map is shown in Example C–4.
Example C–4. Map File Resulting From Hex Command File in Example C–3 on page C-5
******************************************************
TMS320C54x COFF/Hex Converter
Version x.xx
******************************************************
Fri Oct 11 15:10:53 2001
INPUT FILE NAME: <test.out>
OUTPUT FORMAT:
Intel
PHYSICAL MEMORY PARAMETERS
Default data width:
16
Default memory width: 16
Default output width: 8
OUTPUT TRANSLATION MAP
–––––––––––––––––––––––––––––––––––––––––––––––––––––
00000000..0000ffff Page=0 Memory Width=16 ROM Width=8 ”EPROM”
–––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES: low8.bit [b0..b7]
upp8.bit [b8..b15]
CONTENTS: 00000010..00000017
outsec Data Width=2
Hex Conversion Utility Examples
C-7
Example 2: Avoiding Holes With Multiple Sections
C.3 Example 2: Avoiding Holes With Multiple Sections
When the memory width is less than the data width, holes may appear at
the beginning of a section or between sections. This is due to multiplication
of the load address by a correction factor. See Section 10.10, Controlling
the ROM Device Address, on page 10-35 for more information.
You must eliminate the holes between converted sections. The sections
can be made contiguous in one of two ways:
- Specify a paddr value for each section listed in a SECTIONS directive.
This forces the hex conversion utility to use that specific address for the
output file address field. You must ensure that the section addresses do
not overlap. Example C–5 (a) shows a linker command file for this method.
The linker should be executed with this command file; then, the hex
conversion utility should be executed with the set of commands shown in
Example C–5 (b).
- Link the sections together into one output section for conversion.
Example C–6 (a) shows a linker command file for this method. The linker
should be executed with this command file; then, the hex conversion utility
should be executed with the set of commands shown in Example C–6 (b).
Example C–5. Method One for Avoiding Holes
(a) Linker command file
/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
PAGE 0: DARAM: org = 0x0080
EXT: org = 0x1400
}
, length = 0x1370
, length = 0xEB80
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
SECTIONS
{
sec1 : load = EXT PAGE 0
sec2 : load = EXT PAGE 0
}
C-8
Example 2: Avoiding Holes With Multiple Sections
(b) Hex command file
–i
test.out
–map example.mxp
ROMS
{
PAGE 0: ROM: org = 0x0000,
}
length = 0x800, romwidth = 8, memwidth = 8
SECTIONS
{
sec1: paddr = 0x0000
sec2: paddr = 0x0004
}
Example C–6. Method Two for Avoiding Holes
(a) Linker command file
/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
PAGE 0: DARAM: org = 0x0080
EXT: org = 0x1400
}
, length = 0x1370
, length = 0xEB80
SECTIONS
{
outsec: { *(sec1)
*(sec2) } > EXT PAGE 0
}
(b) Hex command file
–i
test.out
–map example.mxp
ROMS
{
PAGE 0: ROM : org = 0x0100, length = 0x0800, romwidth = 8, memwidth = 8,
files = {examp2_2.hex}
}
SECTIONS
{
outsec: paddr = 0x100
}
Hex Conversion Utility Examples
C-9
Example 3: Generating a Boot Table
C.4 Example 3: Generating a Boot Table
Example 3 shows how to use the linker and the hex conversion utility to build
a boot load table for the C54x devices. The code used in this section is shown
in Example C–7.
Note:
This example is for non-LP ’C54x devices only.
For ’C54xLP devices, see Section C.5, Example 4: Generating a Boot Table
for LP Core Devices, on page C-17.
Example C–7. C Code for Example 3
int array[]={1,2,3,4};
main()
{
array[0] = 5;
}
Figure C–3 shows the EPROM memory system for which the output file will be
generated. In this application, the single C54x device is booted from a 128K
8-bit EPROM. The requirement of the system is that the boot table must
reside at EPROM memory address 0.
Figure C–3. EPROM System for a C54x
CPU
C54x
128K
8
ROM0
Width 16 bits
ROM width
8 bits
EPROM system memory width
8 bits
C-10
Example 3: Generating a Boot Table
The on-chip boot loader loads only a single block. This may present a problem
when you are loading C code compiled with the TMS320C54x C compiler. The
TMS320C54x C compiler creates several sections or blocks when it compiles
C source code. Some applications may require that all sections associated
with the program be included in the boot to have a complete executable
program. In this case, the individual sections must be combined into a single
section for boot.
The hex conversion utility does not combine individual sections; therefore, you
must use the linker to group those sections.
The sections that the compiler creates are divided into two categories: initialized sections (sections that contain data or code) and uninitialized sections
(sections that reserve space but contain no actual data). Initialized sections
created by the TMS320C54x C compiler include .text, .cinit, .const, and .data.
Uninitialized sections are ignored by the hex conversion utility and are not
converted.
Most applications require that .text and .cinit sections are included in the boot.
This allows code and information for the C boot routine (c_int00 defined in
boot.asm) to load and run, initializing the C environment and branching to the
main function in the applications code.
The .text and .cinit sections must be linked together as a single section in the
linker command file. The .cinit section contains the initialization data and
tables for all global or static C symbols that were declared with an initial value
(i.e. int x = 5; ). Note that the linker handles the .cinit section differently than
the other sections.
When the linker encounters a .cinit section specified as an output section in
the link, it automatically:
- Sets the symbol cinit to point to the start of the included .cinit section
- Appends a single word to the end of the section
This last word contains a zero that is used to mark the end of the initialization
table. However, if .cinit is included as an input section only, the linker sets cinit
to –1, indicating that no initialization tables were loaded. Therefore, the C boot
routine, c_int00, does not attempt to initialize any of the global or static C
symbols.
When linking the .cinit section into an output section other than .cinit, the linker
does not perform the automatic functions listed above. Therefore, these functions must be implemented explicitly within the linker command file. The following example shows a linker command file that places .text and .cinit into a
single output section named boot_sec.
Hex Conversion Utility Examples
C-11
Example 3: Generating a Boot Table
Example C–8. Linker Command File to Form a Single Boot Section
–c
–l rts.lib
–m boot1.map
–o boot.out
MEMORY
{
PAGE 0 : PROG
: origin = 001400h, length = 01000h
PAGE 1 : DATA
: origin = 0080h,
length = 01000h
}
SECTIONS
{
boot_sec: { *(.text)
/*–––––––––––––––––––––––––––––––––––––*/
/* Set start address for C init table */
/*–––––––––––––––––––––––––––––––––––––*/
cinit = .;
/*–––––––––––––––––––––––––––––––––––––*/
/* Include all cinit sections
*/
/*–––––––––––––––––––––––––––––––––––––*/
*(.cinit)
/*–––––––––––––––––––––––––––––––––––––*/
/* Reserve a single space for the zero */
/* word to mark end of C init
*/
/*–––––––––––––––––––––––––––––––––––––*/
.+=1;
}
fill = 0x0000, /* Make sure fill value is 0
load = PROG PAGE 0
.data
.bss
.const
.sysmem
.stack
:
:
:
:
:
{}
{}
{}
{}
{}
>
>
>
>
>
DATA
DATA
DATA
DATA
DATA
PAGE
PAGE
PAGE
PAGE
PAGE
*/
1
1
1
1
1
}
Example C–9 shows a portion of the map file generated when the linker is
executed with this command file.
C-12
Example 3: Generating a Boot Table
Example C–9. Section Allocation Portion of Map File Resulting From the Command File
SECTION ALLOCATION MAP
output
section
––––––––
boot_sec
page
––––
0
origin
length
–––––––––– ––––––––––
00001400
0000006e
00001400
00000004
00001404
0000002b
0000142f
00000035
00001464
00000006
0000146a
00000003
0000146d
00000001
attributes/
input sections
––––––––––––––––
boot.obj (.text)
rts.lib : boot.obj (.text)
: exit.obj (.text)
boot.obj (.cinit)
rts.lib : exit.obj (.cinit)
––HOLE–– [fill = 0000]
.data
1
00000080
00000000
00000080
00000000
00000080
00000000
00000080
00000000
UNINITIALIZED
boot.obj (.data)
rts.lib : exit.obj (.data)
: boot.obj (.data)
.bss
1
00000080
00000025
00000080
00000004
00000084
00000000
00000084
00000021
UNINITIALIZED
boot.obj (.bss)
rts.lib : boot.obj (.bss)
: exit.obj (.bss)
.const
1
00000080
00000000
UNINITIALIZED
.sysmem
1
00000080
00000000
UNINITIALIZED
.stack
1
000000a5
00000400
000000a5
00000000
UNINITIALIZED
rts.lib : boot.obj (.stack)
GLOBAL SYMBOLS
address
––––––––
00000080
00000080
00000400
0000145e
00000080
00001448
00001404
0000142f
00001400
00001464
00000080
000000a5
name
––––
.bss
.data
__STACK_SIZE
_abort
_array
_atexit
_c_int00
_exit
_main
cinit
edata
end
address
––––––––
00000080
00000080
00000080
00000080
000000a5
00000400
00001400
00001404
0000142f
00001448
0000145e
00001464
name
––––
edata
.data
_array
.bss
end
__STACK_SIZE
_main
_c_int00
_exit
_atexit
_abort
cinit
[12 symbols]
Hex Conversion Utility Examples
C-13
Example 3: Generating a Boot Table
Notice that the linker placed a hole at the end of the section boot_sec with a
fill value of 0, as specified in the command file. Also, the global symbol cinit
coincides with the start of the first .cinit section included in the link. When the
linker is executed with the command file in Example C–8 on page C-12, the
linker issues warnings that the output file contains no .text section and that the
global symbol cinit is being redefined. These warnings may be ignored in this
instance.
Executing the linker with the command file in Example C–8 on page C-12
yields a COFF file that can be used as input to the hex conversion utility to build
the desired boot table.
The hex conversion utility has options that describe the requirements for the
EPROM programmer and options that describe the EPROM memory system.
For Example 3, assume that the EPROM programmer has only one requirement: that the hex file be in Intel format.
In the EPROM memory system illustrated in Figure C–3 on page C-10, the
EPROM system memory width is 8 bits, and the physical ROM width is 8 bits.
You must set the following options in the hex command file to reflect the
requirements of the system:
Option
Description
–i
Create Intel format.
–memwidth 8
Set EPROM system memory width to 8.
–romwidth 8
Set physical ROM width to 8.
Because the application requires the building of a boot table for parallel boot
mode, you must set the following options in the hex command file to reflect the
requirements of the system:
C-14
Option
Description
–boot
Create a boot load table.
–bootorg 0x0000
Place boot table at address 0x0000.
Example 3: Generating a Boot Table
Example C–10. Hex Command File for Converting a COFF File
boot.out
–i
/* Input COFF file
/* Select Intel format
*/
*/
–o boot.hex
/* Name the hex output file
*/
–memwidth 8
–romwidth 8
/* Set EPROM system memory width */
/* Set physical ROM width
*/
–boot
–bootorg 0x0000
/* Make all sections bootable
/* Place boot table in EPROM
/* starting at address 0x0000
–map boot2.map
*/
*/
*/
ROMS
{
PAGE 0 : ROM : origin = 0x0000, length = 0x20000
}
In Example 3, memory width and ROM width are the same; therefore, the hex
conversion utility creates a single output file. The number of output files is
determined by the ratio of memwidth to romwidth.
Example C–11 shows the map file boot2.map, resulting from executing the
command file in Example C–10, which includes the –map option.
Hex Conversion Utility Examples
C-15
Example 3: Generating a Boot Table
Example C–11. Map File Resulting From the Command File in Example C–10
******************************************************
TMS320C54x COFF/Hex Converter
Version x.xx
******************************************************
Fri Oct 11 15:27:46 2001
INPUT FILE NAME: <boot.out>
OUTPUT FORMAT:
Intel
PHYSICAL MEMORY PARAMETERS
Default data width:
16
Default memory width: 8 (MS––>LS)
Default output width: 8
BOOT LOADER PARAMETERS
OUTPUT TRANSLATION MAP
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
00000000..0001ffff Page=0 Memory Width=8 ROM Width=8 ”ROM”
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES: boot.hex [b0..b7]
CONTENTS: 00000000..00000138
BOOT TABLE
boot_sec : dest=00001400
size=00000139 width=00000002
The hex conversion utility output file boot.hex, resulting from the command file
in Example C–10, is shown in Example C–12.
Example C–12. Hex Conversion Utility Output File Resulting From the Command File in
Example C–10
:200000001400007976F800800005FC00771800A66BF8001803FF68F80018FFFEF7B8F7BED9
:20002000F4A0F6B7F6B5F6B6F020146DF1000001F84D142BF07314257EF80012F00000010C
:2000400047F800117E9200F80011F00000017EF80011F00000016C89141AF0741400F074CF
:2000600014674A117211008410F80011FA4514444A16EEFF4811F00000868816F495F49527
:2000800010EEFFFFF4E36CE9FFFF143E10F80085F845144B10F80085F4E3F495F073144C0F
:2000A000F7B811F80084F3100020FA4B145BF4954A11F2731465F495E80172110084491198
:2000C00080E10086F3000001E80081F800848A11FC00EEFFE801F074142FEE01FC0000045D
:1800E00000800001000200030004000100840000000100850000000073
:00000001FF
C-16
Example 4: Generating a Boot Table for LP Core Devices
C.5 Example 4: Generating a Boot Table for LP Core Devices
Example 4 shows how to use the linker and the hex conversion utility to build
a boot load table for the ’C54xLP devices. For the ’C54xLP devices, you can
specify multiple sections. It is not necessary, therefore, to group sections at link
time as with the non-LP devices.
Note:
This example is for ’C54xLP devices only.
For non-LP ’C54x devices, see Section C.4, Example 3: Generating a Boot
Table, on page C-10.
Example C–13. C Code for a ’C54xLP
int array[]={1,2,3,4};
main()
{
array[0] = 5;
}
Note that this example is compiled with the –v548 shell option.
Figure C–4 shows the EPROM memory system for which the output file will be
generated. In this application, the single ’C54xLP device is booted from a 128K
8-bit EPROM. The requirements of the system are that the boot table must
reside at EPROM memory address 0.
Figure C–4. EPROM System for a ’C54xLP
CPU
’C54xLP
128K
8
ROM0
Width 16 bits
ROM width
8 bits
EPROM system memory width
8 bits
Hex Conversion Utility Examples
C-17
Example 4: Generating a Boot Table for LP Core Devices
The sections that the compiler creates are divided into two categories: initialized sections (sections that contain data or code) and uninitialized sections
(sections that reserve space but contain no actual data). Initialized sections
created by the TMS320C54x C compiler include .text, .cinit, .const, and .data.
Uninitialized sections are ignored by the hex conversion utility and are not
converted.
Most applications require that .text and .cinit sections are included in the boot.
This allows code and information for the C boot routine (c_int00 defined in
boot.asm) to load and run, initializing the C environment and branching to the
main function in the applications code.
The .cinit section contains the initialization data and tables for all global or
static C symbols that were declared with an initial value (i.e. int x = 5; ). Note
that the linker handles the .cinit section differently than the other sections.
When the linker encounters a .cinit section specified as an output section in
the link, it automatically:
- Sets the symbol cinit to point to the start of the included .cinit section
- Appends a single word to the end of the section
This last word contains a zero that is used to mark the end of the initialization
table. However, if .cinit is included as an input section only, the linker sets cinit
to –1, indicating that no initialization tables were loaded. Therefore, the C boot
routine, c_int00, does not attempt to initialize any of the global or static C
symbols.
When linking the .cinit section into an output section other than .cinit, the linker
does not perform the automatic functions listed above. Therefore, these functions must be implemented explicitly within the linker command file.
Example C–14 shows a linker command file for a ’C54xLP device.
C-18
Example 4: Generating a Boot Table for LP Core Devices
Example C–14. Linker Command File for a ’C54xLP
–c
c54xlp.obj
–l rts.lib
–m c54xlp.map
–o c54xlp.out
MEMORY
{
PAGE 0 : PROG
: origin = 001400h, length = 01000h
PAGE 1 : DATA
: origin = 0080h,
length = 01000h
}
SECTIONS
{
.text
.cinit
.data
.bss
.const
.sysmem
.stack
:
:
:
:
:
:
:
{}
{}
{}
{}
{}
{}
{}
>
>
>
>
>
>
>
PROG
PROG
DATA
DATA
DATA
DATA
DATA
PAGE
PAGE
PAGE
PAGE
PAGE
PAGE
PAGE
0
0
1
1
1
1
1
}
Example C–15 shows the map file generated when the linker is executed with
the command file in Example C–14. Linking with this command file creates a
COFF file you use as input to the hex conversion utility to build the desired boot
table.
Example C–15. Section Allocation Portion of Map File Resulting From the Command File
in Example C–14
OUTPUT FILE NAME:
<c54xlp.out>
ENTRY POINT SYMBOL: ”_c_int00” address: 00001404
MEMORY CONFIGURATION
name
––––––––
PAGE 0: PROG
origin
length
used
attributes
fill
–––––––– ––––––––– –––––––– –––––––––– ––––––––
00001400 000001000 0000007a RWIX
PAGE 1: DATA
00000080
000001000 00000426
RWIX
Hex Conversion Utility Examples
C-19
Example 4: Generating a Boot Table for LP Core Devices
Example C–15. Section Allocation Portion of Map File Resulting From the Command File
in Example C–14 (Continued)
SECTION ALLOCATION MAP
output
section page
–––––––– ––––
.text
0
.cinit
0
.data
1
.bss
1
.const
.sysmem
.stack
1
1
1
origin
––––––––––
00001400
00001400
00001404
0000142f
0000146d
0000146d
00001473
00001479
00000080
00000080
00000080
00000080
00000080
00000080
00000084
00000084
00000080
00000080
000000a6
000000a6
length
––––––––––
0000006d
00000004
0000002b
0000003e
0000000d
00000006
00000006
00000001
00000000
00000000
00000000
00000000
00000026
00000004
00000000
00000022
00000000
00000000
00000400
00000000
attributes/
input sections
––––––––––––––––
c54xlp.obj (.text)
rts.lib : boot.obj (.text)
: exit.obj (.text)
c54xlp.obj (.cinit)
rts.lib : exit.obj (.cinit)
––HOLE–– [fill = 0000]
UNINITIALIZED
c54xlp.obj (.data)
rts.lib : exit.obj (.data)
: boot.obj (.data)
UNINITIALIZED
c54xlp.obj (.bss)
rts.lib : boot.obj (.bss)
: exit.obj (.bss)
UNINITIALIZED
UNINITIALIZED
UNINITIALIZED
rts.lib : boot.obj (.stack)
GLOBAL SYMBOLS
address
––––––––
00000080
00000080
00001400
0000144b
00000400
00000085
00000001
00001467
00000080
0000144e
00001404
0000142f
00001400
0000146d
00000080
000000a6
0000146d
ffffffff
name
––––
.bss
.data
.text
C$$EXIT
__STACK_SIZE
__cleanup_ptr
__lflags
_abort
_array
_atexit
_c_int00
_exit
_main
cinit
edata
end
etext
pinit
[18 symbols]
C-20
address
––––––––
00000001
00000080
00000080
00000080
00000080
00000085
000000a6
00000400
00001400
00001400
00001404
0000142f
0000144b
0000144e
00001467
0000146d
0000146d
ffffffff
name
––––
__lflags
_array
.data
.bss
edata
__cleanup_ptr
end
__STACK_SIZE
.text
_main
_c_int00
_exit
C$$EXIT
_atexit
_abort
etext
cinit
pinit
Example 4: Generating a Boot Table for LP Core Devices
The hex conversion utility has options that describe the requirements for the
EPROM programmer and options that describe the EPROM memory system.
For Example 4, assume that the EPROM programmer has only one requirement: that the hex file be in Intel format.
In the EPROM memory system illustrated in Figure C–4 on page C-17, the
EPROM system memory width is 8 bits and the physical ROM width is 8 bits.
The following options are selected to reflect the requirements of the system:
Option
Description
–i
Create Intel format.
–memwidth 8
Set EPROM system memory width to 8.
–romwidth 8
Set physical ROM width to 8.
Because the application requires the building of a boot table for parallel boot
mode, the following options must be selected as well:
Option
Description
–boot
Create a boot load table.
–bootorg 0x0000
Place boot table at address 0x0000.
Hex Conversion Utility Examples
C-21
Example 4: Generating a Boot Table for LP Core Devices
Example C–16. Hex Command File for Converting a COFF File
c54xlp.out
–i
/* Input COFF file
/* Select Intel format
*/
*/
–map c54xlp.mxp
/* Name hex utility map file
*/
–o c54xlp.hex
/* Name the hex output file
*/
–memwidth 8
–romwidth 8
/* Set EPROM system memory width
/* Set physical ROM width
*/
*/
–boot
–bootorg 0x0000
/* Make all sections bootable
/* Place boot table in EPROM
/* starting at address 0x0000
*/
*/
*/
ROMS
{
PAGE 0 : ROM : origin = 0x0000, length = 0x20000
}
In Example 4, memory width and ROM width are the same; therefore, the hex
conversion utility creates a single output file. The number of output files is
determined by the ratio of memwidth to romwidth.
Example C–17 shows the map file c54xlp.mxp, resulting from executing the
command file in Example C–16, which includes the –map option.
C-22
Example 4: Generating a Boot Table for LP Core Devices
Example C–17. Map File Resulting From the Command File in Example C–16
******************************************************
TMS320C54x COFF/Hex Converter
Version x.xx
******************************************************
Sat Sep 21 17:01:13 2001
INPUT FILE NAME: <c54xlp.out>
OUTPUT FORMAT:
Intel
PHYSICAL MEMORY PARAMETERS
Default data width:
16
Default memory width: 8 (MS––>LS)
Default output width: 8
BOOT LOADER PARAMETERS
Table Address: 0000, PAGE 0
OUTPUT TRANSLATION MAP
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
00000000..0001ffff Page=0 Memory Width=8 ROM Width=8 ”ROM”
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
OUTPUT FILES: c54xlp.hex [b0..b7]
CONTENTS: 00000000..00000109
BOOT TABLE
.text : dest=00001400
size=0000006d
width=00000002
.cinit : dest=0000146d
size=0000000d
width=00000002
The hex conversion utility output file c54xlp.hex, resulting from the command
file in Example C–16, is shown in Example C–18.
Example C–18. Hex Conversion Utility Output File Resulting From the Command File in
Example C–16
:2000000008AA7FFFF800FFFFFFFF00870000140076F800800005FE00E800F495771800A68A
:200020006BF8001803FF68F80018FFFEF7B8F7BEF6B9F4A0F6B7F6B5F6B6F0201487F10087
:200040000001F84D1430F273142AF6B8F4957EF80012F000000147F800117E9200F800115A
:20006000F00000017EF80011F00000016C89141FF7B8EEFCF020FFFFF1000001F84D1444B9
:20008000F273143E4E02F495F5E356027E001100FA4C143C6B030001F6B8EE04F0741400F4
:2000A000F074144A4A114A16721100A410F80011FA451460F495EEFF4811F00000848816EF
:2000C000F495F49510EEFFFFF4E36CE9FFFF145A10F800A5F845146710F800A5F4E3F0742D
:2000E0001484EE018A168A11FC00F7B8E9204A1109F800A4F84E1478F2731482F495E8014B
:1E010000721100A4491180E10084F3000001E80081F800A48A11FC00F495F073148566
:20011E00000D00001487000400800001000200030004000100A40000000100A50000000040
:02013E000000BF
:00000001FF
Hex Conversion Utility Examples
C-23
Appendix
AppendixDA
Assembler Error Messages
When the assembler completes its second pass, it reports any errors that it
encountered during the assembly. It also prints these errors in the listing file
(if one is created). An error is printed following the source line that incurred it.
You should attempt to correct the first error that occurs in your code first. A
single error condition can cause a cascade of spurious errors.
If you have received an assembler error message, use this appendix to find
possible solutions to the problem you encountered. First, locate the error
message class number. Then, locate the error message that you encountered
within that class. Each class number has an alphabetical list of error messages
that are associated with it. Each class has a Description of the problem and
an Action that suggests possible remedies.
D-1
Assembler Error Messages
E0000
Attempt to nest repeat block
Comma required to separate arguments
Comma required to separate parameters
Commas must separate directive elements
Illegal combination of shift operands
Illegal identifier after keyword unsigned
Illegal instruction
Illegal keyword
Illegal repeat block open – check delay slot
Illegal repeat block open – missing ’repeat’
Illegal shift for parallel operation
Left parenthesis expected
Left parenthesis is missing
Matching right parenthesis is missing
Missing comma
Missing left parenthesis
Missing opening brace
Missing right parenthesis
Missing right parenthesis for value specification
Missing right quote of string constant
No matching right parenthesis
Open repeat block at EOF
Right parenthesis expected
Syntax Error
Syntax requires parentheses
Unrecognized character type
D-2
Description
These are errors about general syntax. The required syntax is
not present.
Action
Correct the source per the error message text.
Assembler Error Messages
E0002
Invalid mnemonic specification
Description
This error relates to invalid mnemonics. The instruction,
macro, or directive specified was not recognized.
Action
Check the directive or instruction used.
Invalid instruction for specified processor version
Description
The indicated instruction is not allowed for the processor version specified with the .version directive.
Action
Check the instruction and .version directive.
E0003
Cluttered character operand encountered
Cluttered identifier operand encountered
Cluttered register operand encountered
Cluttered string constant operand encountered
Conditionals cannot begin in the first column
Condition must be EQ, LT, GT, or NEQ
Condition must be srcEQ, NEQ, LT, LEQ, GT, or GEQ
Expecting ARn for src,dst
Expecting shift or accumulator
Illegal auxiliary register specified
Illegal condition operand
Illegal condition operand or combination
Illegal indirect memaddr specification
Illegal operand
Illegal smem operand
Immediate value out of range
Invalid binary constant specified
Invalid constant specification
Invalid decimal constant specified
Invalid float constant specified
Invalid hex constant specified
Assembler Error Messages
D-3
Assembler Error Messages
Invalid immediate or shift value
Invalid octal constant specified
Invalid Operand 2
Invalid operand x
Invalid shift value
Must add AR0 to destination
Must subtract AR0 from destination
Only labels and comments may begin in first column
Operand must be the A accumulator
Operand must be the B accumulator
Section is not defined
Shift value must be 16
Syntax error – Operand nnn
The accumulator arguments must be the same
The accumulator arguments must not be the same
The dst accumulator arguments must be the same
The dst,src1 arguments must be the same
The smem operands must be the same
Unexpected parallel instruction delimiters
D-4
Description
These are errors about invalid operands. The instruction,
parameter, or other operand specified was not recognized.
Action
Correct the source per the error message text.
Assembler Error Messages
E0004
Absolute, well-defined integer value expected
Expecting accumulator A or B
Expecting ASM or shift value
Expecting dual memory addressing
Identifier expected
Identifier operand expected
Illegal character argument specified
Illegal combination of Smem operands
Illegal floating-point expression
Illegal operand
Illegal shift operation
Illegal structure reference
Incorrect bit symbol for specified status register
Invalid data size for relocation
Invalid float constant specified
Invalid identifier, sym, specified
Invalid macro parameter specified
Invalid operand, ”char”
Must add to the destination operand
No parameters available for macro arguments
Not expecting direct operand op
Not expecting immediate value operand op
Not expecting indirect operand op
Offset Addressing modes not legal for MMR addressing
Operand must be auxiliary register or SP
Operand must be auxiliary register
Operand must be T
Register must be ARn or SP
Single character operand expected
String constant or substitution symbol expected
String operand expected
Structure/Union tag symbol expected
Substitution symbol operand expected
The accumulator operands must be different
The operands must be SP
Description
These errors are about illegal operands. The instruction,
parameter or other operand specified was not legal for this
syntax.
Action
Correct the source per the error message text.
Assembler Error Messages
D-5
Assembler Error Messages
E0005
Missing field value operand
Missing operand(s)
Operand missing
Tag identification operand required
Tag symbol identifier required
Description
These are errors about missing operands; a required operand is not supplied.
Action
Correct the source so that all required operands are declared.
E0006
.break must occur within a loop
Conditional assembly mismatch
Matching .endloop missing
No matching .if specified
No matching .endif specified
No matching .endloop specified
No matching .if specified
No matching .loop specified
Open block(s) inside macro
Unmatched .endloop directive
Unmatched .if directive
Description
These are errors about unmatched conditional assembly
directives. A directive was encountered that requires a
matching directive but the assembler could not find the
matching directive.
Action
Correct the source per the error message text.
E0007
Conditional nesting is too deep
Loop count out of range
D-6
Description
These are errors about conditional assembly loops. Conditional block nesting cannot exceed 32 levels.
Action
Correct the .macro/.endmacro, .if/.elseif/.else/.endif or .loop/
.break/.endloop source.
Assembler Error Messages
E0008
Bad use of .access directive
Matching .struct directive is not present
Matching .union directive is not present
Description
These are errors about unmatched structure definition directives. In a .struct/.endstruct sequence, a directive was
encountered that requires a matching directive but the
assembler could not find the matching directive.
Action
Check the source for mismatched structure definition directives and correct.
E0009
Cannot apply bitwise NOT to floats
Illegal struct/union reference dot operator
Missing structure/union member or tag
Section ”name” is not an initialized section
Structure or union tag symbol expected
Structure or union tag symbol not found
Description
These are errors about an illegally used operator. The operator specified was not legal for the given operands.
Action
Correct the source per the error message text so that all
required operands are declared.
E0100
Label missing
Label required
.setsym requires a label
Description
These are errors about required labels. The given directive
requires a label, but none is specified.
Action
Correct the source by specifying the required label.
Assembler Error Messages
D-7
Assembler Error Messages
E0101
Labels are not allowed with this directive
Standalone labels not permitted in structure/union defs
D-8
Description
These are errors about invalid labels. The given directive
does not permit a label, but one is specified.
Description
Remove the invalid label.
Assembler Error Messages
E0102
Local label number defined differently in each pass
Local label number is multiply defined
Local label number is not defined in this section
Local labels can’t be used with directives
Description
These are errors about the illegal use of local labels.
Action
Correct the source per the error message text. Use .newblock
to reuse local labels.
E0200
Bad term in expression
Binary operator can’t be applied
Cannot resolve symbol in expression
Difference between segment symbols not permitted
Expression evaluation failed
Illegal divide by zero
Illegal remainder by zero
Integer divide by zero
Integer remainder by zero
Offset expression must be integer value
Operation cannot be performed on given operands
Unable to compose expression
Unary operator can’t be applied
Value of expression has changed due to jump expansion
Well-defined expression required
Description
These are errors about general expressions. An illegal operand combination was used, or an arithmetic type is required
but not present.
Action
Correct the source per the error message text.
Assembler Error Messages
D-9
Assembler Error Messages
E0201
Absolute operands required for FP operations!
Floating–point divide by zero
Floating–point overflow
Floating–point underflow
Floating–point expression required
Illegal floating–point expression
Invalid floating–point operation
Description
These are errors about floating-point expressions. A floating-point expression was used where an integer expression is
required, an integer expression was used where a floating-point expression is required, or a floating-point value is
invalid.
Action
Correct the source per the error message text.
E0300
Cannot equate an external symbol to an external
Cannot redefine this section name
Cannot tag an undefined symbol
Empty structure or union definition
Illegal structure or union tag
Missing closing ’}’ for repeat block
Redefinition of ”sym” attempted
Structure tag can’t be global
Symbol can’t be defined in terms of itself
Symbol expected
Symbol expected in label field
Symbol, sym, has already been defined
Symbol, sym, is not defined in this source file
Symbol, sym, is operand to both .ref and .def
Structure/union member, sym, not found
The following symbols are undefined:
Union member previously defined
Union tag can’t be global
D-10
Description
These are errors about general symbols. An attempt was
made to redefine a symbol or to define a symbol illegally.
Action
Correct the source per the error message text.
Assembler Error Messages
E0301
Cannot redefine local substitution symbol
Substitution stack overflow
Substitution symbol not found
Description
These are errors about general substitution symbols. An
attempt was made to redefine a symbol or to define a symbol
illegally.
Action
Correct the source per the error message text. Make sure that
the operand of a substitution symbol is defined either as a
macro parameter or with a .asg or .eval directive.
E0400
Symbol table entry is not balanced
Description
A symbolic debugging directive does not have a complementing directive (i.e., a .block without an .endblock).
Action
Check the source for mismatched conditional assembly
directives.
E0500
Macro argument string is too long
Missing macro name
Too many variables declared in macro
Description
These are errors about general macros. A macro definition
was probably corrupted.
Action
Correct the source per the error message text.
E0501
Macro definition not terminated with .endm
Matching .endm missing
Assembler Error Messages
D-11
Assembler Error Messages
Matching .macro missing
.mexit directive outside macro definition
No active macro definition
Description
These are errors about macro definition directives. A macro
directive does not have a complementing directive (that is, a
.macro without a .endm).
Action
Correct the source per the error message text.
E0600
Bad archive entry for macro name
Bad archive name
Can’t read a line from archive entry
library name macro library not found
library name is not in archive format
Description
These are errors about macro library accessing. A problem
was encountered reading from or writing to a macro library
archive file. It is likely that the creation of the archive file was
not done properly.
Action
Make sure that the macro libraries are unassembled assembler source files. Also make sure that the macro name and
member name are the same, and the extension of the file is
.asm.
E0700
Can’t use –g on assembly code with .line directives
Illegal structure/union member
No structure/union currently open
.sym not allowed inside structure/union
D-12
Description
These are errors about the illegal use of symbolic debugging
directives; a symbolic debugging directive is not used in an
appropriate place.
Action
Correct the source per the error message text.
Assembler Error Messages
E0800
Control flow change in delayed branch slot
Instructions not permitted in structure/union definitions
Parallel operator without instruction
Too many words in delayed branch slot
Description
These are errors about parallel or branch instructions. These
errors are normally target-specific.
Action
Correct the source per the error message text.
E0801
Too many parallel instructions
Description
This error is caused by having too many instructions in
parallel.
Action
Check the source for parallel instruction problems and correct
per the error message text.
E0900
Cannot change version after 1st instruction
Cannot change parsing mode after 1st instruction
Can’t include a file inside a loop or macro
Illegal structure member
Illegal structure definition contents
Illegal union member
Illegal union definition contents
Invalid load-time label
Invalid structure/union contents
.setsect only valid if absolute listing produced (use –a option)
Assembler Error Messages
D-13
Assembler Error Messages
.setsym only valid if absolute listing produced (use –a option)
.var allowed only within macro definitions
Description
These are errors about illegally used directives. Specific
directives were encountered where they are not permitted
because they will cause a corruption of the object file. Many
directives are not permitted inside of structure or union definitions.
Action
Correct the source per the error message text.
E1000
Include/Copy file not found or opened
D-14
Description
The specified filename cannot be found.
Action
Check spelling, pathname, environment variables, etc.
Assembler Error Messages
E1300
Copy limit has been reached
Exceeded limit for macro arguments
Macro nesting limit exceeded
Description
These errors are about general assembler limits that have
been exceeded. The nesting of .copy/.include files in limited
to 10 levels. Macro arguments are limited to 32 parameter.
Macro nesting is limited to 32 levels.
Action
Check the source to determine how limits have been
exceeded.
E9999
Pass conflict
Description
This is an internal assembler error. If it occurs repeatedly, the
assembler may be corrupt or confused.
Action
Assemble a smaller file. If a smaller file does not assemble,
reinstall the assembler.
Pipeline conflict detected
Description
This error reports a pipeline conflict.
Action
Check the source to determine what caused the problem and
correct the source.
Illegal use of *(EXPR) notation
Illegal use of *SP notation
Description
This error reports a notation problem.
Action
Check the source to determine what caused the problem and
correct the source.
Assembler Error Messages
D-15
Assembler Error Messages
W0000
Ambiguous assignment
Invalid page number specified – ignored
Macro parameter conflict
No operands expected. Operands ignored
Specified alignment is outside accessible memory – ignored
Trailing operand does not exist
Trailing operands ignored
Unrecognized operand, ignored
*+ARn addressing is for write-only
D-16
Description
These are warnings about operands. The assembler encountered operands that it did not expect.
Action
Check the source to determine what caused the problem and
whether you need to correct the source.
Assembler Error Messages
W0001
Field value truncated to value
Field width truncated to size in bits
Immediate value out of range
Legal shift values are ...
Maximum alignment is to 32K boundary – alignment ignored
Offset expression – value out of range
Power of 2 required, next larger power of 2 assumed
Section Name is limited to 8 characters
Section name, name, truncated to 8 chars
Set value must be 0 or 1
Shift value out of range
Status bit value out of range
Status register must be 0 or 1
String is too long – will be truncated
Valid values are 1 and 2
Value values to xxx are nnn
Value truncated
Value truncated to x–bit width
Value truncated to byte size
Value out of range
Description
These are warnings about truncated values. The expression
given was too large to fit within the instruction opcode or the
required number of bits.
Action
Check the source to make sure the result will be acceptable,
or change the source if an error has occurred.
W0002
Address expression will wrap-around
Expression will overflow, value truncated
Description
These are warnings about arithmetic expressions. The
assembler has done a calculation that will produce the
indicated result, which may or may not be acceptable.
Action
Verify the result will be acceptable, or change the source if an
error has occurred.
Assembler Error Messages
D-17
Assembler Error Messages
W0003
Incorrect size for the type
.sym for function name required before .func
Description
This is a warning about problems with symbolic debugging
directives. A .sym directive defining the function does not
appear before the .func directive.
Action
Correct the source.
W0004
.access only allowed in top-most structure definition
Access point has already been defined
Open block(s) at EOF
Description
These are warnings about problems with structure definitions.
Action
Correct the source per the error message text.
W9999
A branch to an empty label just inside the loop-closing brace is a
branch out of the loop
Far mode valid only for C548
First instruction following XC must be a 1-word instruction
Open branch delay slot at end of section
Power of 2 required, next larger power of 2 assumed
Second instruction following XC must be a 1-word instruction
Section name absolute address set to 0
Section name is larger than 64K
Value truncated to byte size
D-18
Description
These are general warnings.
Action
Correct the source per the warning message text.
Appendix
AppendixEA
Linker Error Messages
This appendix lists the the linker error messages in alphabetical order according to the error message. In these listings, the symbol (...) represents the name
of an object that the linker is attempting to interact with when an error occurs.
A
absolute symbol (...) being redefined
Description
An absolute symbol cannot be redefined.
Action
Check the syntax of all expressions, and check the input directives for accuracy.
adding name (...) to multiple output sections
Description
The input section is mentioned twice in the SECTIONS directive.
ALIGN illegal in this context
Description
Alignment of a symbol is performed outside of a SECTIONS
directive.
alignment for (...) must be a power of 2
Description
Section alignment was not a power of 2.
Action
Make sure that in hexadecimal, all powers of 2 consist of the
integers 1, 2, 4, or 8 followed by a series of zero or more 0s.
E-1
Linker Error Messages
alignment for (...) redefined
Description
More than one alignment is supplied for a section.
attempt to decrement DOT
Description
A statement such as .– = value is supplied; this is illegal.
Assignments to dot can be used only to create holes.
B
bad fill value
Description
The fill value must be a 16-bit constant.
binding address (...) for section (...) is outside all memory on page
(...)
Description
Not every section falls within memory configured with the
MEMORY directive.
Action
If you are using a linker command file, check that MEMORY
and SECTIONS directives allow enough room to ensure that
no sections are being placed in unconfigured memory.
binding address (...) for section (...) overlays (...) at (...)
Description
Two sections overlap and cannot be allocated.
Action
If you are using a linker command file, check that MEMORY
and SECTIONS directives allow enough room to ensure that
no sections are being placed in unconfigured memory.
binding address for (...) redefined
Description
More than one binding value is supplied for a section.
binding address (...) incompatible with alignment for section (...)
Description
The section has an alignment requirement from an .align
directive or previous link. The binding address violates this
requirement.
blocking for (...) must be a power of 2
E-2
Description
Section blocking is not a power of 2
Action
Make sure that in hexadecimal, all powers of 2 consist of the
integers 1, 2, 4, or 8 followed by a series of zero or more 0s.
Linker Error Messages
blocking for (...) redefined
Description
More than one blocking value is supplied for a section.
C
–c requires fill value of 0 in .cinit (... overridden)
Description
The .cinit tables must be terminated with 0, therefore, the fill
value of the .cinit section must be 0.
cannot complete output file (...), write error
Description
This usually means that the file system is out of space.
cannot create output file (...)
Description
This usually indicates an illegal filename.
Action
Check spelling, pathname, environment variables, etc. The
filename must conform to operating system conventions.
cannot resize (...), section has initialized definition in (...)
Description
An initialized input section named .stack or .heap exists, preventing the linker from resizing the section.
cannot specify a page for a section within a GROUP
Description
A section was specified to a specific page within a group. The
entire group is treated as one unit, so the group may be specified to a page of memory, but the sections making up the
group cannot be handled individually.
cannot specify both binding and memory area for (...)
Description
Both binding and memory were specified. The two are mutually exclusive.
Action
If you wish the code to be placed at a specific address, use
binding only.
Linker Error Messages
E-3
Linker Error Messages
can’t align a section within GROUP – (...) not aligned
Description
A section in a group was specified for individual alignment.
The entire group is treated as one unit, so the group may be
aligned or bound to an address, but the sections making up
the group cannot be handled individually.
can’t align within UNION – section (...) not aligned
Description
A section in a union was specified for individual alignment.
The entire union is treated as one unit, so the union may be
aligned or bound to an address, but the sections making up
the union cannot be handled individually.
can’t allocate (...), size ... (page ...)
Description
A section can’t be allocated, because no existing configured
memory area is large enough to hold it.
Action
If you are using a linker command file, check that the
MEMORY and SECTIONS directives allow enough room to
ensure that no sections are being placed in unconfigured
memory.
can’t create map file (...)
Description
Usually indicates an illegal filename.
Action
Check spelling, pathname, environment variables, etc. The
filename must conform to operating system conventions.
can’t find input file filename
Description
The file, filename, is not in your PATH, is misspelled, etc.
Action
Check spelling, pathname, environment variables, etc. The
filename must conform to operating system conventions.
can’t open (...)
E-4
Description
The specified file does not exist.
Action
Check spelling, pathname, environment variables, etc. The
filename must conform to operating system conventions.
Linker Error Messages
can’t open filename
Description
The specified file does not exist.
Action
Check spelling, pathname, environment variables, etc. The
filename must conform to operating system conventions.
can’t read (...)
Description
The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
can’t seek (...)
Description
The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
can’t write (...)
Description
Disk may be full or protected.
Action
Check disk volume and protection.
command file nesting exceeded with file (...)
Description
Command file nesting is allowed up to 16 levels.
Linker Error Messages
E-5
Linker Error Messages
E
–e flag does not specify a legal symbol name (...)
Description
The –e option is not supplied with a valid symbol name as an
operand.
entry point other than _c_int00 specified
Description
For –c or –cr option only. A program entry point other than the
value of _c_int00 was supplied. The runtime conventions of
the compiler assume that _c_int00 is the one and only entry
point.
entry point symbol (...) undefined
Description
The symbol used with the –e option is not defined.
errors in input – (...) not built
Description
Previous errors prevent the creation of an output file.
F
fail to copy (...)
Description
The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
fail to read (...)
Description
The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
fail to seek (...)
E-6
Description
The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
Linker Error Messages
fail to skip (...)
Description
The file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
fail to write (...)
Description
The disk may be full or protected.
Action
Check disk volume and protection.
file (...) has no relocation information
Description
You have attempted to relink a file that was not linked with –r.
file (...) is of unknown type, magic number = (...)
Description
The binary input file is not a COFF file.
fill value for (...) redefined
Description
More than one fill value is supplied for an output section. Individual holes can be filled with different values with the section
definition.
I
–i path too long (...)
Description
The maximum number of characters in an –i path is 256.
illegal input character
Description
There is a control character or other unrecognized character
in the command file.
illegal memory attributes for (...)
Description
The attributes are not some combination of R, W, I, and X.
Linker Error Messages
E-7
Linker Error Messages
illegal operator in expression
Description
Review legal expression operators.
illegal option within SECTIONS
Description
The –l (lowercase L) option is the only option allowed within a
SECTIONS directive.
illegal relocation type (...) found in section(s) of file (...)
Description
The binary file is corrupt.
internal error (...)
Description
This linker has an internal error.
invalid archive size for file (...)
Description
The archive file is corrupt.
invalid path specified with –i flag
Description
The operand of the –i option (flag) is not a valid file or pathname.
invalid value for –f flag
Description
The value for –f option (flag) is not a 2-byte constant.
invalid value for –heap flag
Description
The value for –heap option (flag) is not a 2-byte constant.
invalid value for –stack flag
Description
The value for –stack option (flag) is not a 2-byte constant.
invalid value for –v flag
Description
The value for –v option (flag) is not a constant.
I/O error on output file (...)
E-8
Description
The disk may be full or protected.
Action
Check disk volume and protection.
Linker Error Messages
L
length redefined for memory area (...)
Description
A memory area in a MEMORY directive has more than one
length.
library (...) member (...) has no relocation information
Description
The library member has no relocation information. It is
possible for a library member to not have relocation information; this means that it cannot satisfy unresolved references in
other files when linking.
line number entry found for absolute symbol
Description
The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
load address for uninitialized section (...) ignored
Description
A load address is supplied for an uninitialized section. Uninitialized sections have no load addresses—only run addresses.
load address for UNION ignored
Description
UNION refers only to the section’s run address.
load allocation required for initialized UNION member (...)
Description
A load address is supplied for an initialized section in a union.
UNIONs refer to runtime allocation only. You must specify the
load address for all sections within a union separately.
M
–m flag does not specify a valid filename
Description
You did not specify a valid filename for the file you are writing
the output map file to.
making aux entry filename for symbol n out of sequence
Description
The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
Linker Error Messages
E-9
Linker Error Messages
memory area for (...) redefined
Description
More than one named memory allocation is supplied for an
output section.
memory page for (...) redefined
Description
More than one page allocation is supplied for a section.
memory attributes redefined for (...)
Description
More than one set of memory attributes is supplied for an output section.
memory types (...) and (...) on page (...) overlap
Description
Memory ranges on the same page overlap.
Action
If you are using a linker command file, check that MEMORY
and SECTIONS directives allow enough room to ensure that
no sections are being placed in unconfigured memory.
missing filename on –l; use –l <filename>
Description
No filename operand is supplied for the –l (lowercase L)
option.
misuse of DOT symbol in assignment instruction
Description
The ”.” symbol is used in an assignment statement that is outside the SECTIONS directive.
N
no allocation allowed for uninitialized UNION member
Description
E-10
A load address was supplied for an uninitialized section in a
union. An uninitialized section in a union gets its run address
from the UNION statement and has no load address, so no
load allocation is valid for the member.
Linker Error Messages
no allocation allowed with a GROUP–allocation for section (...)
ignored
Description
A section in a group was specified for individual allocation.
The entire group is treated as one unit, so the group may be
aligned or bound to an address, but the sections making up
the group cannot be handled individually.
no input files
Description
No COFF files were supplied. The linker cannot operate without at least one input COFF file.
no load address specified for (...); using run address
Description
No load address is supplied for an initialized section. If an initialized section has a run address only, the section is allocated to run and load at the same address.
no run allocation allowed for union member (...)
Description
A UNION defines the run address for all of its members; therefore, individual run allocations are illegal.
no string table in file filename
Description
The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
no symbol map produced – not enough memory
Description
Available memory is insufficient to produce the symbol list.
This is a nonfatal condition that prevents the generation of the
symbol list in the map file.
Linker Error Messages
E-11
Linker Error Messages
O
–o flag does not specify a valid file name : string
Description
The filename must follow the operating system file naming
conventions.
origin missing for memory area (...)
Description
An origin is not specified with the MEMORY directive. An
origin specifies the starting address of a memory range.
out of memory, aborting
Description
Your system does not have enough memory to perform all
required tasks.
Action
Try breaking the assembly language files into multiple smaller
files and do partial linking. See Section 7.16, Partial (Incremental) Linking, on page 7-70.
output file has no .bss section
Description
This is a warning. The .bss section is usually present in a
COFF file. There is no requirement for it to be present.
output file has no .data section
Description
This is a warning. The .data section is usually present in a
COFF file. There is no requirement for it to be present.
output file has no .text section
Description
This is a warning. The .text section is usually present in a
COFF file. There is no requirement for it to be present.
output file (...) not executable
Description
The output file created may have unresolved symbols or other
problems stemming from other errors. This condition is not fatal.
overwriting aux entry filename of symbol n
E-12
Description
The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
Linker Error Messages
P
PC-relative displacement overflow at address (...) in file (...)
Description
The relocation of a PC-relative jump resulted in a jump displacement too large to encode in the instruction.
R
–r incompatible with –s (–s ignored)
Description
Both the –r option and the –s option were used. Since the –s
option strips the relocation information and –r requests a relocatable object file, these options are in conflict with each other.
relocation entries out of order in section (...) of file (...)
Description
The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
relocation symbol not found: index (...), section (...), file (...)
Description
The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
S
section (...) at (...) overlays at address (...)
Description
Two sections overlap and cannot be allocated.
Action
If you are using a linker command file, check that MEMORY
and SECTIONS directives allow enough room to ensure that
no sections overlap.
section (...) enters unconfigured memory at address (...)
Description
A section can’t be allocated because no existing configured
memory area is large enough to hold it.
Action
If you are using a linker command file, check that MEMORY
and SECTIONS directives allow enough room to ensure that
no sections are being placed in unconfigured memory.
Linker Error Messages
E-13
Linker Error Messages
section (...) not built
Description
Most likely there is a syntax error in the SECTIONS directive.
section (...) not found
Description
An input section specified in a SECTIONS directive was not
found in the input file.
section (...) won’t fit into configured memory
Description
A section can’t be allocated, because no configured memory
area exists that is large enough to hold it.
Action
If you are using a linker command file, check that the
MEMORY and SECTIONS directives allow enough room to
ensure that no sections are being placed in unconfigured
memory.
seek to (...) failed
Description
The input file may be corrupt.
Action
If the input file is corrupt, try reassembling it.
semicolon required after assignment
Description
There is a syntax error in the command file.
statement ignored
Description
There is a syntax error in an expression.
symbol referencing errors — (...) not built
Description
Symbol references could not be resolved. Therefore, an
object module could not be built.
symbol (...) from file (...) being redefined
Description
A defined symbol is redefined in an assignment statement.
T
too few symbol names in string table for archive n
E-14
Description
The archive file may be corrupt.
Action
If the input file is corrupt, try recreating the archive.
Linker Error Messages
too many arguments – use a command file
Description
You used more than ten arguments on a command line or in
response to prompts.
too many –i options, 7 allowed
Action
More than seven –i options were used. Additional search directories can be specified with a C_DIR or A_DIR environment variable.
type flags for (...) redefined
Description
More than one section type is supplied for a section. Note that
type COPY has all of the attributes of type DSECT, so DSECT
need not be specified separately.
type flags not allowed for GROUP or UNION
Description
A type is specified for a section in a group or union. Special
section types apply to individual sections only.
U
–u does not specify a legal symbol name
Description
The –u option did not specify a legal symbol name that exists
in one of the files that you are linking.
unexpected EOF(end of file)
Description
There is a syntax error in the linker command file.
undefined symbol (...) first referenced in file (...)
Description
Either a referenced symbol is not defined, or the –r option was
not used. Unless the –r option is used, the linker requires that
all referenced symbols be defined. This condition prevents
the creation of an executable output file.
Action
Link using the –r option or define the symbol.
Linker Error Messages
E-15
Linker Error Messages
undefined symbol in expression
Description
An assignment statement contains an undefined symbol.
unrecognized option (...)
Action
Check the list of valid options.
Z
zero or missing length for memory area (...)
Description
E-16
A memory range defined with the MEMORY directive did not
have a nonzero length.
Running Title—Attribute Reference
Appendix
AppendixFA
Glossary
A
absolute address: An address that is permanently assigned to a
TMS320C54xt memory location.
absolute lister: A debugging tool that accepts linked files as input and
creates .abs files as output. These .abs files can be assembled to produce a listing that shows the absolute addresses of object code. Without
the tool, an absolute listing can be prepared with the use of many manual
operations.
algebraic: An instruction that the assembler translates into machine code.
alignment: A process in which the linker places an output section at an
address that falls on an n-bit boundary, where n is a power of 2. You can
specify alignment with the SECTIONS linker directive.
allocation: A process in which the linker calculates the final memory
addresses of output sections.
archive library: A collection of individual files that have been grouped into
a single file.
archiver: A software program that allows you to collect several individual
files into a single file called an archive library. The archiver also allows
you to delete, extract, or replace members of the archive library, as well
as to add new members.
ASCII: American Standard Code for Information Exchange. A standard
computer code for representing and exchanging alphanumeric information.
assembler: A software program that creates a machine-language program
from a source file that contains assembly language instructions, directives, and macro directives. The assembler substitutes absolute operation codes for symbolic operation codes, and absolute or relocatable
addresses for symbolic addresses.
assembly-time constant: A symbol that is assigned a constant value with
the .set directive.
Chapter Title—Attribute Reference
F-1
Glossary
assignment statement: A statement that assigns a value to a variable.
autoinitialization: The process of initializing global C variables (contained
in the .cinit section) before beginning program execution.
auxiliary entry: The extra entry that a symbol may have in the symbol table
and that contains additional information about the symbol (whether it is
a filename, a section name, a function name, etc.).
B
binding: A process in which you specify a distinct address for an output section or a symbol.
block: A set of declarations and statements that are grouped together with
braces.
.bss: One of the default COFF sections. You can use the .bss directive to
reserve a specified amount of space in the memory map that can later
be used for storing data. The .bss section is uninitialized.
C
C compiler: A program that translates C source statements into assembly
language source statements.
COFF: Common object file format. A binary object file format that promotes
modular programming by supporting the concept of sections.
command file: A file that contains options, filenames, directives, or comments for the linker or hex conversion utility.
comment: A source statement (or portion of a source statement) that is
used to document or improve readability of a source file. Comments are
not compiled, assembled, or linked; they have no effect on the object file.
common object file format:
See COFF.
conditional processing: A method of processing one block of source code
or an alternate block of source code, according to the evaluation of a
specified expression.
configured memory: Memory that the linker has specified for allocation.
constant:
A numeric value that can be used as an operand.
cross-reference listing: An output file created by the assembler that lists
the symbols that were defined, what line they were defined on, which
lines referenced them, and their final values.
F-2
Glossary
D
.data: One of the default COFF sections. The .data section is an initialized
section that contains initialized data. You can use the .data directive to
assemble code into the .data section.
directives: Special-purpose commands that control the actions and
functions of a software tool (as opposed to assembly language instructions, which control the actions of a device).
E
emulator: A hardware development system that emulates TMS320C54x
operation.
entry point: The starting execution point in target memory.
executable module: An object file that has been linked and can be
executed in a TMS320C54x system.
expression: A constant, a symbol, or a series of constants and symbols
separated by arithmetic operators.
external symbol: A symbol that is used in the current program module but
is defined in a different program module.
F
field:
For the TMS320C54x, a software-configurable data type whose length
can be programmed to be any value in the range of 1–16 bits.
file header: A portion of a COFF object file that contains general information
about the object file (such as the number of section headers, the type of
system the object file can be downloaded to, the number of symbols in
the symbol table, and the symbol table’s starting address).
G
global: A kind of symbol that is either 1) defined in the current module and
accessed in another, or 2) accessed in the current module but defined
in another.
GROUP: An option of the SECTIONS directive that forces specified output
sections to be allocated contiguously (as a group).
Glossary
F-3
Glossary
H
hex conversion utility: A program that accepts COFF files and converts
them into one of several standard ASCII hexadecimal formats suitable
for loading into an EPROM programmer.
high-level language debugging: The ability of a compiler to retain symbolic and high-level language information (such as type and function
definitions) so that a debugging tool can use this information.
hole:
An area between the input sections that compose an output section
that contains no actual code or data.
I
incremental linking: Linking files that will be linked in several passes. Often
this means a very large file that will have sections linked and then will
have the sections linked together.
initialized section: A COFF section that contains executable code or initialized data. An initialized section can be built up with the .data, .text, or
.sect directive.
input section: A section from an object file that will be linked into an
executable module.
L
label: A symbol that begins in column 1 of a source statement and corresponds to the address of that statement.
line-number entry: An entry in a COFF output module that maps lines of
assembly code back to the original C source file that created them.
linker: A software tool that combines object files to form an object module
that can be allocated into TMS320C54x system memory and executed
by the device.
listing file: An output file, created by the assembler, that lists source statements, their line numbers, and their effects on the SPC.
loader: A device that loads an executable module into TMS320C54x system
memory.
F-4
Glossary
M
macro: A user-defined routine that can be used as an instruction.
macro call: The process of invoking a macro.
macro definition: A block of source statements that define the name and
the code that make up a macro.
macro expansion: The source statements that are substituted for the
macro call and are subsequently assembled.
macro library: An archive library composed of macros. Each file in the
library must contain one macro; its name must be the same as the macro
name it defines, and it must have an extension of .asm.
magic number: A COFF file header entry that identifies an object file as a
module that can be executed by the TMS320C54x.
map file: An output file, created by the linker, that shows the memory
configuration, section composition, and section allocation, as well as
symbols and the addresses at which they were defined.
member: The elements or variables of a structure, union, archive, or enumeration.
memory map: A map of target system memory space, which is partitioned
into functional blocks.
mnemonic: An instruction name that the assembler translates into machine
code.
model statement: Instructions or assembler directives in a macro definition
that are assembled each time a macro is invoked.
N
named section: An initialized section that is defined with a .sect directive.
O
object file: A file that has been assembled or linked and contains machinelanguage object code.
object format converter: A program that converts COFF object files into
Intel format or Tektronix format object files.
Glossary
F-5
Glossary
object library: An archive library made up of individual object files.
operands: The arguments, or parameters, of an assembly language
instruction, assembler directive, or macro directive.
optional header: A portion of a COFF object file that the linker uses to
perform relocation at download time.
options: Command parameters that allow you to request additional or
specific functions when you invoke a software tool.
output module: A linked, executable object file that can be downloaded and
executed on a target system.
output section: A final, allocated section in a linked, executable module.
overlay page: A section of physical memory that is mapped into the same
address range as another section of memory. A hardware switch determines which range is active.
P
partial linking: The linking of a file that will be linked again.
Q
quiet run: Suppresses the normal banner and the progress information.
R
RAM model: An autoinitialization model used by the linker when linking C
code. The linker uses this model when you invoke the linker with the –cr
option. The RAM model allows variables to be initialized at load time
instead of runtime.
raw data: Executable code or initialized data in an output section.
relocation: A process in which the linker adjusts all the references to a symbol when the symbol’s address changes.
ROM model: An autoinitialization model used by the linker when linking C
code. The linker uses this model when you invoke the linker with the –c
option. In the ROM model, the linker loads the .cinit section of data tables
into memory, and variables are initialized at runtime.
F-6
Glossary
ROM width: The width (in bits) of each output file, or, more specifically, the
width of a single data value in the file. The ROM width determines how
the utility partitions the data into output files. After the target words are
mapped to memory words, the memory words are broken into one or
more output files. The number of output files is determined by the ROM
width.
run address: The address where a section runs.
S
section: A relocatable block of code or data that will ultimately occupy contiguous space in the TMS320C54x memory map.
section header: A portion of a COFF object file that contains information
about a section in the file. Each section has its own header; the header
points to the section’s starting address, contains the section’s size, etc.
section program counter:
See SPC.
sign extend: To fill the unused MSBs of a value with the value’s sign bit.
simulator: A software development system that simulates TMS320C54x
operation.
source file: A file that contains C code or assembly language code that will
be compiled or assembled to form an object file.
SPC (Section Program counter): An element of the assembler that keeps
track of the current location within a section; each section has its own
SPC.
static: A kind of variable whose scope is confined to a function or a program.
The values of static variables are not discarded when the function or program is exited; their previous value is resumed when the function or program is re-entered.
storage class: Any entry in the symbol table that indicates how to access
a symbol.
string table: A table that stores symbol names that are longer than 8 characters (symbol names of 8 characters or longer cannot be stored in the
symbol table; instead, they are stored in the string table). The name portion of the symbol’s entry points to the location of the string in the string
table.
structure: A collection of one or more variables grouped together under a
single name.
Glossary
F-7
Glossary
subsection: A smaller section within a section offering tighter control of the
memory map. See also section.
symbol: A string of alphanumeric characters that represents an address or
a value.
symbolic debugging: The ability of a software tool to retain symbolic information so that it can be used by a debugging tool such as a simulator or
an emulator.
symbol table: A portion of a COFF object file that contains information
about the symbols that are defined and used by the file.
T
tag:
An optional type name that can be assigned to a structure, union, or
enumeration.
target memory: Physical memory in a TMS320C54x system into which executable object code is loaded.
.text:
One of the default COFF sections. The .text section is an initialized
section that contains executable code. You can use the .text directive to
assemble code into the .text section.
U
unconfigured memory: Memory that is not defined as part of the memory
map and cannot be loaded with code or data.
uninitialized section: A COFF section that reserves space in the memory
map but that has no actual contents. These sections are built up with the
.bss and .usect directives.
UNION: An option of the SECTIONS directive that causes the linker to allocate the same address to multiple sections.
union:
A variable that may hold objects of different types and sizes.
unsigned: A kind of value that is treated as a positive number, regardless
of its actual sign.
W
well-defined expression: An expression that contains only symbols or
assembly-time constants that have been defined before they appear in
the expression.
word: A 16-bit addressable location in target memory.
F-8
Index
Index
–?
assembler option 3-5
linker option 7-6
; in assembly language source
# operand prefix
$ symbol for SPC
3-14
3-13
3-20
–@ assembler option
3-4
* in assembly language source
* operand prefix
3-14
3-13
A
–a
archiver command 6-4
assembler option 3-5
hex conversion utility option
linker option 7-8
A_DIR environment variable
10-40
3-9, 7-13, 7-16
abs500 command. See absolute lister, invoking
absolute address, defined
F-1
absolute lister
creating the absolute listing file
defined F-1
described 1-4
development flow 8-2
example 8-5 to 8-10
invoking 8-3
options 8-3
absolute listing
–a assembler option
producing 8-2
absolute output module
producing 7-8
relocatable 7-9
3-5
3-4, 8-2
algebraic
defined F-1
source file 3-6
translation from mnemonic 11-1 to 11-10
.algebraic directive 4-23, 4-26
.align directive 4-15, 4-27
compatibility with C1x/C2x/C2xx/C5x 4-8
alignment 4-15 to 4-16, 4-27
defined F-1
linker 7-38
allocation 4-30
alignment 4-27, 7-38
binding 7-36 to 7-78
blocking 7-38
default algorithm 7-58 to 7-60
defined F-1
described 2-3
GROUP 7-50
memory default 2-14, 7-37
sections 7-35 to 7-43
UNION 7-48
alternate directories
linker 7-14
naming with –i option 3-8
naming with A_DIR 3-9
naming with directives 3-8 to 3-10
–ar linker option 7-9
ar500 command 6-4
archive library
allocating individual members 7-43
alternate directory 7-13
back referencing 7-20
defined F-1
exhaustively reading 7-20
macros 4-68
object 7-25 to 7-26
types of files 6-2
Index-1
Index
archiver 1-3
commands 6-4
defined F-1
examples 6-6
in the development flow
invoking 6-4
options 6-5
overview 6-2
arithmetic operators
6-3
3-26
–arr hex conversion utility option
10-29
array definitions A-26
COFF limitation A-26
ASCII-Hex object format
10-40
.asg directive 4-21, 4-28
listing control 4-17, 4-41
use in macros 5-7
asm500 command
3-4
assembler
built-in functions 3-30, 5-8
character strings 3-18
constants 3-15 to 3-17
cross-reference listings 3-7, 3-37
defined F-1
described 1-3
error messages D-1 to D-18
expressions 3-25, 3-26, 3-27
extended addressing support 3-32
handling COFF sections 2-5 to 2-12
handling pipeline conflicts 3-6
in the development flow 3-3
invoking 3-4
LDX pseudo-op 3-32
macros 5-1 to 5-26
options 3-4
additional usage information 3-8, 3-20, 3-33,
3-37
output listing
directive listing 4-17 to 4-18, 4-41 to 4-100
example 3-35
overview 3-2
relocation
at runtime 2-19
described 2-16 to 2-18
during linking 7-8
remarks, suppressing 4-75
sections directives 2-5 to 2-12
source listings 3-33 to 3-36
suppressing remarks 3-6, 4-75
symbols 3-19, 3-21
Index-2
assembler directives 4-1 to 4-25
absolute lister
.setsect 8-8
.setsym 8-8
aligning the section program counter
(SPC) 4-15 to 4-16
.align 4-15, 4-27
.even 4-15, 4-27
compatibility with C1x/C2x/C2xx/C5x 4-8
default directive 2-5
defining assembly-time symbols 4-21 to 4-22
.asg 4-21, 4-28
.endstruct 4-21, 4-86
.endunion 4-22, 4-92
.equ 4-21, 4-81
.eval 4-21, 4-28
.label 4-21, 4-60
.set 4-21, 4-81
.struct 4-21, 4-86
.tag 4-21, 4-22, 4-86, 4-92
.union 4-22, 4-92
defining sections 4-9 to 4-10
.bss 2-5, 4-9, 4-30
.clink 4-9, 4-34
.data 2-5, 4-9, 4-39
.sect 2-5, 4-9, 4-80
.text 2-5, 4-9, 4-90
.usect 2-5, 4-9, 4-95
enabling conditional assembly 4-20
.break 4-20, 4-66
.else 4-20, 4-56
.elseif 4-20, 4-56
.endif 4-20, 4-56
.endloop 4-20, 4-66
.if 4-20, 4-56
.loop 4-20, 4-66
example 2-10 to 2-12
formatting the output listing 4-17 to 4-18
.drlist 4-17, 4-41
.drnolist 4-17, 4-41
.fclist 4-17, 4-46
.fcnolist 4-17, 4-46
.length 4-17, 4-61
.list 4-17, 4-62
.mlist 4-17, 4-70
.mnolist 4-17, 4-70
.nolist 4-17, 4-62
.option 4-17, 4-76
.page 4-18, 4-78
.sslist 4-18, 4-83
Index
assembler directives, formatting the output listing
(continued)
.ssnolist 4-18, 4-83
.tab 4-18, 4-89
.title 4-18, 4-91
.width 4-18, 4-61
initializing constants 4-11 to 4-14
.bes 4-11, 4-82
.byte 4-12, 4-33
.char 4-12, 4-33
.double 4-13, 4-40
.field 4-12, 4-47
.float 4-12, 4-50
.half 4-13, 4-54
.int 4-13, 4-58
.ldouble 4-13, 4-40
.long 4-13, 4-64
.pstring 4-13, 4-85
.short 4-13, 4-54
.space 4-11, 4-82
.string 4-13, 4-85
.ubyte 4-12, 4-33
.uchar 4-12, 4-33
.uhalf 4-13, 4-54
.uint 4-13, 4-58
.ulong 4-13, 4-64
.ushort 4-13, 4-54
.uword 4-13, 4-58
.word 4-13, 4-58
.xfloat 4-12, 4-50
.xlong 4-13, 4-64
miscellaneous 4-23 to 4-24
.algebraic 4-23, 4-26
.c_mode 4-23, 4-35 to 4-100
.emsg 4-24, 4-42
.end 4-23, 4-44
.far_mode 4-23, 4-45
.mmregs 4-23, 4-71
.mmsg 4-24, 4-42
.newblock 4-23, 4-74
.noremark 4-23, 4-75
.remark 4-23, 4-75
.sblock 4-23, 4-79
.version 4-23
.wmsg 4-24, 4-42
assembler directives (continued)
referencing other files 4-19
.copy 4-19, 4-36
.def 4-19, 4-51
.global 4-19, 4-51
.include 4-19, 4-36
.ref 4-19, 4-51
summary table 4-2 to 4-7
assembly-time constants 4-81
defined F-1
assignment statement
defined F-2
expressions 7-63 to 7-64
attr MEMORY specification 7-29
attributes 3-38, 7-29
autoinitialization
defined F-2
described 7-73 to 7-74
specifying type 7-10
auxiliary entry
defined F-2
described A-23 to A-28
B
–b linker option 7-10
.bes directive 4-11, 4-82
big-endian ordering 10-14
binary integer constants 3-15
binding
defined F-2
named memory 7-36
sections 7-36
–bkr hex conversion utility option 10-29
block
auxiliary table entry A-26, A-27
defined F-2
described A-17
reference B-3
.block symbolic debugging directive B-3
blocking 4-30, 7-38
–boot hex conversion utility option 10-29
boot loader. See on-chip boot loader
boot table. See on-chip boot loader, boot table
boot.obj 7-72, 7-75
–bootorg hex conversion utility option 10-29, 10-32
–bootpage hex conversion utility option 10-29
Index-3
Index
.break directive 4-20, 4-66
listing control 4-17, 4-41
use in macros 5-15
–bscr hex conversion utility option 10-29
.bss directive 4-9, 4-30
compatibility with C1x/C2x/C2xx/C5x 4-8
in sections 2-5
linker definition 7-65
.bss section 4-9, 4-30, A-3
defined F-2
holes 7-68
initializing 7-68
built-in functions 3-30, 5-8
–byte hex conversion utility option 10-37
.byte directive 4-12, 4-33
limiting listing with .option directive 4-17, 4-76
C
C
memory pool 7-12, 7-73
system stack 7-18, 7-73
–c
assembler option 3-5
linker option 7-10, 7-65
C code, linking 7-72 to 7-75
C compiler
block definitions B-3
COFF technical details A-1
defined F-2
enumeration definitions B-9
file identification B-4
function definitions B-5
line-number entries B-7
line-number information A-12 to A-13
linking 7-10, 7-72 to 7-75
member definitions B-8
special symbols A-16 to A-17
storage classes A-19
structure definitions B-9
symbol table entries B-11
union definitions B-9
C_DIR environment variable 7-13 to 7-16
_c_int00 7-11, 7-75
.c_mode directive 4-23, 4-35
C54X_A_DIR environment variable 3-9, 7-13
C54X_C_DIR environment variable 7-13 to 7-16
Index-4
.char directive
4-12, 4-33
character
constant 3-16
string 3-18
.cinit
section 7-73 to 7-74
tables 7-73
cinit symbol
7-73 to 7-74
.clink directive
4-9, 4-34
COFF
array limitation A-26
auxiliary entries A-23 to A-28
conversion to hexadecimal format 10-1 to 10-46
See also hex conversion utility
default allocation 7-58
defined F-2
file structure A-2 to A-4
file types 2-2
headers
file A-5
optional A-6
section A-7 to A-9
in the development flow 7-3, 10-2
initialized sections 2-7
line number entries B-7
linker 7-1
loading a program 2-20
object file example A-3
relocation 2-16 to 2-18, A-10 to A-11
runtime relocation 2-19
sections
allocation 2-3
assembler 2-5 to 2-12
described 2-3 to 2-4
linker 2-13 to 2-15
named 2-8, 7-66
special types 7-61
uninitialized 2-5 to 2-6
storage classes A-19
string table A-18
symbol table
structure and content A-14 to A-28
symbol values A-20
symbolic debugging A-12 to A-13
symbols 2-21 to 2-22, A-16 to A-17
technical details A-1 to A-28
type entry A-21
uninitialized sections 2-5 to 2-6
Index
command file
defined F-2
hex conversion utility 10-7 to 10-8
linker
constants in 7-24
described 7-21 to 7-24
examples 7-76 to 7-78
invoking 7-4
reserved words 7-24
comments
defined F-2
extending past page width 4-61
field 3-14
in a linker command file 7-22
in assembly language source code 3-14
in macros 5-19
common object file format. See COFF
conditional blocks 5-15
assembly directives 4-20
listing of false conditional blocks 4-46
conditional processing
assembly directives
in macros 5-15 to 5-16
maximum nesting levels 5-15
defined F-2
expressions 3-27
configured memory
defined F-2
described 7-59
.const 7-34
constant
assembly-time 4-81
binary integers 3-15
character 3-16
decimal integers 3-16
defined F-2
described 3-15
floating-point 4-50
hexadecimal integers 3-16
in command files 7-24
octal integers 3-15
symbolic 3-19, 3-20
.copy directive 3-8, 4-19, 4-36
copy file
.copy directive 3-8, 4-36
–hc assembler option 3-5
–i option 3-6, 3-8
COPY section 7-61
–cr linker option 7-10, 7-65
cross-reference lister
creating the cross-reference listing 9-2
example 9-4
in the development flow 9-2
invoking 9-3
options 9-3
symbol attributes 9-6
cross-reference listing
assembler option 3-7
defined F-2
described 3-37
producing with the .option directive 4-18, 4-76
producing with cross-reference lister 9-1 to 9-6
D
–d
archiver command 6-4
assembler option 3-5, 3-20
.data directive 4-9, 4-39
data memory 7-27
.data section 2-5, 4-9, 4-39, A-3
defined F-3
symbols 7-65
decimal integer constants 3-16
.def directive 4-19, 4-51
identifying external symbols 2-21
default
allocation 7-58
fill value for holes 7-11
memory allocation 2-14
MEMORY configuration 7-58
MEMORY model 7-27
section. See COFF, sections
SECTIONS configuration 7-32, 7-58
development
flow 1-2, 6-3, 7-3
tools 1-2
directives
See also assembler directives
defined F-3
linker
MEMORY 2-13, 7-27 to 7-31
SECTIONS 2-13, 7-32 to 7-43
symbolic debugging B-3 to B-13
directory search algorithm
assembler 3-8
linker 7-13
.double directive 4-13, 4-40
Index-5
Index
.drlist directive 4-17, 4-41
use in macros 5-21
.drnolist directive 4-17, 4-41
same effect with .option directive
use in macros 5-21
DSECT section
7-61
dummy section
7-61
4-17
E
–e
absolute lister option 8-3
hex conversion utility option
linker option 7-11
.edata linker symbol
10-32
7-65
.else directive 4-20, 4-56
use in macros 5-15
.elseif directive 4-20, 4-56
use in macros 5-15
.emsg directive 4-24, 4-42, 5-19
listing control 4-17, 4-41
emulator, defined
F-3
.end, linker symbol
.end directive
7-65
4-23, 4-44
.endblock symbolic debugging directive
.endfunc symbolic debugging directive
.endif directive 4-20, 4-56
use in macros 5-15
.endloop directive 4-20, 4-66
use in macros 5-15
.endm directive
4-21, 4-86
.endunion directive
4-22, 4-92
entry point
defined F-3
value assigned
3-32
F
7-11, 7-75
enumeration definitions
B-9
environment variables
A_DIR 3-9, 7-13
C_DIR 7-13, 7-15
C54X_A_DIR 3-9, 7-13
C54X_C_DIR 7-13
.eos symbolic debugging directive
Index-6
B-5
5-3
.endstruct directive
.equ directive
B-3
error messages
displayed by assembler D-1 to D-18
displayed by linker E-1 to E-16
generating 4-24, 4-42
hex conversion utility 10-45
producing in macros 5-19
.etag symbolic debugging directive B-9
.etext linker symbol 7-65
.eval directive 4-21, 4-28
listing control 4-17, 4-41
use in macros 5-8
evaluation of expressions 3-25
.even directive 4-15, 4-27
executable module, defined F-3
executable output 7-8, 7-9
expression
absolute and relocatable 3-28
arithmetic operators in 3-26
conditional 3-27
conditional operators in 3-27
defined F-3
described 3-25
illegal 3-28
linker 7-63 to 7-64
overflow 3-26
precedence of operators 3-25
relocatable symbols in 3-28
underflow 3-26
well-defined 3-27
extended addressing, loading values into
external symbols 2-21
defined F-3
relocatable 3-28
4-21, 4-81
B-9
–f linker option 7-11
.far_mode directive 4-23, 4-45
.fclist directive 4-17, 4-46
listing control 4-17, 4-41
use in macros 5-21
.fcnolist directive 4-17, 4-46
listing control 4-17, 4-41
use in macros 5-21
field, defined F-3
.field directive 4-12, 4-47
compatibility with C1x/C2x/C2xx/C5x
4-8
Index
file
H
copy 3-5
identification B-4
include 3-5
–h
assembler option 3-5
linker option 7-12
file header
defined F-3
structure A-5
.file symbolic debugging directive
.half directive 4-13, 4-54
limiting listing with .option directive
B-4
filenames
as character strings 3-18
copy/include files 3-8
extensions, changing defaults 8-3
list file 3-4
macros, in macro libraries 5-14
object code 3-4
files ROMS specification
–hc assembler option
–heap linker option
.sysmem section
described 7-12
10-18
MEMORY specification 7-30
ROMS specification 10-17
value
default 7-11
explicit initialization 7-69
setting 7-11
10-27
fill value. See hole
.float directive 4-12, 4-50
compatibility with C1x/C2x/C2xx/C5x
floating-point constants
function definitions
functions, built-in
B-5
A-17, A-26, A-27, B-5
3-30, 5-9
G
–g
assembler option 3-5
linker option 7-12
global
defined F-3
symbols 7-12
.global directive 4-19, 4-51
identifying external symbols
GROUP
defined F-3
linker directive
4-8
4-50
.func symbolic debugging directive
7-73
hex conversion utility
command file 10-7 to 10-8
controlling ROM device address 10-35 to 10-38
data width 10-10
defined F-4
described 1-3
development flow 10-2
error messages 10-45
examples
avoiding holes with multiple sections C-8 to
C-9
building a hex command file for two 8-bit
EPROMS C-3 to C-7
generating a boot table C-10 to C-16, C-17
to C-24
image mode 10-26 to 10-27
invoking 10-3 to 10-6
memory width 10-10 to 10-11
object formats 10-39 to 10-44
on-chip boot loader 10-28 to 10-34
options 10-4 to 10-6
ordering memory words 10-14 to 10-15
output filenames 10-24
ROM width 10-11 to 10-13
ROMS directive 10-16 to 10-21
SECTIONS directive 10-22 to 10-23
target width 10-10
hex500 command
2-21
10-3
hexadecimal integer constants
–hi assembler option
7-50
3-5
–help
assembler option 3-5
linker option 7-6
fill
–fill hex conversion utility option
4-17
3-16
3-5
high-level language debugging, defined
F-4
Index-7
Index
hole
creating 7-66 to 7-68
default fill value 7-11
defined F-4
fill value, linker SECTIONS directive
filling 7-68 to 7-69
in output sections 7-66 to 7-69
in uninitialized sections 7-69
keywords
allocation parameters 7-35
load 2-19, 7-35, 7-44
run 2-19, 7-35, 7-44 to 7-46
7-33
I
–i
assembler option 3-6, 3-8
hex conversion utility option 10-41
linker option 7-14
I MEMORY attribute 7-29
.if directive 4-20, 4-56
use in macros 5-15
–image hex conversion utility option 10-26
.include directive 3-8, 4-19, 4-36
include files 3-5, 3-8, 4-36
incremental linking
defined F-4
described 7-70 to 7-71
initialized section
defined F-4
described 7-66
initialized sections 2-7
.data 2-7, 4-39
.sect 2-7
.text 2-7, 4-90
.sect 4-80
input
linker 7-3, 7-25 to 7-26
section
defined F-4
described 7-38 to 7-40
.int directive 4-13, 4-58
Intel object format 10-41
J
–j linker option
7-16
K
–k linker option
Index-8
7-16
L
–l
assembler option 3-6, 3-33
cross-reference lister option 9-3
linker option 7-13
label
case sensitivity 3-5
cross-reference list 3-37
defined F-4
field 3-12
in assembly language source 3-12
local 3-22, 4-74
symbols used as 3-19
syntax 3-12
using with .byte directive 4-33
.label directive 4-21, 4-60
.ldouble directive 4-13, 4-40
LDX pseudo-op 3-32
length
MEMORY specification 7-30
ROMS specification 10-17
.length directive 4-17, 4-61
listing control 4-17
library search algorithm 7-13
library-build utility, described 1-3
.line symbolic debugging directive B-7
line-number, table structure A-12 to A-13
line-number entry
defined F-4
directive B-7
linker
| operator 7-40
allocation to multiple memory ranges 7-40
archive members, allocating 7-43
assigning symbols 7-62
assignment expressions 7-62, 7-63 to 7-64
automatic splitting of output sections 7-41
>> operator 7-41
C code 7-10, 7-72 to 7-75
COFF 7-1
command files 7-4, 7-21 to 7-24, 7-76
configured memory 7-59
defined F-4
Index
linker (continued)
described 1-3
error messages E-1 to E-16
examples 7-76 to 7-78
GROUP statement 7-48, 7-50
handling COFF sections 2-13 to 2-15
in the development flow 7-3
input 7-3, 7-21 to 7-24
invoking 7-4 to 7-5
keywords 7-24, 7-44 to 7-46, 7-56
loading a program 2-20
MEMORY directive 2-13, 7-27 to 7-31
object libraries 7-25 to 7-26
operators 7-64
options
described 7-8 to 7-20
summary table 7-6 to 7-7
output 7-3, 7-17, 7-76
overlay pages 7-53
overview 7-2
partial linking 7-70 to 7-71
section runtime address 7-44
sections
in memory map 2-15
output 7-59
special 7-61
SECTIONS directive 2-13, 7-32 to 7-43
symbols 2-21 to 2-22, 7-62, 7-65
unconfigured memory 7-61
UNION statement 7-48 to 7-50
.list directive 4-17, 4-62
same effect with .option directive
lister
absolute 8-1 to 8-10
cross-reference 9-1 to 9-6
listing
cross-reference listing 4-18, 4-76
enabling 4-62
file 4-17 to 4-18, 4-41
creating with the –l option 3-6
defined F-4
format 3-33 to 3-36
list options 4-76
macro listing 4-68, 4-70
page eject 4-78
page length 4-61
page width 4-61
substitution symbols 4-83
suppressing 4-62
tab size 4-89
4-18
little-endian ordering 10-14
lnk500 command 7-4
load address of a section
described 7-44
referring to with a label 7-45 to 7-47
load linker keyword 2-19, 7-44 to 7-46
loader, defined F-4
loading a program 2-20
local labels 3-22
logical operators 3-26
.long directive 4-13, 4-64
compatibility with C1x/C2x/C2xx/C5x 4-8
limiting listing with .option directive 4-17, 4-76
.loop directive 4-20, 4-66
use in macros 5-15
M
–m linker option 7-16
–m1 hex conversion utility option 10-42
–m2 hex conversion utility option 10-42
–m3 hex conversion utility option 10-42
macro
comments 5-19
conditional assembly 5-15 to 5-16
defined F-5
defining 5-3
described 5-2
directives summary 5-25
disabling macro expansion listing 4-17, 4-76
formatting the output listing 5-21
labels 5-17 to 5-18
libraries 5-14, 6-2
.mlib assembler directive 3-8
.mlist assembler directive 4-70
nested 5-22 to 5-24
parameters 5-6 to 5-13
producing messages 5-19
recursive 5-22 to 5-24
substitution symbols 5-6 to 5-13
using a macro 5-2
macro call, defined F-5
macro definition, defined F-5
.macro directive 4-67, 5-3
summary table 5-25
macro expansion, defined F-5
macro library, defined F-5
magic number, defined F-5
Index-9
Index
_main 7-11
malloc() 7-12, 7-73
map file
creating 7-16
defined F-5
example 7-78
math functions 3-30
member, defined F-5
.member symbolic debugging directive B-8
memory
allocation
default 2-14
described 7-58 to 7-60
map
defined F-5
described 2-15
model 7-27
named 7-37
pool, C language 7-12, 7-73
unconfigured 7-28
widths
described 10-10 to 10-11
ordering memory words 10-14 to 10-15
ROM width 10-11 to 10-13, 10-17
target width 10-10
word ordering 10-14 to 10-15
MEMORY linker directive
default model 7-27, 7-58
described 2-13, 7-27 to 7-31
overlay pages 7-53 to 7-57
PAGE option 7-27 to 7-29, 7-60
syntax 7-27 to 7-31
memory ranges
allocation to multiple 7-40
defined 7-27
MEMORY directive 7-29
messages
assembler D-1 to D-18
linker E-1 to E-16
.mexit directive 5-3
–mf assembler option 3-6
–mg assembler option 3-6
.mlib directive 4-68, 5-14
use in macros 3-8
.mlist directive 4-17, 4-70
listing control 4-17, 4-41
use in macros 5-21
.mmregs directive 4-23, 4-71
Index-10
.mmsg directive 4-24, 4-42, 5-19
listing control 4-17, 4-41
mnem2alg command 11-4
mnemonic
defined F-5
field 3-12
translation to algebraic 11-1 to 11-10
mnemonic-to-algebraic translator utility. See translator
.mnolist directive 4-17, 4-70
listing control 4-17, 4-41
use in macros 5-21
model statement, defined F-5
Motorola-S object format 10-42
N
name MEMORY specification 7-29
named sections 2-8
COFF format A-3
defined F-5
.sect directive 2-8, 4-80
.usect directive 2-8, 4-95
nested macros 5-22
.newblock directive 4-23, 4-74
.no_remark directive 4-23
.nolist directive 4-17, 4-62
same effect with .option directive 4-17
NOLOAD section 7-61
.noremark directive 4-75
O
–o linker option 7-17
object
code source listing 3-34
formats
address bits 10-39
ASCII-Hex 10-40
Intel 10-41
Motorola-S 10-42
output width 10-39
Tektronix 10-44
TI-Tagged 10-43
library
altering search algorithm
defined F-6
described 7-25 to 7-26
7-13
Index
object, library (continued)
runtime support 7-72
using the archiver to build
object file, defined
6-2
F-5
object format converter, defined
octal integer constants
F-5
3-15
on-chip boot loader
boot table 10-28 to 10-34
booting from device peripheral 10-32
booting from EPROM 10-34
booting from the parallel port 10-34
booting from the serial port 10-33
controlling ROM device address 10-36 to 10-38
description 10-28, 10-33 to 10-35
options
–e 10-32
summary 10-29
setting the entry point 10-32
using the boot loader 10-33 to 10-35
operands
defined F-6
field 3-13
immediate addressing 3-13
label 3-19
local label 3-22
prefixes 3-13
source statement format 3-13
operator precedence order
.option directive
P
3-26
4-17, 4-76
optional header
defined F-6
format A-6
options
absolute lister 8-3
archiver 6-5
assembler 3-4
cross-reference lister 9-3
defined F-6
hex conversion utility 10-4 to 10-6
linker 7-6 to 7-20
translator 11-4
–order hex conversion utility option
ordering memory words
10-15
10-14 to 10-15
origin
MEMORY specification 7-29
ROMS specification 10-17
output
executable 7-8 to 7-9
hex conversion utility 10-24
linker 7-3, 7-17, 7-76
module
defined F-6
name 7-17
section
allocation 7-35 to 7-43
defined F-6
displaying a message 7-19
rules 7-59
output listing 4-17 to 4-18
output sections, splitting 7-41
overflow in an expression 3-26
overlay page
defined F-6
described 7-53 to 7-57
using the SECTIONS directive 7-55 to 7-56
overlaying sections 7-48 to 7-50
paddr SECTIONS specification 10-23
page
eject 4-78
length 4-61
title 4-91
width 4-61
.page directive 4-18, 4-78
PAGE option MEMORY directive 7-27 to 7-29,
7-56 to 7-58, 7-60
PAGE ROMS specification 10-16
pages
overlay 7-53 to 7-57
PAGE syntax 7-56 to 7-58
parentheses in expressions 3-25
partial linking
defined F-6
described 7-70 to 7-71
path. See alternate directories; environment variables
pipeline conflicts 3-6
precedence groups 3-25
predefined names, –d assembler option 3-5
prefixes for operands 3-13
program counters. See SPC
program memory 7-27
Index-11
Index
.pstring directive
4-13, 4-85
–pw assembler option
3-6
Q
–q
absolute lister option 8-3
archiver option 6-5
assembler option 3-6
cross-reference lister option
linker option 7-17
9-3
quiet run 3-6
defined F-6
linker 7-17
R
–r
archiver command 6-4
assembler option 3-6, 4-75
linker option 7-9, 7-70 to 7-71
R MEMORY attribute
7-29
RAM model
autoinitialization 7-73
defined F-6
raw data, defined
F-6
recursive macros
5-22
.ref directive 4-19, 4-51
identifying external symbols
register symbols
2-21
3-20
relational operators
3-27
relocatable
output module 7-9
symbols 3-28
relocation
at runtime 2-19
capabilities 7-8 to 7-9
defined F-6
sections 2-16 to 2-18
structuring information A-10 to A-11
.remark directive
4-23, 4-75
remarks, suppressing
reserved words, linker
resetting local labels
Index-12
4-75
7-24
4-74
ROM
device address 10-35 to 10-38
model
autoinitialization 7-74
defined F-6
width
defined F-7
described 10-11 to 10-13
romname ROMS specification 10-16
ROMS hex conversion utility directive 10-16 to
10-21
romwidth ROMS specification 10-17
rts.lib 7-72, 7-75
run address
defined F-7
of a section 7-44 to 7-46
run linker keyword 2-19, 7-44 to 7-46
runtime initialization and support 7-72
S
–s
archiver option 6-5
assembler option 3-6
linker option 7-17, 7-70 to 7-71
.sblock directive 4-23, 4-79
.sect directive 2-5, 4-9, 4-80
.sect section 4-9, 4-80
section header
defined F-7
described A-7 to A-9
section number A-21
section program counter
See also SPC
defined F-7
SECTIONS
hex conversion utility directive 10-22 to 10-23
linker directive
alignment 7-38
allocation 7-35 to 7-43
allocation using multiple memory
ranges 7-40
binding 7-36
blocking 7-38
default allocation 7-58 to 7-60
default model 7-29
described 2-13, 7-32 to 7-43
fill value 7-33
Index
SECTIONS, linker directive (continued)
GROUP 7-50
input sections 7-33, 7-38 to 7-40
.label directive 7-45 to 7-47
load allocation 7-33
memory 7-37 to 7-78
overlay pages 7-53 to 7-57
reserved words 7-24
run allocation 7-33
section specifications 7-33
section type 7-33
specifying 2-19, 7-44 to 7-47
splitting of output sections 7-41
syntax 7-32
uninitialized sections 7-45
UNION 7-48 to 7-52
use with MEMORY directive 7-27
sections
allocation 7-58 to 7-60
COFF 2-3 to 2-4
creating your own 2-8
defined F-7
in the linker SECTIONS directive 7-33
initialized 2-7
named 2-3, 2-8
overlaying with UNION directive 7-48 to 7-50
relocation 2-16 to 2-18, 2-19
special types 7-61
specifications 7-33
specifying a runtime address 7-44 to 7-47
specifying linker input sections 7-38 to 7-40
uninitialized 2-5 to 2-6
initializing 7-69
specifying a run address 7-45
.set directive
4-21, 4-81
.setsect directive
.setsym directive
.short directive
.space directive
3-33
4-11, 4-82
SPC
aligning
by creating a hole 7-66
to word boundaries 4-15 to 4-16, 4-27
assembler symbol 3-12
assembler’s effect on 2-10 to 2-12
assigning a label to 3-12
defined F-7
described 2-9
linker symbol 7-63, 7-66
maximum number of 2-9
predefined symbol for 3-20
value
associated with labels 3-12
shown in source listings 3-33
–spc hex conversion utility option
–spce hex conversion utility option
special section types
special symbols
7-61
.ssnolist directive 4-18, 4-83
listing control 4-17, 4-41
use in macros 5-21
.stack
7-18, 7-19, 7-73
–stack linker option
7-18, 7-73
7-18, 7-65
.stag, symbolic debugging directive
8-8
static
defined F-7
symbols 7-12
variables A-14
F-7
F-7
sname SECTIONS specification
10-23
source file
defined F-7
listings 3-33 to 3-36
specifying algebraic instructions
10-29
A-16 to A-17
8-8
sign extend, defined
10-29
.sslist directive 4-18, 4-83
listing control 4-17, 4-41
use in macros 5-21
_ _STACK_SIZE
4-13, 4-54
simulator, defined
source statement
field 3-34
format 3-12 to 3-14
number in source listing
syntax 3-11
B-9
storage class
defined F-7
described A-19
.string directive 4-13, 4-85
compatibility with C1x/C2x/C2xx/C5x 4-8
limiting listing with .option directive 4-18, 4-76
3-6
string functions
5-9
Index-13
Index
string table
defined F-7
described A-18
stripping
line number entries 7-17
symbolic information 7-17
.struct directive 4-21, 4-86
structure
.tag 4-21, 4-86
defined F-7
definitions A-25, B-9
subsections
defined F-8
initialized 2-7
overview 2-9
uninitialized 2-6
substitution symbols
arithmetic operations on 4-21, 5-8
as local variables in macros 5-13
assigning character strings to 3-21, 4-21
built-in functions 5-8
described 3-21
directives that define 5-7 to 5-8
expansion listing 4-18, 4-83
forcing substitution 5-11
in macros 5-6 to 5-13
maximum number per macro 5-6
passing commas and semicolons 5-6
recursive substitution 5-10
subscripted substitution 5-12 to 5-13
.var macro directive 5-13
suppressing assembler remarks 4-75
–swwsr hex conversion utility option 10-29
.sym symbolic debugging directive B-11
symbol
defined F-8
definitions A-17
names A-18
symbol table
creating entries 2-22
defined F-8
described 2-22
entry from .sym directive B-11
index A-10
placing unresolved symbols in 7-18
special symbols used in A-16 to A-17
stripping entries 7-17
structure and content A-14 to A-28
values A-20
Index-14
symbolic constants 3-20
symbolic debugging
–b linker option 7-10
disable merge for linker 7-10
enumeration definitions B-9
file identification B-4
function definitions B-5
line-number entries B-7
member definitions B-8
producing error messages in macros 5-19
–s assembler option 3-6
stripping symbolic information 7-17
structure definitions B-9
symbols B-11
table structure and content A-14 to A-28
union definitions B-9
symbols
assembler-defined 3-5
assigning values to 4-21, 4-22, 4-81, 4-86, 4-92
at link time 7-62 to 7-65
attributes 3-38
case 3-5
character strings 3-18
cross-reference lister 9-6
cross-reference listing 3-37
defined
by the assembler 2-21 to 2-22
by the linker 7-65
only for C support 7-65
described 2-21 to 2-22, 3-19
external 2-21, 4-51
global 7-12
number of statements that reference 3-37
predefined
$ symbol 3-20
memory-mapped registers 3-20
relocatable symbols in expressions 3-28
reserved words 7-24
setting to a constant value 3-19
statement number that defines 3-37
substitution 3-21
unresolved 7-18
used as labels 3-19
value assigned 3-37
syntax
assignment statements 7-62
source statement 3-11
.sysmem section 7-12
_ _SYSMEM_SIZE 7-12, 7-65
system stack 7-18, 7-73
Index
T
–t
archiver command 6-4
hex conversion utility option 10-43
.tab directive 4-18, 4-89
tag, defined F-8
.tag directive 4-21, 4-22, 4-86, 4-92
target memory, defined F-8
target width 10-10
–tcsr hex conversion utility option 10-29
Tektronix object format 10-44
.text directive 2-5, 4-9
linker definition 7-65
.text section 4-9, 4-90, A-3
defined F-8
TI-Tagged object format 10-43
.title directive 4-18, 4-91
translator
described 11-2
development flow 11-3
input files 11-2
invoking 11-4
limitations 11-2
modes 11-5 to 11-7
options 11-4
output files 11-2
–trta hex conversion utility option 10-29
type entry A-21
U
–u
assembler option 3-6
linker option 7-18
.ubyte directive 4-12, 4-33
.uchar directive 4-12, 4-33
.uhalf directive 4-13, 4-54
.uint directive 4-13, 4-58
.ulong directive 4-13, 4-64
unconfigured memory
defined F-8
described 7-28
DSECT type 7-61
underflow in an expression 3-26
uninitialized sections 2-5 to 2-6
.bss 2-6, 4-30
.usect 2-6
defined F-8
described 7-66
initialization of 7-69
specifying a run address 7-45
.usect 4-95
UNION
defined F-8
linker directive 7-48 to 7-52
union
.tag 4-22, 4-92
defined F-8
symbolic debugging directives B-9
.union directive 4-22, 4-92
unsigned, defined F-8
.usect directive 2-5, 4-9, 4-95
compatibility with C1x/C2x/C2xx/C5x 4-8
.usect section 4-9
.ushort directive 4-13, 4-54
.utag symbolic debugging directive B-9
.uword directive 4-13, 4-58
V
–v
archiver option 6-5
assembler option 3-7
linker option 7-19
.var directive 4-98, 5-13
listing control 4-17, 4-41
variables, local, substitution symbols used as
.vectors 7-34
.version directive 4-23, 4-99
5-13
W
–w linker option 7-19
W MEMORY attribute 7-29
well-defined expression
defined F-8
described 3-27
.width directive 4-18, 4-61
listing control 4-17
widths. See memory widths
.wmsg directive 4-24, 4-42, 5-19
listing control 4-17, 4-41
Index-15
Index
word, defined F-8
word alignment 4-27
.word directive 4-13
limiting listing with .option directive
X
–x
archiver command 6-4
assembler option 3-7, 3-37
hex conversion utility option 10-44
linker option 7-20
X MEMORY attribute 7-29
.xfloat directive 4-12, 4-50
.xlong directive 4-13, 4-64
xref500 command 9-3
Index-16
4-18, 4-76
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