STMicroelectronics VND830ASP-E Datasheet
โฆษณา
โฆษณา
VND830ASP-E
Double channel high-side solid state relay
Features
Type R
DS(on)
VND830ASP-E 60 m
Ω
1.
Per channel
I
OUT
6 A
(1)
V
CC
■
■
■
■
■
■
■
■
■
■
ECOPACK
®
: lead free and RoHS compliant
Automotive Grade: compliance with AEC guidelines
Very low standby current
CMOS compatible input
Proportional load current sense
Current sense disable
Thermal shutdown protection and diagnosis
Undervoltage shutdown
Overvoltage clamp
Load current limitation
10
1
PowerSO-10
Description
The VND830ASP-E is a monolithic device made using STMicroelectronics™ VIPower™ M0-3 technology. It is intended for driving any kind of load with one side connected to ground. Active
V
CC
pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
This device has two channels in high-side configuration; each channel has an analog sense output on which the sensing current is proportional (according to a known ratio) to the corresponding load current.
Built-in thermal shutdown and outputs current limitation protect the chip from overtemperature and short circuit. Device turns-off in case of ground pin disconnections.
Table 1.
Device summary
Package
Power-SO-10™
Tube
VND830ASP-E
Order codes
Tape and reel
VND830ASPTR-E
September 2013 Doc ID 17605 Rev 2 1/27
www.st.com
1
Contents
Contents
VND830ASP-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 17
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 18
PowerSO-10 maximum demagnetization energy (V
CC
= 13.5 V) . . . . . . . 19
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/27 Doc ID 17605 Rev 2
VND830ASP-E
List of tables
List of tables
CC
= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
- output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical transient requirements on V
CC
pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements on V
CC
pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements on V
CC
pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Doc ID 17605 Rev 2 3/27
List of figures
List of figures
VND830ASP-E
Switching characteristics (resistive load R
= 6.5
Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
OUT
/I
SENSE
versus I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
LIM
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
case
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Maximum turn- off current versus load inductance
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
(1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4/27 Doc ID 17605 Rev 2
VND830ASP-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
INPUT 1
INPUT 2
GND
V
CC
CLAMP
LOGIC
OVERTEMP. 1
Ot1
Ot2
OVERTEMP. 2
VCC
OVERVOLTAGE
UNDERVOLTAGE
PwCLAMP 1
DRIVER 1
ILIM1
IOUT1
Vdslim1
K
PwCLAMP 2
DRIVER 2
ILIM2
IOUT2
Vdslim2
K
Ot1
Ot2
OUTPUT 1
CURRENT
SENSE 1
OUTPUT 2
CURRENT
SENSE 2
Figure 2.
Configuration diagram (top view)
GROUND
INPUT 2
INPUT 1
C.SENSE1
C.SENSE2
8
9
6
7
10
11
V
CC
PowerSO-10
2
1
5
4
3
OUTPUT 2
OUTPUT 2
N.C.
OUTPUT 1
OUTPUT 1
Doc ID 17605 Rev 2 5/27
Electrical specifications VND830ASP-E
Figure 3.
Current and voltage conventions
I
S
V
CC
INPUT1
OUTPUT1
CURRENT SENSE 1
INPUT2
OUTPUT2
CURRENT SENSE 2
GROUND
I
GND
I
OUT1
I
SENSE1
V
SENSE1
I
OUT2
I
V
SENSE2
OUT2
V
OUT1
V
SENSE2
V
CC
I
IN1
V
IN1
I
IN2
V
IN2
2.1 Absolute maximum ratings
Stressing the device above the rating listed in
may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality document.
Table 2.
Symbol
V
CC
-V
CC
- I
GND
I
OUT
I
R
I
IN
Absolute maximum ratings
Parameter
DC supply voltage
Reverse supply voltage
DC reverse ground pin current
Output current
Reverse output current
Input current
V
CSENSE
Current sense maximum voltage
Value
41
-0.3
-200
Internally limited
-6
+/- 10
-3
+15
Unit
V
V mA
A
A mA
V
V
6/27 Doc ID 17605 Rev 2
VND830ASP-E
Table 2.
Symbol
V
ESD
E
MAX
P tot
T j
T c
T
STG
Absolute maximum ratings (continued)
Parameter
Electrostatic discharge (Human Body Model:
R = 1.5
Ω; C = 100 pF)
– INPUT
– CURRENT SENSE
– OUTPUT
– V
CC
Maximum switching energy
(L = 1.8 mH; R
L
T jstart
= 150 °C; I
= 0
L
Ω; V
= 9 A) bat
= 13.5 V;
Power dissipation at T c
= 25 °C
Junction operating temperature
Case operating temperature
Storage temperature
Electrical specifications
Value
4000
2000
5000
5000
100
74
Internally limited
-40 to 150
-55 to 150
Unit
mJ
W
°C
°C
°C
V
V
V
V
Table 3.
Symbol
Thermal data
Parameter Value Unit
R thj-case
Thermal resistance junction-case 1.3
°C/W
R thj-amb
Thermal resistance junction-ambient 51.2
(1)
°C/W
1.
When mounted on a standard single sided FR-4 board with 0.5 cm
2 mounting and no artificial air flow.
of Cu (at least 35 µm thick). Horizontal
Doc ID 17605 Rev 2 7/27
Electrical specifications VND830ASP-E
Values specified in this section are for 8 V < V
CC
< 36 V; -40 °C < T j
< 150 °C, unless otherwise specified. (Per each channel).
Table 4.
Symbol
Power
Parameter Test conditions Min.
Typ.
Max.
Unit
V
CC
V
USD
V
OV
Operating supply voltage
Undervoltage shutdown
Overvoltage shutdown
5.5
3
36
V
I
I
I
I
R
ON clamp
I
S
L(off1)
L(off2)
L(off3)
L(off4)
On-state resistance
Clamp voltage
Supply current
Off-state output current
Off-state output current
Off-state output current
Off-state output current
I
OUT
= 2 A; T j
= 25 °C
I
OUT
= 2 A; T j
= 150 °C
I
CC
= 20 mA
(1)
Off-state; V
CC
V
IN
= V
OUT
= 13 V;
= 0 V
Off-state; V
CC
=13V;
V
IN
= V
OUT
= 0 V; T j
= 25 °C
I
On-state; V
OUT
IN
= 0 A; R
= 5 V; V
SENSE
CC
= 13 V;
= 3.9 k
Ω
V
IN
= V
OUT
T j
= 125 °C
= 0 V; V
CC
= 36 V;
V
IN
= 0 V; V
OUT
= 3.5 V
V
IN
= V
OUT
T j
= 125 °C
= 0 V; V
CC
= 13 V;
V
IN
= V
OUT
T j
= 25 °C
= 0 V; V
CC
= 13 V;
1.
V clamp
and V
OV are correlated. Typical difference is 5 V.
41
0
-75
13
4
48
12
12
36
5.5
V
V
V
60 m
Ω
120 m
Ω
55 V
40
25
7
50
0
5
3
µA
µA mA
µA
µA
µA
µA
Table 5.
Symbol
Switching (V
CC
= 13 V)
Parameter Test conditions
(dV
OUT
/dt) on
Turn-on voltage slope
(dV t t d(on) d(off)
OUT
/dt) off
Turn-on delay time
Turn-on delay time
Turn-off voltage slope
R
L
= 6.5
to V
OUT
Ω from V
= 1.3 V
IN
rising edge
R
L
= 6.5
Ω from V edge to V
OUT
IN
falling
= 11.7 V
R
L
= 6.5
Ω from V
OUT to V
OUT
= 10.4 V
= 1.3 V
R
L
= 6.5
Ω from V
OUT to V
OUT
= 1.3 V
= 11.7 V
Min
-
-
-
-
Typ
30
30
See
See
Max Unit
-
µs
µs
V
/µs
V
/µs
8/27 Doc ID 17605 Rev 2
VND830ASP-E
Table 6.
Symbol
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Logic input (channel 1, 2)
Parameter
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
Test conditions
V
IN
= 1.25 V
V
IN
= 3.25 V
V
ICL
Input clamp voltage
I
IN
= 1 mA
I
IN
= -1 mA
Table 7.
Symbol
V
F
V
CC
- output diode
Parameter Test conditions
Forward on voltage -I
OUT
= 2 A; T j
= 150 °C
Table 8.
Symbol
Protection
Parameter Test conditions
I lim
DC short circuit current
V
CC
= 13 V
5.5 V < V
CC
<36 V
T
T
TSD
T
R
HYST
V demag
V
ON
Thermal shutdown temperature
Thermal reset temperature
Thermal hysteresis
Turn-off output voltage clamp
Output voltage drop limitation
I
OUT
= 2 A; V
L = 6 mH
IN
= 0 V;
I
OUT
= 10 mA
Min
1
3.25
0.5
6
Electrical specifications
Typ
6.8
-0.7
Max Unit
1.25
10
8
µA
V
V
V
V
µA
V
Min
-
Typ
-
Max Unit
0.6
V
Min.
6
Typ.
9
Max.
Unit
15
15
A
A
150
135
7
175 200
15
V
CC
-41 V
CC
-48 V
CC
-55 V
°C
°C
°C
50 mV
Doc ID 17605 Rev 2 9/27
Electrical specifications VND830ASP-E
Table 9.
Symbol
Current sense
(1)
Parameter Test conditions Min
V
I dK dK dK
V
K
K
1
K
2
K
3
0
1
/K
2
/K
3
/K
1
2
3
SENSE
SENSE
SENSEH
I
I
I
I
OUT
OUT
Current sense ratio drift
OUT
Current sense ratio drift
OUT
/I
/I
/I
/I
SENSE
SENSE
SENSE
SENSE
Current sense ratio drift
Analog sense leakage current
Max analog sense output voltage
I
OUT1 or I
OUT2
= 0.05 A;
V
SENSE open; T j
= 0.5 V; other channels
= -40 °C...150 °C
I
OUT1 or I
OUT2
= 0.25 A;
V
SENSE open; T j
= 0.5 V; other channels
= -40 °C...150 °C
I
OUT1 or I
OUT2
= 0.25 A;
V
SENSE open; T j
= 0.5 V; other channels
= -40 °C...150 °C
I
OUT1 or I
OUT2
= 1.6 A; V
SENSE other channels open; T j
= 4 V;
= -40 °C
T j
= 25 °C...150 °C
I
OUT1 or I
OUT2
= 1.6 A; V
SENSE other channels open;
= 4 V;
T j
= -40 °C...150 °C
I
OUT1 or I
OUT2
= 2.5 A; V
SENSE other channels open; T j
= 4 V;
= -40 °C
T j
= 25 °C...150 °C
I
OUT1 or I
OUT2
= 2.5 A; V
SENSE other channels open;
= 4 V;
T j
= -40 °C...150 °C
V
IN
T j
= 0 V; I
OUT
= 0 A; V
= -40 °C...150 °C
SENSE
= 0 V;
V
IN
T j
= 5 V; I
OUT
= 0 A; V
= -40 °C...150 °C
SENSE
= 0 V;
V
R
CC
= 5.5 V; I
OUT1,2
SENSE
= 10 k
Ω
= 1.3 A;
V
R
CC
> 8 V, I
SENSE
OUT1,2
= 10 k
Ω
= 2.5 A;
Sense voltage in overtemperature condition
V
CC
= 13 V; R
SENSE
= 3.9 k
Ω
600
1000
-10
1280
1300
-6
1280
1340
-6
0
0
2
4
R
VSENSEH
Analog sense output impedance in overtemperature condition
V
CC
= 13 V; T j
> T
All channels open
TSD
; t
DSENSE
Current sense delay response to 90% I
1.
9 V
≤ V
CC
)
2.
Current sense signal delay after positive input slope.
Sense pin doesn’t have to be left floating.
SENSE
(2)
Typ
5.5
400
Max Unit
1300 2000
1400 1900
+10
1500
1500
1800
1780
+6
1500
1500
1680
1600
+6
5
10
500
%
%
%
µA
µA
V
V
V
Ω
µs
10/27 Doc ID 17605 Rev 2
VND830ASP-E Electrical specifications
Figure 4.
Switching characteristics (resistive load R
L
= 6.5
Ω)
V
OUT
80%
90% dV
OUT
/dt
(on) dV
OUT
/dt
(off) t r
10% t f
I
SENSE
90% t t
INPUT t
DSENSE t d(on) t d(off) t
Figure 5.
I
OUT
/I
SENSE
versus I
OUT
Iout/Isense
2250
2000
1750
1500
1250
1000
750
500
0.0
0.5
1.0
1.5
Iout [A]
C
B
2.0
A
D
E
2.5
A: Max, Tj = -40 °C to 150 °C D: Min, Tj = 25 °C to 150 °C
B: Max, Tj = 25 °C to 150 °C E: Min, Tj = -40 °C to 150 °C
C: Typical, Tj = -40 °C to 150 °C
3.0
Doc ID 17605 Rev 2 11/27
Electrical specifications
Table 10.
Truth table (per each channel)
Conditions Input
Normal operation
Overtemperature
Undervoltage
Overvoltage
Short circuit to GND
Short circuit to V
CC
L
H
L
H
L
H
H
L
H
L
H
L
H
Negative output voltage clamp
L
VND830ASP-E
Output
L
L
L
L
L
L
L
L
L
L
H
H
H
L
Sense
0
Nominal
0
V
SENSEH
0
0
0
0
0
(T j
<T
TSD
(T j
>T
TSD
) V
SENSEH
0
< Nominal
0
12/27 Doc ID 17605 Rev 2
VND830ASP-E Electrical specifications
Table 11.
Electrical transient requirements on V
CC
pin (part 1)
Test levels
ISO T/R 7637/1 test pulse
I II III IV
3b
4
5
1
2
3a
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
Delays and impedance
2 ms, 10
Ω
0.2 ms, 10
Ω
0.1 µs, 50
Ω
0.1 µs, 50
Ω
100 ms, 0.01
Ω
400 ms, 2
Ω
Table 12.
Electrical transient requirements on V
CC
pin (part 2)
Test levels results
ISO T/R 7637/1
Test pulse
I II III
3a
3b
1
2
4
5
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
IV
C
C
C
C
C
E
Table 13.
Electrical transient requirements on V
CC
pin (part 3)
Class Contents
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 17605 Rev 2 13/27
Electrical specifications
Figure 6.
Waveforms
NORMAL OPERATION
INPUT n
LOAD CURRENT n
SENSE n
V
CC
INPUT n
LOAD CURRENT n
SENSE n
V
USD
UNDERVOLTAGE
V
USDhyst
V
CC
INPUT n
LOAD CURRENT n
SENSE n
V
OV
V
CC
< V
OV
OVERVOLTAGE
V
CC
> V
OV
SHORT TO GROUND
INPUT n
LOAD CURRENT n
LOAD VOLTAGE n
SENSE n
SHORT TO V
CC
INPUT n
LOAD VOLTAGE n
LOAD CURRENT n
SENSE n
<Nominal
<Nominal
OVERTEMPERATURE
T j
INPUT n
LOAD CURRENT n
SENSE n
T
TSD
T
R
VND830ASP-E
I
SENSE
=
V
SENSEH
R
SENSE
14/27 Doc ID 17605 Rev 2
VND830ASP-E Electrical specifications
Figure 7.
Off-state output current
3
2
1
5
4
IL(off1) (uA)
8
7
6
Off state
Vcc=13V
Vin=Vout=0V
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 9.
Input clamp voltage
Vicl (V)
8
7.8
7.6
7.4
7.2
7
6.8
6.6
6.4
6.2
6
-50 -25
Iin=1mA
0 25 50 75
Tc (ºC)
100 125 150 175
Figure 11. Input low level
Vil (V)
2.6
2.4
2.2
2
1.8
Vcc=13V
1.6
1.4
1.2
1
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 8.
High level input current
Iih (uA)
5
4.5
4
3.5
3
2.5
2
Vin=3.25V
1.5
1
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 10. Input high level
Vih (V)
3.6
3.4
Vcc=13V
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 12. Input hysteresis voltage
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50 -25
Vcc=13V
0 25 50 75
Tc (ºC)
100 125 150 175
Doc ID 17605 Rev 2 15/27
Electrical specifications
Figure 13. Overvoltage shutdown
Vov (V)
50
47.5
45
42.5
40
37.5
35
32.5
30
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 15. Turn-on voltage slope
dVout/dt(on) (V/ms)
600
550
Vcc=13V
Rl=6.5Ohm
500
450
400
350
300
250
200
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 17. On-state resistance vs T case
Ron (mOhm)
100
90
80
Iout=5A
Vcc=8V & 36V
70
60
50
40
30
20
10
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
VND830ASP-E
Figure 14. I
LIM
vs T case
Ilim (A)
20
17.5
15
12.5
10
Vcc=13V
7.5
5
2.5
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 16. Turn-off voltage slope
dVout/dt(off) (V/ms)
500
450
400
350
300
250
Vcc=13V
Rl=6.5Ohm
200
150
100
50
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 18. On-state resistance vs V
CC
Ron (mOhm)
100
90
80
70
60
50
40
30
20
5
Iout=5A
10 15 20
Vcc (V)
25
Tc=150ºC
Tc=25ºC
Tc= -40ºC
30 35 40
16/27 Doc ID 17605 Rev 2
VND830ASP-E Application information
Figure 19. Application schematic
+5V
R prot
INPUT1
μC
R prot
R prot
R prot
R
SENSE1
V
CC
CURRENT SENSE1
INPUT2
OUTPUT1
R
CURRENT SENSE2
SENSE2
GND
V
GND
R
GND
D
GND
OUTPUT2
D ld
3.1 GND protection network against reverse battery
resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to dimension the R
GND resistor.
1.
R
GND
≤ 600 mV / I
S(on)max
2. R
GND
≥ (-V
CC
) / (-I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet.
Power dissipation in R
GND
(when V
CC
< 0: during reverse battery situations) is:
P
D
= (-V
CC
)
2
/ R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND produces a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several high-side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize solution 2 (see
).
Doc ID 17605 Rev 2 17/27
Application information
3.1.2 Solution 2: diode (D
GND
) in the ground line
VND830ASP-E
A resistor (R
GND
= 1 k
Ω) should be inserted in parallel to D
GND
if the device drives an inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (
∼600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift does not vary if more than one HSD shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused INPUT and STATUS pin is to leave them unconnected, while unused SENSE pin has to be connected to ground pin.
3.3
D ld
is necessary (Voltage Transient Suppresso r) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
CC
line, the control pins are pulled negative. ST suggests to insert a resistor (R prot
) in line to prevent the microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller
I/Os.
-V
CCpeak
/I latchup
≤ R prot
≤ (V
OH µ C
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= -100 V and I latchup
≥ 20 mA; V
OH µ C
≥ 4.5 V
5 k
Ω ≤ R prot
≤ 65 kΩ.
Recommended values:
R prot
=10 k
Ω.
18/27 Doc ID 17605 Rev 2
VND830ASP-E Application information
(V
CC
= 13.5 V)
Figure 20. Maximum turn- off current versus load inductance
(1)
A: Single pulse at T jstart
= 150 °C
B: Repetitive pulse at T jstart
= 100 °C
C: Repetitive pulse at T jstart
= 125 °C
Condition:
V
CC
= 13.5 V
V
IN
, I
L
Demagnetization
Demagnetization
Demagnetization t
1.
Values are generated with R
L
In case of repetitive pulses, T
= 0
Ω jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C.
Doc ID 17605 Rev 2 19/27
Package and PCB thermal data
4 Package and PCB thermal data
Figure 21. PowerSO-10 PC board
(1)
VND830ASP-E
20/27
1.
Layout condition of R th and Z th
measurements (PCB FR4 area= 58 mm x 58 mm, PCB thickness=2 mm,
Cu thickness = 35 µm, Copper areas: from minimum pad lay-out to 8 cm
2
).
Figure 22. R thj-amb
vs PCB copper area in open box free air condition
40
35
30
0
RTHj_amb (°C/W)
55
50
45
Tj-Tamb=50°C
2 4 6
PCB Cu heatsink area (cm^2)
8 10
Doc ID 17605 Rev 2
VND830ASP-E Package and PCB thermal data
Figure 23. PowerSO-10 thermal impedance junction ambient single pulse
Equation 1
:
pulse calculation formula
Z
TH
δ where
=
R
TH
⋅
δ
= t p
⁄
T
THtp
(
1
–
δ )
Figure 24. Thermal fitting model of a double channel HSD in PowerSO-10
Tj_1
C1
Pd1
Tj_2
R1
C1
Pd2
R1
C2
C2
R2
R2
C3
R3
C4
R4
C5
R5
C6
R6
T_amb
Doc ID 17605 Rev 2 21/27
Package and PCB thermal data
Table 14.
Thermal parameter
Area/island (cm
2
)
R1 (°C/ W)
R2 (°C/ W)
R3 (°C/ W)
R4 (°C/ W)
R5 (°C/ W)
R6 (°C/ W)
C1 (W.s/ °C)
C2 (W.s /°C)
C3 (W.s/ °C)
C4 (W.s/ °C)
C5 (W.s/ °C)
C6 (W.s/ °C)
0.5
0.15
0.8
0.7
0.8
12
37
0.0006
2.10E-03
0.013
0.3
0.75
3
VND830ASP-E
6
22
5
22/27 Doc ID 17605 Rev 2
VND830ASP-E
5
Package and packing information
Package and packing information
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Figure 25. PowerSO-10 package dimensions
H E
A
F
A1 h
10
E2
1 e
0.25
D
D1
= =
B
DETAIL "A"
B
0.10 A B
A
C
E
SEATING
PLANE
E4
DETAIL "A"
α
SEATING
PLANE
A1
L
Doc ID 17605 Rev 2 23/27
Package and packing information
D1
E
E2
E2
(1)
E4
E4
(1) e
F
F
(1)
A
A
(1)
A1
B
B
(1)
C
C
(1)
D
H
H
(1) h
L
L
(1)
α
α
(1)
1.
Muar only POA P013P.
Table 15.
PowerSO-10 mechanical data
Dim.
7.40
9.30
7.20
7.30
0.37
0.35
0.23
9.40
5.90
5.90
Min.
3.35
3.4
0
0.40
1.20
0.80
0°
2°
1.25
1.20
13.80
13.85
Millimeters
Typ.
1.27
0.50
VND830ASP-E
1.80
1.10
8°
8°
1.35
1.40
14.40
14.35
7.60
9.50
7.60
7.50
0.53
0.55
0.32
9.60
6.10
6.30
Max.
3.65
3.6
0.10
0.60
24/27 Doc ID 17605 Rev 2
VND830ASP-E Package and packing information
Figure 26. PowerSO-10 suggested pad layout and tube shipment (no suffix)
14.6 - 14.9
10.8 - 11
6.30
C
B
A
0.67 - 0.73
0.54 - 0.6
9.5
1
2
3
4
5
7
6
10
9
8
1.27
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (± 0.5) A
Casablanca
50 1000 532 10.4
B
16.4
Muar
50 1000 532 4.9
17.2
C (± 0.1)
0.8
0.8
Figure 27. Tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
24
4
P
24
D (± 0.1/-0)
1.5
D1 (min)
1.5
F (± 0.05)
11.5
K (max)
6.5
P1 (± 0.1)
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components No components
Empty components pockets saled with cover tape.
500mm min
User direction of feed
Start
Doc ID 17605 Rev 2 25/27
Revision history
Table 16.
Document revision history
Date Revision
19-Jul-2010
19-Sep-2013
1
2
Initial release.
Updated Disclaimer
Changes
VND830ASP-E
26/27 Doc ID 17605 Rev 2
VND830ASP-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2013 STMicroelectronics - All rights reserved
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Doc ID 17605 Rev 2 27/27
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