Pubblicità
Pubblicità
Manual for Computerboard
CB6464
Version:
Date:
0.4
25.10.2019
CB6464 Version: 0.4
3
4 Version: 0.4
CB6464
CB6464 Version: 0.4
5
6 Version: 0.4
CB6464
Documentation issue status
1
Version
0.1
0.2
0.3
0.4
Documentation issue status
Modifications
Preliminary version
Preliminary version, change of the fan plug from 3 to 4-pin, OCT UPS, OCT LED
inserted, graphics for LEDs changed, mechanical drawings updated
Interface assignment added
Isolated BAseCon plug added
CB6464 Version: 0.4
7
8
Notes on the documentation
2 Notes on the documentation
This description is only intended for the use of trained specialists in control and automation engineering who are familiar with the applicable national standards.
It is essential that the documentation and the following notes and explanations are followed when installing and commissioning the components.
It is the duty of the technical personnel to use the documentation published at the respective time of each installation and commissioning.
The responsible staff must ensure that the application or use of the products described satisfy all the requirements for safety, including all the relevant laws, regulations, guidelines and standards.
Disclaimer
The documentation has been prepared with care. The products described are, however, constantly under development.
We reserve the right to revise and change the documentation at any time and without prior announcement.
No claims for the modification of products that have already been supplied may be made on the basis of the data, diagrams and descriptions in this documentation.
Trademarks
Beckhoff ® , TwinCAT ® , EtherCAT ® , EtherCAT P ® , Safety over EtherCAT ® , TwinSAFE ® , XFC ® and XTS ® are registered trademarks of and licensed by Beckhoff Automation GmbH.
Other designations used in this publication may be trademarks whose use by third parties for their own purposes could violate the rights of the owners.
Patent Pending
The EtherCAT Technology is covered, including but not limited to the following patent applications and patents:
EP1590927, EP1789857, DE102004044764, DE102007017835 with corresponding applications or registrations in various other countries.
The TwinCAT Technology is covered, including but not limited to the following patent applications and patents:
EP0851348, US6167425 with corresponding applications or registrations in various other countries.
EtherCAT ® is registered trademark and patented technology, licensed by Beckhoff Automation GmbH,
Germany
Copyright
© Beckhoff Automation GmbH & Co. KG, Germany.
The reproduction, distribution and utilization of this document as well as the communication of its contents to others without express authorization are prohibited.
Offenders will be held liable for the payment of damages. All rights reserved in the event of the grant of a patent, utility model or design.
Version: 0.4
CB6464
Safety instructions
3 Safety instructions
Safety regulations
Please note the following safety instructions and explanations!
Product-specific safety instructions can be found on following pages or in the areas mounting, wiring, commissioning etc.
Exclusion of liability
All the components are supplied in particular hardware and software configurations appropriate for the application. Modifications to hardware or software configurations other than those described in the documentation are not permitted, and nullify the liability of Beckhoff Automation GmbH & Co. KG.
Personnel qualification
This description is only intended for trained specialists in control, automation and drive engineering who are familiar with the applicable national standards.
Description of symbols
In this documentation the following symbols are used with an accompanying safety instruction or note. The safety instructions must be read carefully and followed without fail!
DANGER
Serious risk of injury!
Failure to follow the safety instructions associated with this symbol directly endangers the life and health of persons.
WARNING
Risk of injury!
Failure to follow the safety instructions associated with this symbol endangers the life and health of persons.
CAUTION
Personal injuries!
Failure to follow the safety instructions associated with this symbol can lead to injuries to persons.
NOTE
Damage to the environment or devices
Failure to follow the instructions associated with this symbol can lead to damage to the environment or equipment.
Tip or pointer
This symbol indicates information that contributes to better understanding.
CB6464 Version: 0.4
9
Overview
4 Overview
4.1
Features
The CB6464 is designed as a high-performance compact board based on Intel®'s Skylake and Kabylake processors. The latest energy-saving DDR4 technology enables memory extension of up to 32 GB via
SODIMM260.
As standard interfaces two DisplayPort connections, four Gigabit LAN connections and four USB 3.0
interfaces are available on the front panel. The two DisplayPorts enable the connection of an HDMI adapter for an HDMI signal. The connection of an HDMI display with adapter is possible.
Two variants are available, variant 1 being equipped with a Q170 chipset and variant 2 with an H110 chipset.
Internally both variants of the CB6464 have two M.2 (B) sockets (2280), while variant 1 additionally has a
BAseCon140 connector. Various signals, which are listed in the respective chapter, are led out via the internal plug connector depending on the chipset in use.
Power is supplied via a 4-pin connector on the front panel. Input voltage is isolated 24 V.
Fig. 1: Block diagram_CB6464
10 Version: 0.4
CB6464
Overview
4.2
CB6464
CPU
Memory
List of features
I/O on front panel
Internal I/O
Graphic resolution
RTC
BIOS
Power supply
Format
120x120-Board
Intel® Core™ i3 / Core™ i5 / Core™ i7
Intel® Pentium®
Intel® Celeron®
2x SO-DIMM260 1.2V DDR4-2133
Maximum memory extension 32GB
2x DisplayPort++ (connection of an HDMI
adapter for a HDMI signal is possible)
4x GB LAN
4x USB3.0
2x M.2 (B) sockets, signals dependant on
chipset (internal chapter M.2)
With Q170 only: 1x BAseCon140 (Signals internal: chapter BAseCon140)
DisplayPort: 4096x2304@60Hz
HDMI1.4: 2560x1600@60Hz;
4096x2160@24Hz
DVI: 1920x1200@60Hz
Exchangeable, horizontal on-board battery
Optional: horizontal battery on expansion card
AMI® Aptio V
24V
120 x 120 mm
Availability oft he processors
The list of features lists all the processors that can be ordered. Their actual availability depends on the manufacturer.
CB6464 Version: 0.4
11
Overview
4.3
Specifications and documents
The following documents, specifications or webpages were used for the preparation of this manual or as further technical documentation respectively.
PCI-Spezification
Version 2.3 bzw. 3.0
www.pcisig.com
PCI Express® Base Specification
Version 2.0
www.pcisig.com
ACPI-Spezification
Version 3.0
www.acpi.info
ATA/ATAPI-Spezification
Version 7 Rev. 1 www.t13.org
USB-Spezificationen www.usb.org
SM-Bus-Spezification
Version 2.0
www.smbus.org
Intel®-chip description
Intel® Atom™ Processor E3800 Product Family datasheet www.intel.com
Intel®-chipd description i210 Datasheet www.intel.com
SMSC®-chip description
SCH3114 Datasheet (NDA erforderlich)
12 Version: 0.4
CB6464
www.smsc.com
American Megatrends®
Aptio™ Text Setup Environment (TSE) User Manual www.ami.com
American Megatrends®
Aptio™ 4.x Status Codes www.ami.com
Overview
CB6464 Version: 0.4
13
Detailed description
5 Detailed description
5.1
Power supply
The board is supplied with an isolated input voltage of nominally 24 V, which in reality may lie between 20 V and 30 V. In normal operation the DC/DC power rail is supplied with this voltage. A UPS can also be implemented via an OCT signal (OCT = One Cable Technology).
UPS-OCT
The UPS-OCT can only be implemented with the Beckhoff CU81XX-xxxx UPS.
5.2
CPU
The processors employed are Intel® processors of the 6 th (Skylake) and 7 th (KabyLake) generation.
Processors of both generations are characterized by a very low power consumption and offer contemoporary performance with clock rates of currently up to 3.9 GHz.
5.3
Memory
SO-DIMM260 memory modules (DDR4-2133) commonly used in notebooks are used on the CB6464 board.
For technical and mechanical reasons it is possible that certain memory modules cannot be used. Ask your distributor about the recommended memory modules.
With the currently available SO-DIMM260 modules a memory extension up to 32 GB is possible depending on the product variant. When equipping both memory sockets, care must be taken that identical memory modules are used.
5.4
M.2
Expansion cards that fulfill the M.2 specification are characterized by an extremely small format and – depending on the card type – flexible dimensions.
M.2 cards can easily and simply be inserted by plugging them into the slot and fixing them with a screw.
The M.2 socket of the CB6464 supports Key B. Different signals are supported depending on the chipset in use. The table in chapter M.2 lists all the interfaces supported, depending on the chipset in use.
Driver compatibility
For optimum driver compatibility we recommend the use of a Microsoft® Windows 10 operating system.
14 Version: 0.4
CB6464
External connections
6 External connections
6.1
Note on the use of cables
Requirement for the cabling!
The cables used must meet certain requirements for most interfaces. For example, twisted and shielded cables are necessary for a reliable USB 2.0 connection. Limitations in the maximum cable length are also no rarity. All of these interface-specific requirements are to be taken from the respective specifications and observed accordingly.
CB6464 Version: 0.4
15
External connections
6.2
Connector Map
The plug connections on the component side of the CB6464 board are summarized in the illustration below.
The function of the respective connector can be taken from the table below the illustration, as can the page of the manual on which further information about this connection can be read.
Fig. 2: Connector Map
16 Version: 0.4
CB6464
External connections
6.3
Interface list
Number
P1500
P1100
P1100
P1101
P1101
P1102
P1102
P1102
P1102
P1103
P1200/1*
P1203*
P500/501
BT1200*
Function (Designation)
Vin (X101)
LAN 1 (X102)
LAN 2 (X103)
LAN 3 (X104)
LAN 4 (X105)
USB3.0 (X106)
USB3.0 (X107)
USB3.0 (X108)
USB3.0 (X109)
DisplayPort (X110, X111)
M.2 (Key B)
BAseCon140
FAN
Battery
Page
Front panel: Power supply (X101) [ } 18]
Front panel: LAN1-4 (X102-X105) [ } 19]
Front panel: LAN1-4 (X102-X105) [ } 19]
Front panel: LAN1-4 (X102-X105) [ } 19]
Front panel: LAN1-4 (X102-X105) [ } 19]
Front panel: USB 3.0 A-D (X106 - X109) [ } 20]
Front panel: USB 3.0 A-D (X106 - X109) [ } 20]
Front panel: USB 3.0 A-D (X106 - X109) [ } 20]
Front panel: USB 3.0 A-D (X106 - X109) [ } 20]
Front panel: DisplayPort (X110, X110) [ } 21]
Internal: BAseCon140 (Q170 only) [ } 24]
*not depicted (see bottom of board)
The numbers in brackets correspond to the inscription of the external interfaces on the front housing of the industrial pc.
CB6464 Version: 0.4
17
External connections
6.4
Front panel: Power supply (X101)
The connection to the power supply is implemented as a 2x2-pin housing plug (Phoenix Contact
P20THR-1818504). The main supply voltage (24 V) for the module is on PIN 3. This can also be implemented as UPS-OCT (One Cable Technology), i.e. the signal for the UPS is also transmitted to the board via this cable.
Fig. 3: CB6464 Vin
90° plug
As the plug is a 90° plug, the plug symbol in the illustration is oriented to what you see when you look at the board from the side (instead of from above).
Pin assignment of the power plug:
Description
PC Start: Input for starting
and shutting down the PC.
Low (0 V or open contact):
PC starts.
High (>3 V): PC shuts down.
PC Status: Output of the PC
status. The voltage
corresponds to the positive
supply voltage and can be
loaded with 1 A.
Low (0 V): PC is off.
High (Vin): PC is on.
Signal
PC_START
PC_ACTIVE
1
Pin
3 Vin
Signal
2 4 GND
Description
24 V supply voltage
UPS OCT is supported
Ground
18 Version: 0.4
CB6464
External connections
6.5
Front panel: LAN1-4 (X102-X105)
The board has four Gigabit-LAN connections, which are implemented with two standard connectors, each with two connections. Network components compatible with 10BaseT, 100BaseT and 1000BaseT can be connected to all of them. The required speed is selected automatically. Auto-Cross and Auto-Negotiate are available as well as PXE, RPL and WOL functionality. Intel® i219 (PHY) is the controller for LAN1, while
Intel® i210 (MAC/PHY) is used as the controller for LAN 2 to 4.
Real-time applications
The Ethernet port connected via PCIe is usually suitable for cycle times <= 1 ms and for distributed clock applications with EtherCAT.
The Ethernet port integrated in the chipset is usually suitable for real-time Ethernet applications with cycle times > 1 ms (without distributed clocks).
Fig. 4: CB6464 LAN
90° plug
As the plug is a 90° plug, the plug symbol in the illustration is oriented to what you see when you look at the board from the side (instead of from above).
Pin assignment of LAN connector:
4
5
6
7
8
Pin
1
2
3
Name
LAN-0
LAN-0#
LAN-1
LAN-2
LAN-2#
LAN-1#
LAN-3
LAN-3#
Description
LAN line 0 +
LAN line 0 -
LAN line 1 +
LAN line 2 +
LAN line 2 -
LAN line 1 -
LAN line 3 +
LAN line 3 -
The LEDs of the LAN interfaces indicate the activity and speed of the data transmission:
Mbit/s
1000
100
10
Flashing during
data ransmission
Green
Green
Green
Steadily lit
Green
Orange
None
CB6464 Version: 0.4
19
External connections
6.6
Front panel: USB 3.0 A-D (X106 - X109)
The CB6464 provides four USB 3.0 ports, which are implemented as combination connectors with 4 connectors.
The USB channels support the USB 3.0 specification. All necessary settings for USB can be made in the
BIOS. Note that the "USB mouse and keyboard" function in the BIOS setup is only required if the operating system does not offer USB support. This function should not be selected for settings in the setup and for booting Windows with a USB mouse and keyboard connected, because this would lead to considerable performance limitations.
The individual USB interfaces can supply a current of up to 900 mA and are electronically protected.
Switch-off of the USB ports by overcurrent protection
USB ports A and B and USB ports C and D are each protected by a common overcurrent detection.
In the event of overcurrent occurring on one of the ports, therefore, both commonly protected USB ports will be switched off.
Fig. 5: CB6464 USB 3.0
90° plug
As the plug is a 90° plug, the plug symbol in the illustration is oriented to what you see when you look at the board from the side (instead of from above).
Pin assignment of USB 3.0 connector:
4
5
6
7
Pin
1
2
3
8
9
Signal
VCC
D-
D+
GND
RX-
RX+
GND
TX-
TX+
Description
5 V supply voltage
Data - (USB 2.0)
Data + (USB 2.0)
Ground
Receive line - (USB 3.0)
Receive line + (USB 3.0)
Ground
Transmit line - (USB 3.0)
Transmit line + (USB 3.0)
20 Version: 0.4
CB6464
External connections
6.7
Front panel: DisplayPort (X110, X110)
For devices with a DisplayPort connection a corresponding standard connector (Foxconn 3VD11203-
DPA1-4H) with two DisplayPort connections is available.
The interface additionally provides HDMI/DVI signals that can be used with aid of an adapter. Please consult your distributor with regard to a suitable adapter.
Fig. 6: CB6464 Display Port
90° plug
As the plug is a 90° plug, the plug symbol in the illustration is oriented to what you see when you look at the board from the side (instead of from above).
Pin assignment of DisplayPort plug:
Description
DisplayPort Lane 0 +
DisplayPort Lane 0 -
Ground
Line 2 plus
Line 2 minus
Ground
DP / HDMI
Auxiliary plus
Auxiliary minus
Ground
Signal
L0
L#0
GND
L2
L#2
GND
HDMI#
AUX
AUX#
GND
5
7
1
3
9
11
13
15
17
19
Pin
2
4
6
8
Signal
GND
L1
L#1
GND
10 L3
12 L#3
14 GND
16 GND
18 HPD
20 3.3 V
Description
Ground
Line 1 plus
Line 1 minus
Ground
Line 3 plus
Line 3 minus
Ground
Ground
Hot Plug Detect
3.3 V supply voltage
Switching to HDMI
DisplayPort signals are led out via the interface by default. With the use of a level shifter cable the board switches according to the DisplayPort specification 1.1 automatically to HDMI signals.
CB6464 Version: 0.4
21
Internal connections
7 Internal connections
7.1
Internal: M.2
The CB6464 is equipped with two M.2 sockets, into each of which an M.2-2280 card (Key B) is inserted.
Various signals are led out via the socket, depending on the chipset (see table).
Q170
2x USB 3.0 (1x per socket)
2x SATA Gen 3 (1x per socket) or
2x PCIe x1 Gen 3 (1x per socket) or
1x PCIe x1 and 1x SATA Gen 3
H110
2x USB 2.0 (1x per socket)
2x SATA Gen 3 (1x per socket)
Adapter cards with standard plug connectors are available as accessories. Please contact your distributor for this.
Pin assignment of M.2 connector:
Description
Configuration pin
Ground
Ground
Signal
CONFIG_3
GND
GND
USB D+
1
Pin Signal
2 3.3 V1
3
5
7
4
6
8
3.3 V2
FCPWROFF#
WDISABLE#
Description
Standby supply
voltage S 3.3 V
Standby supply
voltage S 3.3 V
Full Card Power
OFF active low
(not led out) USB Channel 2
Data +
USB Channel 2
Data -
USB D9 (not led out)
Ground
Connector Key
Configuration pin
(not led out)
(not led out)
Ground
USB 3.0 Channel 5
SuperSpeed
Receive -
USB 3.0 Channel 5
SuperSpeed Receive
Ground
USB 3.0 Channel 5
SuperSpeed
Transmit -
USB 3.0 Channel 5
SuperSpeed
Transmit +
Ground
GND
Config 0
GPIO11
DPR
GND
PER1#
USB3-5 SSRX#
SSICRX#
PER1
USB3-5 SSRX
SSICRX
GND
PET1#
USB3-5 SSTX#
SSICTX#
PET1
USB3-5 SSTX
SSICTX
GND
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
10 GPIO9
DAS
DDS
LED1
12 Connector Key
14
16
18
20 GPIO5
22 GPIO6
24 GPIO7
26 GPIO10
28 GPIO8
30 UIM RST
32
34
36
38
40
UIM CLK
UIM DATA
UIM PWR
DEVSLP
GPIO0
(not led out)
(not led out)
(not led out)
(not led out)
(not led out)
(not led out)
(not led out)
(not led out)
(not led out)
DeviceSleep
(not led out)
22 Version: 0.4
CB6464
Description
PCIe Lane 1
Receive +
PCIe Lane 1
Receive -
Ground
PCIe Lane 1
Transmit -
PCIe Lane 1
Transmit +
Ground
PCIe Lane 1
Reference Clock -
PCIe Lane 1
Reference Clock -
Ground
(not led out)
(not led out)
(not led out)
(not led out)
Power good
Configuration pin
Ground
Ground
Configuration pin
Signal
PER0#
SATAB
PER0
SATAB#
GND
PET0#
SATAA#
PET0
SATAA
GND
REFCLK#
REFCLK
GND
ANTCTL0
ANTCTL1
ANTCTL2
ANTCTL3
RESET#
CFG1
GND
GND
CFG2
51
53
55
57
59
61
63
65
67
69
71
73
45
47
49
41
Pin Signal
42 GPIO1
43 44 GPIO2
46
48
50
GPIO3
GPIO4
PRST#
75
52 CLKREQ#
54 PEWAKE#
56 N/C
58 N/C
60 COEX3
62 COEX2
64 COEX1
66 SIM DETECT
68 SUSCLK
70 3.3 V
72 3.3 V
74 3.3 V
Internal connections
Description
(not led out)
(not led out)
(not led out)
(not led out)
PCIe Reset
active low
PCIe Clock Enable
active low
Link Reactivation
active low
(not led out)
(not led out)
(not led out)
(not led out)
(not led out)
(not led out)
System clock
Standby supply
voltage S 3.3 V
Standby supply
voltage S 3.3 V
Standby supply
voltage S 3.3 V
CB6464 Version: 0.4
23
Internal connections
7.2
Internal: BAseCon140 (Q170 only)
In conjunction with the Q170 chipset, the BAseCon140 connector enables the flexible extension of the IO functions of the CB6464. It provides up to eight PCIe lanes, of which a maximum of four can be multiplexed with SATA 2.0 (3G) and a maximum of four with PCIe lines, as well as a maximum of four PCIe lines with a maximum of four USB 3.0 lines (see table). In addition, DisplayPort, SSIC, SMBus and 1Wire signals are led out via the BAseCon connector. The expansion board takes care of the configuration of the IO functions. A
PIC on the expansion card contains the configuration data that are communicated to the board upon connection, thus enabling an uncomplicated and self-configuring extension to the IO options.
With Q170 only
Max. 4x SATA Gen 3 / max. 4x PCIe x1 Gen 3
(multiplexed)
Max. 4x USB 3.0 / max. 4x PCIe x1 Gen 3
(multiplexed)
1x DisplayPort 1.4 / HDMI 2.0
Total: 8x PCIe x1
(configurable – see left)
Observe the current limits!
In order to avoid damaging the device, it is essential to observe the following current limits:
A maximum load of 2.8 A per pin must not be exceeded. On account of the different current consumptions of the usable processors the actual current consumption may be lower. The respective maximum values can be obtained from your distributor on inquiry.
Irrespective of the CPU in use, a maximum total load of 100 W must not be exceeded.
NOTE
Mirrored Signal at BAseCon-plug Stack Down
At the Stack Down version of the BAseCon plug (plug on the bottom-side of the board), the signals are transferred by a stack to the mating plug. On this mating plug (Stack Up) the signals are mirrored. On the stack itself there is no mirroring.
24 Version: 0.4
CB6464
S VCC S 5 V
Ground
PCIe Lane 1
Transmit +
PCIe Lane 1
Transmit -
Ground
PCIe Clock
Lane 1 +
PCIe Clock
Lane 1 -
Ground
PCI Lane 2
Transmit +
PCI Lane 2
Transmit -
Ground
PCIe Lane 3
Transmit +
PCIe Lane 3
Transmit -
Ground
PCIe Lane 3
Clock +
PCIe Lane 3
Clock 3 -
Ground
SATA Lane 2
Transmit +
SATA Lane 2
Transmit -
Ground
PCIe Clock Enable
Lane 1 active low
PCIe Clock Enable
Lane 3 -
PCIe Reset active
low
SMBus Clock
GND
PE1 TX/
SATA4 TX
PE1 TX#/
SATA4 TX#
GND
PECLK1
PECLK1#
GND
PE2 TX/
SATA3 TX
PE2 TX#/
SATA3 TX#
GND
PE3-TX/
SATA2-TX
PE3-TX#/
SATA2-TX#
GND
PECLK3
PECLK3#
GND
PE4-TX/
SATA1-TX
PE4-TX#/
SATA1-TX#
GND
PCKE1#
PCKE3#
PERST#
SMBCLK
SMBus Alert active
low
PCIe Clock Enable
Lane 5
SMB-Alert#
PCKE5/OC4#
CB6464
Pin assignment of BAseCon140 connector:
Description
S UPS output
S UPS output
(not led out)
(not led out)
Signal
S UPS OUT1
S UPS OUT2
5 V1
5 V2
2
4
6
8
Pin
1
Signal
S UPS IN1
3 S UPS IN2
5 GND
7 GND
ISOLATION
28
30
32
22
24
26
14
16
18
20
34
36
46
48
50
38
40
42
44
52
54
56
58
45 GND
47 SATA1 RX/
PE4 RX
49 SATA1 RX #/
PE4 RX #
51 GND
53 PCKE2#
55
57
PCKE4#
PEWAKE#
60
KEY
59 SMBDAT
62 61 1Wire
64 63 PCKE6#/
OC3#
13 S 3.3 V
15 GND
17 SATA4 RX/
PE1 RX
19 SATA4 RX #/
PE1 RX#
21 GND
23 PECLK2
25 PECLK2#
27 GND
29 SATA3 RX/
PE2 RX
31 SATA3 RX #/
PE2 RX#
33 GND
35 SATA2 RX/
PE3 RX
37 SATA2 RX#/
PE3 RX#
39 GND
41 PECLK4
43 PECLK4#
Version: 0.4
Internal connections
Description
S UPS input
S UPS input
Ground
Ground
Standby supply
voltage 3.3 V
Ground
PCIe Lane 1
Receive +
PCIe Lane 1
Receive -
Ground
PCIe Clock
Lane 2+
PCIe Clock
Lane 2 -
Ground
PCIe Lane 2
Receive
PCIe Lane 2
Receive -
Ground
PCIe Lane 3
Receive +
PCIe Lane 3
Receive -
Ground
PCIe Clock 4 +
PCIe Clock 4 -
Ground
SATA Lane 2
Receive +
SATA Lane 2
Receive -
Ground
PCIe Lane 2 Clock
Enable active low
PCIe Lane 4 Clock
Enable -
PCIe Wake active
low
SMBus Data
1-Wire
PCIe Lane 6 Clock
Enable 6 -
25
Internal connections
Description Signal
PCIe Clock Enable
Lane 7
Ground
PCIe Lane 5
Transmit +
PCIe Lane 5
Transmit -
PCKE7/OC2#
GND
PE5-TX/
USB3-4-TX/
USBC1-TX
PE5-TX#/
USB3-4-TX#/
USBC1_TX#
USB2-4 (GND) USB 2.0
Channel 4 +
PCIe Clock
Lane 5 +
PCIe Clock 5 -
USB 2.0
Channel 4 -
PCIe Lane 6
Transmit +
PCIe Lane 6 Transmit
-
Ground
PCIe Lane 7
Transmit +
PCIe Lane 7
Transmit -
USB 2.0
Channel 3 +
Ground
PECLK5/USBC_SB
U1
(GND)
PECLK5#/
USBC-SBU2
(GND)
USB2-4#
(GND)
PE6-TX/
USB3-3-TX/
USBC2-TX
PE6-TX#/
USB3-3-TX#/
USBC2-TX#
GND
PE7-TX/
USB3-2-TX/
SSIC-TX
PE7-TX#/
USB3-2-TX#/
SSIC-TX#
USB2-2 (GND)
PECLK7 (GND)
Ground PECLK7# (GND)
USB 2.0
Channel 3 -
PCIe Lane 8 Transmit
+
PCIe Lane 8 Transmit
-
Ground
USB2-2#
(GND)
PE8-TX/
USB3-1-TX
PE8-TX#/
USB3-1-TX#
GND
SATA GP1
SATA GP3
GPIO1/
SATAGP1
GPIO3/
SATAGP3/
USBC-CC1
TwinCAT LED Red GPIO5/
TCLEDR
66
Pin
KEY
68
70
72
74
76
Signal
65 PCKE8#/
OC1#
67 GND
69 USBC1 RX/
USB3-4 RX/
PE5 RX
71 USBC1 RX#/
USB3-4 RX#/
PE5 RX#
73 USB2-8
(GND)
75 PECLK6
(GND)
78 77 PECLK6#
(GND)
80
82
84
86
88
90
92
94
96
98
79 USB2-8 D#
(GND)
81 USBC2 RX/
USB3-3 RX/
PE6 RX
83 USBC2 RX#/
USB3-3 RX#/
PE6 RX#
85 GND
87 SSIC RX/
USB3-2 RX/
PE7 RX
89 SSIC RX#/
USB3 -2 RX#/
PE7 RX#
91 USB2-1
(GND)
93 PECLK8
(GND)
95 PECLK8#
(GND)
97 USB2-1#
(GND)
100
102
99 USB3-1 RX/
PE8 RX
101 USB3-1 RX#/
PE8 RX#
104
KEY
103 GND
106
108
110
105 SATAGP2/
GPIO2
107 USB-CC2/
SATAGP4/
GPIO4
109 GPIO6/
TCLEDG
26 Version: 0.4
Description
USB Overcurrent
active low
Ground
PCIe Lane 5
Receive +
PCIe Lane 5
Receive -
USB 2.0
Channel 8 Data +
PCIe Lane 6
Clock +
PCIe Clock
Lane 6 -
USB 2.0
Channel 8 Data -
PCIe Lane 6
Receive +
PCIe Lane 6
Receive -
Ground
PCIe Lane 7
Receive +
PCIe Lane 7
Receive -
USB 2.0
Channel 10 +
PCIe Lane 8
Clock +
PCIe Clock
Lane 8 -
USB 2.0
Channel 10 -
PCIe Lane 8
Receive +
PCIe Lane 8
Receive -
Ground
SATA GP 2
SATA GP4
TwinCAT LED
Green
CB6464
Description Signal
TwinCAT LED Blue GPIO7/
TCLEDB
SATA-LED SATA LED active
low
RTC Battery BATT
Power Management
Event active low
PME#
Power button
active low
PWRBTN#
PSON
Ground
DisplayPort + /
DVI -
DisplayPort Hot
Plug Detect
PSON
GND
DP/DVI#
DPHPD
GND
DPL0
Ground
DisplayPort
Lane 0 +
DisplayPort
Lane 0 -
Ground
DisplayPort
Lane 2 +
DisplayPort
Lane 2 -
DPL0#
GND
DPL2
DPL2#
130
132
134
136
138
140
122
124
126
128
112
Pin Signal
111 GPIO8
114 113 USBPWREN
116
118
120
115
117
119
PWRFAIL
PWRGOOD
MRST#
121
123
ATXPWRGD
GND
125 DDCC/
DPAUX
127 DDCD/
DPAUX#
129 GND
131 DPL1
133 DPL1#
135 GND
137 DPL3
139 DPL3#
Internal connections
Description
(not led out)
USB Power
Enable
SUSV
Power good
Reset button
active low
ATX Power good
Ground
DisplayPort Aux +/
DDC Clock
DisplayPort Aux - /
DDC Data
Ground
DisplayPort
Lane 1 +
DisplayPort
Lane 1 -
Ground
DisplayPort 3 +
DisplayPort 3 -
CB6464 Version: 0.4
27
Internal connections
7.3
Internal: FAN
The module has two 4-pin fan connections. This enables fans with a supply voltage of 12 V to be connected directly to the module. A signal is also available for monitoring the fan speed.
Fig. 7: CB6464 FAN
Pin assignment of fan connector:
Pin
1
2
3
4
Signal
GND
12 V
TACHO
PWM
Description
Ground
Supply voltage 12 V regulated
Speed monitoring
Speed control
28 Version: 0.4
CB6464
Internal connections
7.4
Internal: Battery
The board is delivered with a CR2032 battery holder (Renata VBH2032-1) including a 3 V battery.
UL conformity
All technical measures for UL conformity are already integrated on the board.
Accordingly, no additional actions are necessary for the connection of an RTC battery. The battery must be connected directly.
Fig. 8: CB6464 Bat
Synchronism of the RTC
The quartz of the RTC reacts to temperature fluctuations. Therefore, correct synchronism of the
RTC is possible only with suitable and sufficient cooling!
CB6464 Version: 0.4
29
LED’s
8 LED’s
8.1
LED: Powercontroller
There is a RGB LED on the board with which status messages of the power controller are output by means of colors and flashing intervals.
Fig. 9: CB6464 PWRCTRL-LED
Color
None
White
Cyan
Magenta
Blue
Yellow
Green
Red
Green/yellow
Red/yellow
Yellow
Yellow
Magenta
Red/magenta
Interval
Steadily lit
Steadily lit
Steadily lit
Steadily lit
Steadily lit
Steadily lit
Steadily lit
Steadily lit
Flashing
Flashing
Flashing (6s)
Flashing (3s)
Flashing (0,5s)
Flashing
Meaning
System in error state
Power fail
Reserved
S UPS active (if existent)
Reserved
S5 state
S0 state
Reset/Start
Bootloader running without error
Bootloader is starting (start sequence is being run
through)
S4 state
S3 state
S UPS capacitance test (if S UPS exists)
Checksum error during the I2C transmission in the
bootloader
A steadily lit red LED can indicate a hardware error.
Adaptation of the status codes
It is possible to adapt the status codes (e.g. as TwinCAT LED). To do this, the system colors can be changed with the aid of an SMB command. This change remains in force until the next restart or reset. A change of the default colors is indicated by the additional flashing of the white LED.
30 Version: 0.4
CB6464
8.2
LED: SATA
A further RGB LED indicates the hard disk activity.
Fig. 10: CB6464 SATA-LED
Color
Red
Interval
Flashing
Meaning
Acitvity (access)
LED’s
CB6464 Version: 0.4
31
LED’s
8.3
LED: TwinCAT
Fig. 11: CB6464 TwinCAT-LED
Color
Green
Blue
Red
Interval
Steadily lit
Steadily lit
Steadily lit
Meaning
TwinCAT Run Mode
TwinCAT Config Mode
TwinCAT stop
Adaptation of the status codes
It is possible to adapt the status codes (e.g. as TwinCAT LED). To do this, the system colors can be changed with the aid of an SMB command. This change remains in force until the next restart or reset. A change of the default colors is indicated by the additional flashing of the white LED.
32 Version: 0.4
CB6464
LED’s
8.4
LED: UPS-OCT
There is a RGB LED on the board with which the transmission quality of the UPS-OCT signals is indicated by means of colors and flashing intervals.
Fig. 12: CB6464 OCT-LED
Color
None
Blue
Yellow
Green
Red
Interval
Steadily lit
Flashing
Steadily lit
Steadily lit
Steadily lit
Meaning
No UPS-OCT connected
Bootloader active
Moderate signal quality
Good signal quality
Poor signal qulity
If the LED does not light up, no UPS-OCT is connected.
Adaptation of the status codes
It is possible to adapt the status codes (e.g. as UPS-OCT-LED). To do this, the system colors can be changed with the aid of an SMB command. This change remains in force until the next restart or reset.
CB6464 Version: 0.4
33
BIOS
9
9.1
BIOS
Main
Setup-Entry
Board*
Revision
Bios Version
Processor Information
Name
Type
Speed
ID
Stepping
Number of Processors
Microcode Revision
GT Info
IGFX VBIOS Version
IGFX GOP Version
Memory RC Version
Total Memory
Memory Frequency
System Date
System Time
*PCH Typ
34
Options
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
Here the systemdate can be changed.
Here the systemtime can be changed.
Automatic indication of variant:
CB6464 V1 → Q170
CB6464 V2 → H110
Version: 0.4
CB6464
BIOS
9.2
Advanced Menu
Setup-Entry
Power-Supply Type
SoftOff on Overheat
Show postcode on screen
Platform Misc Configuation
CPU Configuration
Intel® Ethernet Connection (2)
Driver Health
Trusted Computing
Hardware Monitor
PCI Subsystem Settings
Network Stack Configuration
Power Controller Options
CSM Configuration
NVME Configuration
USB Configuration
SATA and RST Configuration
AMT Configuration
Options
ATX / AT
Disabled / Enabled / Enabled (Emulate PwrBtn)
Disabled / Enabled
Submenu see: Platform Misc Configuration [ } 36]
Submenu see: CPU Configuration [ } 37]
Submenu see: Intel Ethernet Connection [ } 38]
Submenu see: Driver Health [ } 39]
Submenu see: Trusted Computing [ } 40]
Submenu see: Hardware Monitor [ } 40]
Submenu see: PCI Subsystem Settings [ } 41]
Submenu see: Network Stack Configuration [ } 42]
Submenu see: Power Controller Options [ } 43]
Submenu see: CSM Configuration [ } 44]
Submenu see: NVMe Configuration [ } 45]
Submenu see: USB Configuration [ } 45]
Submenu see: SATA und RST Configuration [ } 46]
Submenu see: AMT Configuration [ } 48]
CB6464 Version: 0.4
35
BIOS
9.3
Platform Misc Configuration
Bios-Entry
Platform Misc Configuration
PTID Support
PECI Access Method
Native PCIE Enable
BDAT ACPI Table Support
Wake system from S5
ACPI Debug
Low Power S0 Idle Capability
Lpit Recidency Counter
PCI Delay Optimization
ZpODD Support
Options
Disabled / Enabled
Direct I/O / ACPI
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
SLP S0 / C10
Disabled / Enabled
Disabled / Enabled
36 Version: 0.4
CB6464
BIOS
9.4
CPU Configuration
Bios-Entry
CPU Configuration
Type
ID
Speed
L1 Data Cache
L1 Instruction Set
L2 Cache
L3 Cache
L4 Cache
VMX
SMX/TXT
SW Guard Extensions (SGX)
CPU Flex Ratio Override
CPU Flex Ratio Settings
Options
None
None
None
None
None
None
None
None
None
None
Software Controllers / Enabled / Disabled
Disabled / Enabled
None
Hardware Prefetcher
Adjacent Cache Line Prefetch
Disabled / Enabled
Disabled / Enabled
Intel (VMX) Virtualization Technology Disabled / Enabled
PECI Disabled / Enabled
Active Processor Cores
Hyper-Threading
All / 1 / 2 / 3
Disabled / Enabled
AES Disabled / Enabled
Intel Trusted Execution Technology Disabled / Enabled
Alias Check Request
DPR Memory Size (MB)
Reset AUX Content
CPU-Power Managemant Control
Disabled / Enabled
0..255
Disabled / Enabled
Submenu see: CPU Power Management Control [ } 38]
CB6464 Version: 0.4
37
BIOS
9.5
CPU Power Management Control
Bios-Entry
CPU-Power Mangement Control
Intel® SpeedStep
Intel® Speed Shift Technology
Options
Disabled / Enabled
Enabled / Disabled
9.6
Intel Ethernet Connection
Bios-Entry
Port Configuration
NIC Configuration
Blink LEDs
Port Configuration Information
UEFI Driver
Adapter PBA
Chip Type
PCI DEcice ID
PCI Address
Link Status
MAC Address
Options
Submenu see:
None
None
None
None
None
None
None
38 Version: 0.4
CB6464
BIOS
9.7
NIC Configuration
Bios-Entry
Link Speed
Wake On LAN
9.8
Driver Health
Options
Auto Negotiated / 10 Mbps Half / 10 Mbps Full / 100 Mbps Half /
100 Mbps Full
Disabled / Enabled
Bios-Entry
Intel® Gigabit 0.0.16
9.9
Intel Gigabit
Options
Submenu see: Intel Gigabit [ } 39]
Bios-Entry
Controller (xxx)
CB6464
Options
None
Version: 0.4
39
BIOS
9.10
Trusted Computing
Bios-Entry
Configuration
Security Device Support
9.11
Hardware Monitor
Options
Disable / Enable
Bios-Entry
PC Health Status
CPU dig.
1.00V
VCCCORE
5V
12V
Memory VD
3.3V
Fan 1
Fan 2
MB Temp
Memory Temp
PwCtrlTemp
40
Options
None
None
None
None
None
None
None
None
None
None
None
None
Version: 0.4
CB6464
BIOS
9.12
PCI Subsystem Settings
Bios-Entry
PCI Bus Driver Version
PCI Device Common Settings:
PCI Latency Timer
PCI-X Latency Timer
VGA Palette Snoop
PERR# Generation
SERR# Generation
Above 4G Decoding
PCI Hot-Plug Settings
Options
None
32 / 64 / 96 / 128 / 160 /192 / 224 / 248 / PCI Bus Clocks
32 / 64 / 96 / 128 / 160 /192 / 224 / 248 / PCI Bus Clocks
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Submenu see: PCI Hot-Plug Settings [ } 41]
9.13
PCI Hot-Plug Settings
Bios-Entry
PCI Hot-Plug Settings
BIOS Hot-Plug Support
PCI Buses Padding
Options
Enabled / Disabled
Disabled / 1 / 2 / 3 / 4 / 5
I/O Resources Padding
MMIO 32 bit Resources Padding
Disabled / 4 K / 8 K / 16 K / 32 K
Disabled / 1 M / 2 M / 4 M / 8 M / 16 M / 32 M / 64 M / 128 M
PFMMIO 32 bit Resources Padding Disabled / 1 M / 2 M / 4 M / 8 M / 16 M / 32 M / 64 M / 128 M
CB6464 Version: 0.4
41
BIOS
9.14
Network Stack Configuration
Bios-Entry
Network Stack
Ipv4 PXE Support
Ipv4 http Support
Ipv6 PXE Support
IPV6 http Support
IP6 Configuration
PXE boot wait time
Media detect count
Options
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Automatic / Manual
0..5
0..50
42 Version: 0.4
CB6464
9.15
Power Controller Options
BIOS
Bios-Entry
Bootloader Version
Options
None
Firmaware Version None
Mainboard Serial No None
Mainboard Prod. Date (Week.Year) None
Mainboard BootCount
Mainboard Operation Time
Voltage /Min/Max)
Temperature (Min/Max)
None
None
None
None
Ext. USB-Port Voltage
WDT OSBoot Timeout
Off in S3-5 / by SCVV
Disabled / 45 / 60 / ../255 Seconds
1-second Uninteruruptable Power Supply (SUPS)
SUPS Disabled / Enabled
Hold USB
Delay
SUPS Firmware Version
Current Power Source
Battery Load Level
Powerfail Counter
Disabled / Enabled
0..255
None
None
None
None
CB6464 Version: 0.4
43
BIOS
9.16
CSM Configuration
Bios-Entry Options
Compatibility Support Module Configuration
CSM Support Enabled / Disabled
CSM16 Module Version
GateA20 Active
Option ROM Messages
INT19 Trap Response
None
Upon Request / Always
Force BIOS / Keep Current
Immediate / Postponed
UEFI and Legacy / Legacy only / UEFI only Boot option filter
Option ROM execution
Network
Storage
Video
Other PCI devices
Do not launch / UEFI / Legacy
Do not launch / UEFI / Legacy
Do not launch / UEFI / Legacy
Do not launch / UEFI / Legacy
44 Version: 0.4
CB6464
BIOS
9.17
NVMe Configuration
Bios-Entry
NVMe controller and Drive Information
Options
[Device list] None
NVMe Raid 0/1 is not supported.
9.18
USB Configuration
NOTE
Bios-Entry
USB Configuration
USB Module Version
USB Controllers
USB Devices
Legacy USB Support
XHCI Hand-off
USB Mass Storage Driver Support
Port 60/64 Emulation
USB hardware delays and time-outs
USB transfer time-out
Device reset time-out
Device power-up delay
CB6464
Options
None
None
None
Enabled / Disabled / Auto
Enabled / Disabled
Enabled / Disabled
Disabled / Enabled
1 / 5 / 10 / 20 sec
10 / 20 / 30 / 40 sec
Auto/ Manual
Version: 0.4
45
BIOS
9.19
SATA und RST Configuration
Bios-Entry
SATA And RST Configuration
SATA Controller(s)
SATA Mode Selection
SATA Test Mode
RAID Device ID
Options
Enabled / Disabled
AHCI / Intel RST Premium
Enabled / Disabled
Client / Alternate
Software Feature Mask Configuration Submenu see: Software Feature Mask Configuration [ } 47]
Aggressive LPM Support Disabled / Enabled
SATA Controller Speed
Serial ATA Port X
Software Preserve
Port X
Default / Gen1 / Gen2 / Gen3
None
None
Disabled / Enabled
Hot Plug
Cinfigured as eSATA
Spin Up Device
Topology
SATA Port X Dev Slp
DITO Configuration
Disabled / Enabled
None
Disabled / Enabled
Unknown / ISATA / Direct Connect / FLEX / M2
Disabled / Enabled
Disabled / Enabled
46 Version: 0.4
CB6464
9.20
Software Feature Mask Configuration
BIOS
Bios-Entry
Software Feature Mask Configuratione
Options
HDD Unlock
LED Locate
Disabled / Enabled
Disabled / Enabled
RAID0
RAID1
RAID10
Raid5
Intel Rapid Recovery Technology
OROM UI and BANNER
Enabled / Disabled
Enabled / Disabled
Enabled / Disabled
Enabled / Disabled
Enabled / Disabled
Enabled / Disabled
IRRT Only on eSATA
Smart Response Technology
OROM UI Normal Delay
RTS Force Form
Enabled / Disabled
Enabled / Disabled
2 secs / 4 secs / 6 secs / 8 secs
Enabled / Disabled
CB6464 Version: 0.4
47
BIOS
9.21
AMT Configuration
Bios-Entry
ASF Support
USB Provisioning of AMT
CIRA Configuration
ASF Configuration
Secure Erase Configuration
OEM Flags Settings
MEBx Resolution Settings
Options
Disabled / Enabled
Disabled / Enabled
Untermenü siehe : CIRA Configuration [ } 48]
Untermenü siehe:
Untermenü siehe:
Secure Erase Configuration [ } 49]
Untermenü siehe:
Untermenü siehe:
MEBx Resolution Settings [ } 51]
9.22
CIRA Configuration
Bios-Entry Options
Activate Remote Assistance Process Disabled / Enabled
CIRA Timeout 0..255
48 Version: 0.4
CB6464
9.23
ASF Configuration
Bios-Entry
PEt Progress
WatchDog
OS Timer
BIOS Timer
Options
Disabled / Enabled
Disabled / Enabled
0..65535
0..65535
9.24
Secure Erase Configuration
Bios-Entry
Secure Erase Mode
Force Secure Erase
Options
Simulated / Real
Disabled / Enabled
BIOS
CB6464 Version: 0.4
49
BIOS
9.25
OEM Flags Settings
Bios-Entry
MBEx hotkey pressed
MBEx Selection Screen
Hide Unconfigure ME Confirmation
Prompt
MBEx OEM Debug Menu Enable
Unconfigure ME
Options
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
50 Version: 0.4
CB6464
9.26
MEBx Resolution Settings
Bios-Entry
Non-UI Resolution
UI Mode Resolution
Graphics Mode Resolution
9.27
Chipset
Options
Auto / 80x25 / 100x31
Auto / 80x25 / 100 x 31
Auto / 640x 480 / 800x600 / 1024 x 768
BIOS
Setup-Entry
System Agent (SA) Configuration
PCH-IO Configuration
Options
Submenu see:
System Agent (SA) Configuration
Submenu see:
CB6464 Version: 0.4
51
BIOS
9.28
System Agent (SA) Configuration
Bios-Entry
System Agent (SA) Configuration
SA PCIe Code Version
VT-d
Graphics Configuration
(PEG-Port X assignemt)
VT-d
Chap Device
Thermal Device
GMM Device
CRID Support
Options
None
None
Submenu see:
Graphics Configuration [ } 53]
None
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
52 Version: 0.4
CB6464
9.29
Graphics Configuration
BIOS
Bios-Entry Options
Graphics Configuration
Skip Scanning of External Gfx Card Disabled / Enabled
Primary Display
Select PCIE Card
External Gfx Card Primary Display
Configuration
Internal Graphics
GTT Size
Aperture Size
DVMT Pre-allocated
Auto / IGFX / PEG / PCI / SG
Auto / Elk Creek 4 / PEG Eval
128MB /256MB / 512MB / 1024MB / 2048MB
32M / 64M / 4M / 8m / 12M / 16M / 20M / 24M / 28M / 32M / 36M /
40M / .. / 60M
External Gfx Card Primary Display Configuration
Auto / Disabled / Enabled
2 MB / 4 MB / 8 MB
DVMT Total Gfx Mem
Gfx Low Power Mode
VDD Enable
HDCP Support
Algorithm
PM Support
Set Power Clamp
PAVP Enable
Cdynmax Clamping Enable
Cd Clock Frequency
IUER Button Enable
LCD Control
256M / 128M / MAX
Enabled / Disabled
Enabled / Disabled
Enabled / Disabled
One-time / Periodic
Enabled / Disabled
Disabled / Enabled
Enabled / Disabled
Enabled / Disabled
337.5 Mhz / 450 Mhz / 540 Mhz / 675 Mhz
Disabled / Enabled
Submenu see: LCD Control [ } 54]
CB6464 Version: 0.4
53
BIOS
9.30
External Gfx Card Primary Display Configuration
Bios-Entry
External Gfx Card Primary Display
Configuration
Primary PEG
Primary PCIE
Options
Auto / PEG11 /PEG12
Auto / PCIE1 / PCIE2 / PCIE3 / … / PCIE19
9.31
LCD Control
Bios-Entry
LCD Control
Primary IGFX
LCD Panel Type
Panel Scaling
Backlight Control
Active LFP
Panel Color Depth
Backlight Brightness
54
Options
VBIOS Default / EFP (/ EFP2 / EFP3
VBIOS Default / 640x480 LVDS / 800x600 LVDS / 1024x768 LVDS /
1280x1024 LVDS / 1400x1050 LVDS1 / 1400x1050 LVDS2 /
1600x1200 LVDS / 1280x768 LVDS / 1680x1050 LVDS / 1920x1200
LVDS / 1600x900 LVDS / 1280x800 LVDS / 1280x600 LVDS /
2048x1536 LVDS / 1366x768 LVDS
Auto / Off / Force Scaling
PWM Inverted / PWM Normal
Noe DP / eDP Port-A
18 Bit / 24 Bit
0..255
Version: 0.4
CB6464
BIOS
9.32
PCH-IO Configuration
Bios-Entry
PCH-IO Configuration
PCI Express Configuration
USB Configuration
HD Audio Configuration
PCH LAN Controller
Wake on LAN
Second LAN Controller
Third LAN Controller
Forth LAN Controller
M.2-Slot X
CLKRUN#logic
State After G3
Compatible Revision ID
Options
Submenu see:
PCI Express Configuration [ } 56]
Submenu see:
Submenu see:
HD Audio Configuration [ } 59]
Enabled / Disabled bei V1, always Enabled bei V2
Enabled / Disabled
Enabled / Disabled
Enabled / Disabled
Enabled / Disabled
None
Enabled / Disabled
S0 State / S5 State
Enabled / Disabled
CB6464 Version: 0.4
55
BIOS
9.33
PCI Express Configuration
Bios-Entry
PCI Express Configuration
PCI Express Clock Gating
Lagacy IO Low Latency
Peer Memory Write Enable
Compliance Test Mode
PCIe-USB Glitch W/A
PCI Express Gen3 Eq Lanes
PCI Express Root Port X
[PCIE Port assignments]
Options
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Submenu see: PCI Express Gen3 Eq Lanes [ } 56]
Submenu see: PCI Express Root Port X [ } 57]
None
9.34
PCI Express Gen3 Eq Lanes
Bios-Entry
PCIEX Cm
PCIEX Cp
56
Options
0..63
0..63
Version: 0.4
CB6464
9.35
PCI Express Root Port X
BIOS
Bios-Entry
PCI Express Root Port 1
Topolgy
ASPM
L1 Substates
Gen3 Eq Phase3 Method
UDTP
DPTP
ACS
URR
FER
NFER
CER
CTO
SEFE
SENFE
SECE
PME SCI
Hot Plug
Advanced Error Reporting
PCIe Speed
Transmitter Half Swing
Detect Timeout
Extra Bus Reserved
Reserved I/O
PCH PCIe LTR Configuration
PCH PCIE1 LTR
Snoop Latency Override
Snoop Latency Value
Snoop Latency Multipler
Non Snoop Latency Override
CB6464
Options
Disabled / Enabled
Unknown / x1 / x4 / Sata Express / M2
L0sL1 / L1 L0s / Disabled / Auto
Disabled / L1.1 & L1.2 / L1.1 / L1.2
Hardware / Static Coeff. / Software Search
0..10
0..10
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Auto / Gen1 / Gen2 / Gen3
Disabled / Enabled
0..65535
0..7
4K / 8K / 12K / 16K / 20K
Disabled / Enabled
Disabled / Manual / Auto
0..1023
1 ns / 32 ns / 1024 ns / 32768 ns / 1048576 ns / 33554432 ns
Disabled / Manual / Auto
Version: 0.4
57
BIOS
9.36
Extra Options
Bios-Entry
Detect Non-Compliance Device
Prefetchable Memory
Reserved Memory Alignment
Prefetchable Menmory Alignment
Options
Disabled / Enabled
1..20
1..31
1..31
9.37
USB Configuration
Bios-Entry
USB Configuration
XHCI Diable Comliance Mode
USB Port Disable Override
USB SS Physical Connector #X
Options
False / True
Disabled / Select Per-Pin
Disabled / Enabled
58 Version: 0.4
CB6464
BIOS
9.38
HD Audio Configuration
Bios-Entry Options
HD Audio System Configuration Settings
HD Audio Disabled / Enabled / Auto
9.39
Security
Setup-Entry
Password Description
Minimum length
Maximum length
Administrator Password
User Mode
Secure Boot
Options
None
None
Here an administrator password can be set.
Enabled / Disabled
Submenu see: Secure Boot [ } 60]
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59
BIOS
9.40
Secure Boot
Bios-Entry
System Mode
Secure Boot
Vendor Keys
Attempt Secure Boot
Secure Boot Mode
Key Management
Options
None
None
None
Disabled / Enabled
Standard / Custom
Submenu see: Key Management [ } 60]
9.41
Key Management
Bios-Entry
Provision Factory Defaults
Reset to Setup Mode
Enroll Efi Image
Save all Secure Boot variables
PlatformKey(PK)
Key Exchange Keys
Authorized Signatures
Forbidden Signatures
Authorized TimeStamps
OsRecovery Signatures
Options
Disabled / Enabled
Press entry key
Press entry key
Press entry key
Press entry key
Press entry key
Press entry key
Press entry key
Press entry key
Press entry key
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CB6464
9.42
Boot
Bios-Entry
Boot Configuration
Setup Prompt Timeout
Bootup NumLok State
F7 Boot Menu
Full Screen Logo
Fast Boot
New Boot Option Policy
StartUpDElay for UEFI shell
Boot mode select
Fixed Boot Order Priorities
Boot Option #1-19
Advanced Fixed Boot Order
Parameters
Options
0..65535
On / Off
Disabled / Enabled
Disabled / Enabled
Disabled / Enabled
Default / Place First / Place Last
0..255
Legacy / UEFI / Dual
Here the range of boot media to be used can be set.
Submenu see: Fixed Boot Order Parameters [ } 62]
BIOS
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BIOS
9.43
Fixed Boot Order Parameters
Bios-Entry
Max. CFast/SSD capacity
Max. USB Stick capacity (GB)
9.44
Save & Exit
Options
1..16384
1..16384
Bios-Entry
Save Changes and Reset
Discard Changes and Reset
Restore Optimized Defaults
Boot Override
IBA CL slot 00FE v0110
Launch EFI Shell from filesystem device
Options
Press entry key
Press entry key
Press entry key
Press entry key
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Mechanical drawings
10 Mechanical drawings
Dimensional notation
All dimensions are in mil (1 mil = 0.0254 mm). Data in square brackets are in mm.
10.1
PCB: Holes
Fig. 13: MZ MH CB6464_G3
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Mechanical drawings
10.2
PCB: Pin 1 distances
Fig. 14: MZ Pin1 CB6464_G3
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CB6464
10.3
PCB: Dimensions
Mechanical drawings
Fig. 15: MZ CB6464_G3
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65
Technical data
11 Technical data
11.1
Electrical data
Power supply
Board
RTC
Power consumption
RTC
24 V (+/- 5%)
>= 3 µm
<= 10 µm
11.2
Environmental conditions
Temperature range
Operating 0 °C up to +60 °C (more extended temperture range on request)
-25 °C up to +85 °C
-25 °C up to +85 °C, for wrapped boards
Storage
Dispatch
Temperature changes
Operating
Storage
Dispatch
0.5 °C per minute, 7.5 °C in 30 minutes
1.0 °C per minute
1.0 °C per minute, for wrapped boards
Relative air humidity
Operating
Storage
Dispatch
Impact
Operating
Storage
Dispatch
Vibration
Operating
Storage
Dispatch
5% up to 85% (non-condensing)
5% up to 95% (non-condensing
5% up to 100% (non-condesing), for wrapped boards
150 m/², 6 ms
400 m/s², 6 ms
400 m/s², 6 ms, for wrapped boards
10 up to 58 Hz, 0.075 mm amplitude
5 up to 9 Hz, 3.5 mm amplitude
9 up to 500 Hz, 10 m/s²
5 up to 9 Hz, 3.5 mm amplitude
9 up to 500 Hz, 10 m/s², for wrapped boards
Note on impact and vibration resistance
The specifications for impact and vibration resistance refer only to the motherboard itself without heat sink, memory module, cabling, etc.
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Technical data
11.3
Technical specifications
The board is specified for an ambient temperature range of 0 °C to +60 °C (extended temperature range on enquiry). In addition, care must be taken that the temperature of the processor die does not exceed 100 °C.
A suitable cooling concept must be implemented for this that is oriented to the maximum power consumption of the processor/chipset. Please note: also that any existing controllers are included in the cooling concept.
The power consumption of these modules may be of the same order of magnitude as the power consumption of the processor.
The board is prepared with suitable holes for the use of modern cooling solutions. We have a series of compatible cooling components in our range. Your distributor will be glad to advise you on choosing suitable solutions.
NOTE
Prevent the maximum die temperature being exceeded!
It is the end customer's responsibility to ensure that the die temperature of the processor does not exceed
100 °C! Continuous overheating can destroy the board!
If the temperature exceeds 100 °C, the ambient temperature needs to be reduced. Ensure sufficient air circulation if necessary.
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Support and Service
12 Support and Service
12.1
Beckhoff Support
Beckhoff Support offers you comprehensive technical assistance, helping you not only with the application of individual Beckhoff products, but also with other, wide-ranging services:
• world-wide support
• design, programming and commissioning of complex automation systems
• extensive training program for Beckhoff system components.
Hotline: +49(0)5246/963-157
Fax: +49(0)5246/963-9157
E-mail: [email protected]
12.2
Beckhoff Service
The Beckhoff Service Center supports you in all matters of after-sales service:
• on-site service
• repair service
• spare parts service
• hotline service
Hotline: +49(0)5246/963-460
Fax: +49(0)5246/963-479
E-mail: [email protected]
12.3
Beckhoff headquarters
Beckhoff Automation GmbH & Co. KG
Hülshorstweg 20
33415 Verl
Germany
Phone: +49(0)5246/963-0
Fax: +49(0)5246/963-198
E-mail: [email protected]
Web: www.beckhoff.de
Further Support and Service addresses can be found on our website at http://www.beckhoff.de.
You will also find further documentation for Beckhoff components there.
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Appendix I: Post Codes
13 Appendix I: Post Codes
During the boot phase, the BIOS generates a series of status messages (so-called "POST Codes"), which can be output with the help of a suitable reading device (POST Code card). The meanings of the POST
Codes are explained in the document "Aptio™ 5.x Status Codes" from American Megatrends®, which is available from the website http://www.ami.com
. In addition, the following OEM POST Codes are output:
Code
87h
88h
89h
Description
BIOS-API started
PCA9535 started
PWRCTRL firmware started
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Appendix II: Resources
14 Appendix II: Resources
14.1
Interrupt
The resources used are independent of the setup setting. The listed interrupts and their use are given by the
AT compatibility. If interrupts have to be exclusively available on the ISA side, they must be reserved through the BIOS setup. Exclusivity is neither given nor possible on the PCI side.
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
Address
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
Function
Timer
RTC
FPU
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Appendix II: Resources
14.2
PCI Devices
A
A
A
A
A
A
A
B
The PCI devices listed here all exist on the board, including those that are detected and configured by the
BIOS. Due to the BIOS setup settings it may be the case that various PCI devices or functions of devices are not activated. If devices are deactivated, the bus numbers of other devices may change as a result.
INT
-
B
A
REQ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2
3
0
0
0
1
0
0
0
0
0
0
0
0
0
0
Bus Dev.
0 0
1
2
08
20
20
22
23
28
28
31
31
31
31
00
00
00
2
4
6
0
0
0
0
0
0
0
0
0
2
0
0
0
Fct.
Controller / Slot
0 Host Bridge ID 191F
PCI Bridge (0-1) x1(x16) ID1901
VGA Controller ID1912
System Peripheral ID1911
XHCI Controller IDA12F
Other DPIO Module ID1311
Serial Other IDA13A
SATA (AHCI 1.0) IDA102
PCI Bridge (0-2) x1 (x1) IDA114
PCI Bridge (0-3) x1 (x1) IDA115
ISA Bridge IDA143
Memory Controller IDA121
SMBus Controller IDA123
Ethernet Controller ID15B7
Ethernet Controller x1 (x1) ID1531
Ethernet Controller x1 (x1) ID1531
Ethernet Controller x1 (x1) ID1531
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Appendix II: Resources
14.3
SMB-Devices
The following table lists the reserved SM-Bus device addresses in 8-bit notation.
NOTE
These address ranges may not be used by external devices even if the component assigned in the table doesn't exist on the motherboard.
Address
34-35
36-39
5C-5D
60-6F
70-73
88-89
92-93
A0-A7
B0-B3
B8-BB
Function
API access to power supply unit
Reserved
NCT7491
Reserved for DDR4
POST Code output
Slave address defined by BIOS
I210 default
Reserved for DDR4
Power controller (access via BIOS-API)
Power controller (access via BIOS-API)
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