STMicroelectronics VN750PS-E Datasheet
Anuncio
Anuncio
VN750PS-E
High-side driver
Features
Type
VN750PS-E
R
DS(on)
60 m Ω
I
OUT
6 A
V
CC
36 V
■
■
■
■
■
■
■
■
■
■
ECOPACK
®
: lead free and RoHS compliant
Automotive Grade: compliance with AEC guidelines
CMOS compatible input
On-state open-load detection
Off-state open-load detection
Shorted load protection
Undervoltage and overvoltage shutdown
Protection against loss of ground
Very low standby current
Reverse battery protection
SO-8
Description
The VN750PS-E is a monolithic device designed in STMicroelectronics™ VIPower™ M0-3
Technology intended for driving any kind of load with one side connected to ground.
Active V
CC
pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart help protect the device against overload.
The device detects open load condition in on and off-state. Output shorted to V
CC
is detected in the off-state. Device automatically turns off in case of ground pin disconnection.
September 2013
Table 1.
Package
SO-8
Device summary
Order codes
Tube
VN750PS-E
Tape and reel
VN750PSTR-E
Doc ID 16782 Rev 3 1/27 www.st.com
1
2/27
Contents
Contents
VN750PS-E
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SO-8 maximum demagnetization energy (V
= 13.5 V) . . . . . . . . . . . . 19
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Doc ID 16782 Rev 3
VN750PS-E
List of tables
List of tables
Electrical transient requirements on V
pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements on V
pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements on V
pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Doc ID 16782 Rev 3 3/27
4/27
List of figures
List of figures
VN750PS-E
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Doc ID 16782 Rev 3
VN750PS-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
V
CC
GND
INPUT
STATUS
V
CC
CLAMP
OVER TEMPERATURE
DETECTION
LOGIC
OVERVOLTAGE
DETECTION
UNDERVOLTAGE
DETECTION
Power CLAMP
DRIVER
CURRENT LIMITER
ON
-
STATE OPEN-LOAD
DETECTION
OFF-STATE OPEN-LOAD
AND OUTPUT SHORTED TO V
DETECTION
CC
OUTPUT
Figure 2.
Configuration diagram (top view)
V
CC
OUTPUT
OUTPUT
V
CC
5
8
SO-8
4
1
N.C.
STATUS
INPUT
GND
Table 2.
Suggested connections for unused and not connected pins
Connection/pin Status N.C.
Output Input
Floating
To ground
X X
X
X X
Through 10 K Ω resistor
Doc ID 16782 Rev 3 5/27
Electrical specifications VN750PS-E
Figure 3.
Current and voltage conventions
I
IN
I
STAT
V
IN
V
STAT
V
CC
INPUT
STATUS
GND
OUTPUT
I
GND
V
F
I
OUT
I
S
V
CC
V
OUT
6/27
Stress values that exceed those listed in the “Absolute maximum ratings” table can cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions greater than those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality documents.
Table 3.
Symbol
Absolute maximum ratings
Parameter
V
CC
-V
CC
-I gnd
I
OUT
-I
OUT
I
IN
I
STAT
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
DC output current
Reverse DC output current
DC input current
DC status current
V
ESD
Electrostatic discharge
(human body model: R = 1.5 K Ω; C = 100 pF)
- Input
- Status
- Output
- V
CC
Value
41
- 0.3
- 200
Internally limited
- 6
+/-10
+/- 10
4000
4000
5000
5000
V
V
V
V
Unit
V
V mA
A
A mA mA
Doc ID 16782 Rev 3
VN750PS-E
Table 3.
Symbol
Absolute maximum ratings (continued)
Parameter
E
MAX
P tot
T j
T c
T stg
Maximum switching energy
(L = 1.8 mH; R
T jstart
L
= 150 °C; I
= 0 Ω ; V bat
L
= 9 A)
= 13.5 V;
Power dissipation T
C
= 25 °C
Junction operating temperature
Case operating temperature
Storage temperature
Electrical specifications
Value
100
4.2
Internally limited
- 40 to 150
- 55 to 150
Unit mJ
W
°C
°C
°C
Table 4.
Symbol
Thermal data
Parameter Max. value Unit
R thj-lead
R thj-amb
Thermal resistance junction-lead
Thermal resistance junction-ambient
30
93
(1)
82
(2)
°C/W
°C/W
°C/W
1.
When mounted on a standard single-sided FR-4 board with 0.5 cm
2
of Cu (at least 35 µm thick) connected to all V
CC
pins. Horizontal mounting and no artificial air flow.
2.
When mounted on a standard single-sided FR-4 board with 2 cm
2
of Cu (at least 35 µm thick) connected to all V
CC
pins. Horizontal mounting and no artificial air flow.
Doc ID 16782 Rev 3 7/27
Electrical specifications VN750PS-E
Values specified in this section are for 8 V < V
CC otherwise stated.
< 36 V; -40 °C < T j
< 150 °C, unless
Table 5.
Symbol
Electrical characteristics
Parameter Test conditions Min.
Typ.
Max.
Unit
Power
V
CC
V
USD
V
USDhyst
V
OV
Operating supply voltage
Undervoltage shutdown
Undervoltage shutdown hysteresis
Overvoltage shutdown
5.5
3
36
13
4
0.5
36
5.5
V
V
V
R
ON
On-state resistance
10
60
120
25
V m Ω m Ω
µA
I
S
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Supply current
Off-state output current
Off-state output current
Off-state output current
Off-state output current
I
OUT
V
CC
= 2 A; T
> 8 V j
= 25 °C;
I
OUT
= 2 A; V
CC
>8 V
Off-state; V
CC
V
IN
= V
OUT
= 13 V;
= 0 V
Off-state; V
CC
V
IN
= V
OUT
= 13 V;
= 0 V; T j
= 25 °C
On-state; V
CC
V
IN
= 5 V; I
OUT
= 13 V;
= 0 A
V
IN
= V
OUT
= 0 V
V
IN
= 0 V; V
OUT
= 3.5 V
V
IN
= V
OUT
T j
= 125 °C
= 0 V; V
CC
= 13 V;
V
IN
= V
OUT
T j
= 25 °C
= 0 V; V
CC
= 13 V;
0
-75
10
2
20
3.5
50
0
5
3
µA mA
µA
µA
µA
µA
Switching (V
CC
= 13V) t d(on) t d(off)
Turn-on delay time
Turn-off delay time dV
OUT
/dt
(on)
Turn-on voltage slope dV
OUT
/dt
(off)
Turn-off voltage slope
R
L
= 6.5
Ω from V edge to V
OUT
IN
rising
= 1.3 V
R
L
= 6.5
Ω from V edge to V
OUT
IN
falling
= 11.7 V
R
L
= 6.5
Ω from V
OUT to V
OUT
= 10.4 V
= 1.3 V
R
L
= 6.5
Ω from V
OUT to V
OUT
= 1.3 V
= 11.7 V
40
30
See
See
µs
µs
V/µs
V/µs
Input pin
V
IL
I
IL
V
IH
Input low level
Low level input current
Input high level
V
IN
= 1.25 V 1
3.25
1.25
V
µA
V
8/27 Doc ID 16782 Rev 3
VN750PS-E Electrical specifications
Table 5.
Symbol
Electrical characteristics (continued)
Parameter Test conditions Min.
V
V
I
IH hyst
ICL
High level input current
Input hysteresis voltage
Input clamp voltage
V
IN
= 3.25 V
0.5
I
IN
= 1 mA 6
I
IN
= -1 mA
V
CC
output diode
V
F
Forward on voltage
Status pin
-I
OUT
= 1.3 A; T j
= 150 °C
V
STAT
I
LSTAT
C
STAT
V
SCL
Protections
(1)
Status low output voltage I
STAT
= 1.6 mA
Status leakage current Normal operation; V
STAT
= 5 V
Status pin input capacitance Normal operation; V
STAT
= 5 V
Status clamp voltage
I
STAT
= 1 mA
I
STAT
= -1 mA
6
Typ.
6.8
-0.7
6.8
-0.7
Max.
10
8
0.6
0.5
10
100
8
V
T
T t
TSD
T
R hyst
SDL
Shutdown temperature
Reset temperature
Thermal hysteresis
Status delay in overload condition
T j
>T jsh
150
135
7
175
15
200
20 ms
I lim
Current limitation
V demag
Turn-off output clamp voltage
Open-load detection
I
9 V<V
CC
<36 V
5 V<V
CC
<36 V
OUT
= 2 A; V
L = 6 mH
IN
= 0 V;
V
6
CC
-41 V
9
CC
-48 V
15
15
CC
-55
A
A
V t t
I
OL
DOL(on)
V
OL
DOL(off)
Open-load on-state detection threshold
V
IN
= 5 V 50 200
Open-load on-state detection delay
Open-load off-state voltage detection threshold
Open-load detection delay at turn-off
I
OUT
= 0 A 200
V
IN
= 0 V 1.5
3.5
1000 mA
µs
µs
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles.
V
°C
°C
°C
V
µA pF
V
V
Unit
µA
V
V
V
Doc ID 16782 Rev 3 9/27
Electrical specifications
Figure 4.
Status timings
OPEN-LOAD STATUS TIMING (with external pull-up)
V
OUT
> V
OL
I
OUT
< I
OL
V
IN
V
STAT t
DOL(off) t
DOL(on)
Figure 5.
Switching time waveforms
V
OUT
80% dV
OUT
/dt
(on)
10%
90% dV
OUT
/dt
(off)
VN750PS-E
V
IN
OVERTEMP STATUS TIMING
T j
> T jsh
V
STAT t
SDL t
SDL t
V
IN t d(on) t d(off) t
Table 6.
Figure 1: Test Conditions for High Side switching times measurement.
Truth table
Conditions Input Output
Normal operation
Current limitation
Over temperature
Undervoltage
Overvoltage
L
H
L
H
L
H
L
H
H
L
H
L
L
L
L
L
L
L
X
X
L
H
Status
H
H
H
(T j
< T
TSD
) H
(T j
> T
TSD
) L
H
L
H
H
X
X
10/27 Doc ID 16782 Rev 3
VN750PS-E
Table 6.
Truth table (continued)
Conditions
Output voltage > V
OL
Output current < I
OL
Input
L
H
L
H
Output
H
H
L
H
Electrical specifications
Status
L
H
H
L
Table 7.
Electrical transient requirements on V
CC
pin (part 1/3)
Test levels
ISO T/R 7637/1 test pulse
I II III IV
3a
3b
4
1
2
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
Delays and impedance
2 ms 10
Ω
0.2 ms 10 Ω
0.1 µs 50
Ω
0.1 µs 50 Ω
100 ms, 0.01
Ω
400 ms, 2 Ω
Table 8.
Electrical transient requirements on V
CC
pin (part 2/3)
Test levels results
ISO T/R 7637/1 test pulse
I II III
1
2
3a
3b
4
5
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
IV
C
C
C
C
C
E
Table 9.
Class
C
E
Electrical transient requirements on V
CC
pin (part 3/3)
Contents
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 16782 Rev 3 11/27
Electrical specifications
Figure 6.
Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
V
CC
INPUT
LOAD VOLTAGE
STATUS
V
USD
UNDERVOLTAGE
V
USDhyst undefined
V
CC
<V
OV
OVERVOLTAGE
V
CC
>V
OV
V
CC
INPUT
LOAD VOLTAGE
STATUS
INPUT
LOAD VOLTAGE
STATUS
OPEN LOAD with external pull-up
V
OUT
>V
OL
V
OL
OPEN LOAD without external pull-up
INPUT
LOAD VOLTAGE
STATUS
T j
INPUT
LOAD CURRENT
STATUS
T
TSD
T
R
OVER TEMPERATURE
12/27 Doc ID 16782 Rev 3
VN750PS-E
VN750PS-E Electrical specifications
Figure 7.
Off-state output current
IL(off1) (uA)
3
2.5
2
1.5
1
Off state
Vcc=36V
Vin=Vout=0V
0.5
0
-0.5
-1
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 9.
Input clamp voltage
Vicl (V)
8
7.8
7.6
7.4
7.2
7
6.8
6.6
6.4
6.2
6
-50 -25
Iin=1mA
0 25 50 75
Tc (°C)
100 125 150 175
Figure 11.
Status low output voltage
Vstat (V)
0.6
0.5
0.4
Istat=1.6mA
0.3
0.2
0.1
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 8.
High level input current
Iih (uA)
7
6
Vin=3.25V
5
4
3
2
1
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 10.
Status leakage current
Ilstat (uA)
0.05
0.04
0.03
0.02
0.01
Vstat=5V
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 12.
Status clamp voltage
7.4
7.2
7
6.8
Vscl (V)
8
7.8
7.6
6.6
6.4
6.2
6
-50 -25
Istat=1mA
0 25 50 75
Tc (°C)
100 125 150 175
Doc ID 16782 Rev 3 13/27
Electrical specifications VN750PS-E
Figure 13.
On-state resistance vs T case
Ron (mOhm)
140
120
100
80
60
40
20
0
-50 -25
Iout=2A
Vcc=8V; 13V; 36V
0 25 50 75
Tc (ºC)
100 125 150 175
Figure 14.
On-state resistance vs V
CC
Ron (mOhm)
120
110
100
90
Iout=2A
Tc= 150°C
80
70
60
50
40
30
20
5 10 15 20
Vcc (V)
25
Tc= 125°C
Tc= 25°C
Tc= - 40°C
30 35 40
Figure 15.
Open-load on-state detection threshold
Figure 16.
Input high level
Iol (mA)
220
200
180
160
140
120
100
80
60
40
20
0
-50 -25
Vcc=13V
Vin=5V
0 25 50 75
Tc (ºC)
100 125 150 175
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 17.
Input low level
2.2
2
1.8
Vil (V)
2.8
2.6
2.4
1.6
1.4
1.2
1
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 18.
Input hysteresis voltage
Vhyst (V)
1.5
0.9
0.8
0.7
0.6
0.5
-50
1.4
1.3
1.2
1.1
1
-25 0 25 50 75
Tc (ºC)
100 125 150 175
14/27 Doc ID 16782 Rev 3
VN750PS-E Electrical specifications
Figure 19.
Overvoltage shutdown
44
42
40
38
36
34
Vov (V)
50
48
46
32
30
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 21.
Turn-on voltage slope dVout/dt/(on) (V/ms)
1000
900
800
700
Vcc=13V
Rl=6.5Ohm
600
500
400
300
200
100
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 23.
I lim
vs T case
16
14
12
10
8
Ilim (A)
20
18
6
4
2
0
-50 -25
Vcc=13V
0 25 50 75
Tc (ºC)
100 125 150 175
Figure 20.
Open-load off-state voltage detection threshold
Vol (V)
5
4.5
4
3.5
Vin=0V
3
2.5
2
1.5
1
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Figure 22.
Turn-off voltage slope dVout/dt(off) (V/ms)
500
450
400
350
Vcc=13V
Rl=6.5Ohm
300
250
200
150
100
50
0
-50 -25 0 25 50 75
Tc (ºC)
100 125 150 175
Doc ID 16782 Rev 3 15/27
Electrical specifications
Figure 24.
Application schematic
+5V +5V
R prot
STATUS
μ C R prot
INPUT
V
CC
GND
V
GND
R
GND
D
GND
OUTPUT
VN750PS-E
D ld
2.5
16/27
GND protection network against reverse battery
Solution 1: resistor in the ground line (R
GND
only). This can be used with any type of load.
The following is an indication on how to dimension the R
GND resistor.
1.
R
GND
≤
600 mV / (I
S(on)max
).
2. R
GND
≥ (− V
CC
) / ( − I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
< 0: during reverse battery situations) is:
P
D
= ( − V
CC
)
2
/R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND produces a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift varies depending on how many devices are on in the case of several high side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize solution 2 (see below).
Solution 2: diode (D
GND
) in the ground line A resistor (R
GND parallel to D
GND
if the device drives an inductive load.
=1 k Ω) should be inserted in
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift ( ≈ 600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the
Doc ID 16782 Rev 3
VN750PS-E Electrical specifications device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
Series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused input and status pin is to leave them unconnected.
2.6
2.7
2.8
Load dump protection
D ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
Microcontroller I/Os protection
If a ground protection network is used and negative transient are present on the V
CC
line, the control pins will be pulled negative. ST suggests to insert a resistor (R prot
) in line to prevent the microcontroller I/O pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of microcontroller I/Os.
-V
CCpeak
/I latchup
≤ R prot
≤ (V
OH µ C
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100 V and I latchup
≥ 20 mA; V
OH µ C
≥ 4.5 V
5 k Ω ≤ R prot
≤ 65 k Ω .
Recommended values: R prot
= 10 k Ω .
Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (R
PU output pin and a positive supply voltage (V
PU
) connected between
) like the +5V line used to supply the microprocessor.
The external resistor has to be selected according to the following requirements:
1.
no false open-load indication when load is connected: in this case we have to avoid
V
OUT
to be higher than V
Olmin
; this results in the following condition
V
OUT
= (V
PU
/ (R
L
+ R
PU
))R
L
< V
Olmin
.
2. no misdetection when load is disconnected: in this case the V
OUT
has to be higher than
V
OLmax
; this results in the following condition R
PU
< (V
PU
– V
OLmax
) / I
L(off2)
.
Because I s(OFF)
may significantly increase if V out
is pulled high (up to several mA), the pullup resistor R
PU
should be connected to a supply that is switched off when the module is in standby.
The values of V
OLmin
, V section.
OLmax
and I
L(off2)
are available in the electrical characteristics
Doc ID 16782 Rev 3 17/27
Electrical specifications
Figure 25.
Open-load detection in off-state
V batt.
V
CC
INPUT
STATUS
DRIVER
+
LOGIC
+
-
V
OL
R
GROUND
OUT
I L(off2)
V
PU
R
PU
R
L
VN750PS-E
18/27 Doc ID 16782 Rev 3
VN750PS-E
2.9
Electrical specifications
SO-8 maximum demagnetization energy (V
CC
= 13.5 V)
Figure 26.
SO-8 maximum turn-off current versus inductance
I LMAX (A)
100
10
1
0.1
B
C
A
1
L(mH)
10 100
A: T jstart
= 150 °C single pulse
B: T jstart
= 100 °C repetitive pulse
C: T jstart
= 125 °C repetitive pulse
V
IN
, I
L
Demagnetization Demagnetization Demagnetization
Note:
Values are generated with R
L
=0
Ω
.In case of repetitive pulses, T jstart must not exceed the temperature specified above for curves A and B.
(at beginning of each demagnetization) of every pulse t
Doc ID 16782 Rev 3 19/27
Package and PCB thermal data
3 Package and PCB thermal data
Figure 27.
PC board
VN750PS-E
20/27
Note:
.
Layout condition of R th
and Z th
measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm
2
, 0.8 cm
2
, 2 cm
2
).
Figure 28.
R thj-amb
vs PCB copper area in open box free air condition
SO-8 at 2 pins connected to TAB
RTHj_amb (ºC/W)
110
105
100
95
90
85
80
75
70
0 0.5
1 1.5
PCB Cu heatsink area (cm^2)
2 2.5
Doc ID 16782 Rev 3
VN750PS-E Package and PCB thermal data
Figure 29.
SO-8 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
100
0.5 cm
2
2 cm
2
10
1
0.1
0.01
0.0001
0.001
0.01
0.1
Time (s)
1 10 100 1000
Equation 1: pulse calculation formula
Z
TH
δ
= R
TH where δ = t
P
/T
⋅ δ
+ Z
THtp
(
1 –
δ )
Figure 30.
Thermal fitting model of a single channel
Doc ID 16782 Rev 3 21/27
Package and PCB thermal data
Table 10.
Thermal parameter
Area/island (cm
2
)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W·s/°C)
C2 (W·s/°C)
C3 (W·s/°C)
C4 (W·s/°C)
C5 (W·s/°C)
C6 (W·s/°C)
0.5
0.05
0.8
3.5
21
16
58
0.006
0.0026
0.0075
0.045
0.35
1.05
VN750PS-E
2
28
2
22/27 Doc ID 16782 Rev 3
VN750PS-E
4
Package and packing information
Package and packing information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
4.1 SO-8 package information
Figure 31.
SO-8 package dimensions
0016023 D
Doc ID 16782 Rev 3 23/27
Package and packing information VN750PS-E
Table 11.
SO-8 mechanical data mm
Dim.
A
Min. Typ. Max.
A1 0.10
A2 1.25
b 0.28
c 0.17
D
(1)
4.80
E 5.80
E1
(2)
3.80
4.90
6.00
3.90
1.75
0.25
0.48
0.23
5.00
6.20
4.00 h 0.25
L 0.40
L1 k 0° ccc
1.04
0.50
1.27
8°
0.10
1.
Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both side).
2.
Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side.
24/27 Doc ID 16782 Rev 3
VN750PS-E
4.2
Package and packing information
SO-8 packing information
The devices can be packed in tube or tape and reel shipments (see the Device summary on page 1
).
Figure 32.
SO-8 tube shipment (no suffix)
B
C
A
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
All dimensions are in mm.
100
2000
532
3.2
6
0.6
Figure 33.
SO-8 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
12
4
P 8
D (+0.1/-0) 1.5
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
1.5
5.5
4.5
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components No components
Empty components pockets saled with cover tape.
500mm min
User direction of feed
Start
Doc ID 16782 Rev 3 25/27
Revision history
Table 12.
Document revision history
Date Revision
23-Nov-2009
15-Oct-2010
19-Sep-2013
1
2
3
Changes
Initial release.
Updated following figure titles:
–
Figure 21: Turn-on voltage slope
–
Figure 22: Turn-off voltage slope
Updated Disclaimer.
VN750PS-E
26/27 Doc ID 16782 Rev 3
VN750PS-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2013 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
Doc ID 16782 Rev 3 27/27
Descargar
Enlace público actualizado
Se ha actualizado el enlace público a tu chat. Puedes ver y gestionar tus enlaces de chat después del registro aquí.
Enlace público del documento
Anuncio