STMicroelectronics VN5160S-E Datasheet
Iklan
Iklan
VN5160S-E
Single channel high side driver for automotive applications
Features
Max supply voltage
Operating voltage range
V
CC
V
CC
Max on-state resistance (per ch.) R
ON
Current limitation (typ) I
LIMH
Off-state supply current I
S
1.
Typical value with all loads connected
41V
4.5 to 36V
160 m
5.4 A
2 µA
(1)
■
■
Main
– Inrush current active management by power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC european directive
Diagnostic Functions
– Open drain status output
– On-state open load detection
– Off-state open load detection
– Thermal shutdown indication
■ Protection
– Undervoltage shutdown
– Overvoltage clamp
– Output stuck to Vcc detection
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of V
CC
– Thermal shutdown
Table 1.
Device summary
Package
SO-8
Tube
VN5160S-E
SO-8
– Reverse battery protection (see
)
– Electrostatic discharge protection
Applications
■ All types of resistive, inductive and capacitive loads
Description
The VN5160S-E is a monolithic device made using STMicroelectronics VIPower M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active V
CC
voltage clamp protects the device against low energy spikes.The device detects open load condition both in on and offstate, when STAT_DIS is left open or driven low.
Output shorted to V
CC
is detected in the off-state.
When STAT_DIS is driven high, STATUS is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long duration overload, the device limits the dissipated power to safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as fault condition disappears.
Order codes
Tape and reel
VN5160STR-E
September 2013 Doc ID 13493 Rev 5 1/31 www.st.com
1
Contents
Contents
VN5160S-E
Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 20
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21
Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
®
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/31 Doc ID 13493 Rev 5
VN5160S-E
List of tables
List of tables
=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Doc ID 13493 Rev 5 3/31
List of figures
List of figures
VN5160S-E
case
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
LIM
vs T case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal fitting model of a single-channel HSD in SO-8
. . . . . . . . . . . . . . . . . . . . . . . . . 25
4/31 Doc ID 13493 Rev 5
VN5160S-E
1
Block diagram and pins description
Block diagram and pins description
Figure 1.
Block diagram
V
CC
V
CC
CLAMP
GND
INPUT
STATUS
STAT_DIS
LOGIC
UNDERVOLTAGE
PwCLAMP
DRIVER
I
LIM
V
DSLIM
OPENLOAD ON
OPENLOAD OFF
OVERTEMP.
Pwr
LIM
Table 2.
Name
V
CC
OUTPUT
GND
INPUT
Pins function
STATUS
STAT_DIS
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state.
Open drain digital diagnostic pin.
Active high CMOS compatible pin, to disable the STATUS pin.
Doc ID 13493 Rev 5 5/31
Block diagram and pins description
Figure 2.
Configuration diagram (top view)
VN5160S-E
V
CC
OUTPUT
OUTPUT
V
CC
5
6
7
8
SO-8
4
3
2
1
STAT_DIS
STATUS
INPUT
GND
Table 3.
Suggested connections for unused and N.C. pins
Connection / Pin Status N.C.
Output Input
Floating
To ground
X
N.R.
(1)
X
X
X
N.R.
X
Through 10K
resistor
1.
Not recommended.
STAT_DIS
X
Through 10K
resistor
6/31 Doc ID 13493 Rev 5
VN5160S-E Electrical specifications
Note:
2.1
Figure 3.
Current and voltage conventions
V
SD
V
INn
I
SD
I
IN
V
CC
I
S
V
F
V
CC
STAT_DIS
INPUT
OUTPUT
STATUS
I
OUT
I
STAT
V
STAT
V
OUT
GND
I
GND
V
F
= V
OUT
- V
CC
during reverse battery condition.
Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
Table 4.
Symbol
Absolute maximum ratings
Parameter
V
CC
- V
CC
- I
GND
DC supply voltage
Reverse DC supply voltage
DC reverse ground pin current
I
OUT
DC output current
- I
OUT
I
IN
I
STAT
Reverse DC output current
DC input current
DC status current
I
STAT_DIS
DC status disable current
E
MAX
Maximum switching energy (single pulse)
(L= 12mH; R
L
= 0
; V bat
=13.5V; T jstart
=150ºC; I
OUT
= I limL
(Typ.))
Value
41
0.3
200
Internally limited
6
+10 / -1
+10 / -1
+10 / -1
34
A mA mA mA
Unit
V
V mA
A mJ
Doc ID 13493 Rev 5 7/31
Electrical specifications VN5160S-E
Table 4.
Absolute maximum ratings (continued)
Symbol Parameter
Electrostatic discharge (Human Body Model: R=1.5K
C=100pF)
– INPUT
V
ESD
V
ESD
– STATUS
– STAT_DIS
– OUTPUT
– V
CC
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature T j
T stg
Storage temperature
Value
4000
4000
4000
5000
5000
750
-40 to 150
-55 to 150
Unit
V
°C
°C
V
V
V
V
V
Table 5.
Symbol
Thermal data
Parameter
R thj-pins
Thermal resistance junction-pins (MAX)
R thj-amb
Thermal resistance junction-ambient (MAX)
Value
30
See
Unit
°C/W
°C/W
8/31 Doc ID 13493 Rev 5
VN5160S-E Electrical specifications
Values specified in this section are for 8V<V
CC stated.
<36V; -40°C<T j
<150°C, unless otherwise
Table 6.
Symbol
Power section
Parameter Test conditions Min.
Typ. Max. Unit
V
CC
Operating supply voltage
V
USD
Undervoltage shutdown
V
USDhyst
Undervoltage shutdown hysteresis
R
V
I
ON
I
S
(1) clamp
L(off1)
I
L(off2)
On-state resistance
Clamp voltage
Supply current
Off-state output current
(2)
I
OUT
=1A; T j
=25°C
I
OUT
=1A; T j
=150°C
I
OUT
=1A; V
CC
=5V; T j
=25°C
I
S
= 20mA
Off-state; V
CC
=13V; V
IN
=V
OUT
=0V;
T j
=25°C;
On-state; V
CC
=13V; V
IN
=5V;
I
OUT
=0A
V
IN
=V
OUT
=0V; V
CC
=13V; Tj=25°C
V
IN
=V
OUT
=0V; V
CC
=13V; T j
=125°C
V
IN
= 0V; V
OUT
= 4V
V
F
Output - V
CC
diode voltage
-I
1.
Guaranteed by design/characterization
2.
PowerMOS leakage included
OUT
= 0.6A; T j
= 150°C
4.5
41
0
0
-75
13
3.5
0.5
46
2
(2)
1.9
0.01
5
36
4.5
160
320
210
52
(1)(2)
3.5
3
5
0
0.7
V
V
V m
m
m
V
µA mA
µA
V
Table 7.
Symbol
Switching (V
CC
= 13V; T j
= 25°C)
Parameter Test conditions t t d(on) d(off) dV
OUT
/dt
(on) dV
OUT
/dt
(off)
Turn-on delay time R
L
= 13
(see
)
Turn-off delay time R
L
= 13
Turn-on voltage slope R
L
= 13
Turn-off voltage slope R
L
= 13
W
W
ON
OFF
Switching energy losses during t won
Switching energy losses during t woff
R
R
L
L
= 13
= 13
Min.
Typ.
Max.
Unit
10
15
µs
µs
V
µs
V
µs
0.04
mJ
0.04
mJ
Doc ID 13493 Rev 5 9/31
Electrical specifications VN5160S-E
Table 8.
Symbol
V
STAT
I
LSTAT
C
STAT
V
SCL
Status pin (V
SD
=0)
Parameter Test conditions
Status low output voltage I
STAT
= 1.6 mA, V
SD
= 0V
Status leakage current
Normal operation or V
SD
= 5V,
V
STAT
= 5V
Status pin input capacitance
Status clamp voltage
Normal operation or V
V
STAT
= 5V
I
STAT
= 1mA
I
STAT
= - 1mA
SD
=5V,
Min.
Typ. Max. Unit
0.5
V
10 µA
5.5
-0.7
100 pF
7 V
V
Table 9.
Symbol
Protection
(1)
Parameter Test conditions Min.
Typ.
Max.
Unit
I limH
DC short circuit current
V
CC
= 13V
5V<V
CC
<36V
I limL
Short circuit current during thermal cycling
V
CC
= 13V; T
R
<T j
<T
T
TSD
T
R
T
RS
T
HYST
Shutdown temperature
Reset temperature
Thermal reset of STATUS t
SDL
Thermal hysteresis (T
TSD
-T
R
)
Status delay in overload conditions
T j
>T
TSD
V
DEMAG
Turn-off output voltage clamp
I
OUT
=150mA; V
IN
=0
V
ON
Output voltage drop limitation
I
OUT
= 0.03A;
T j
=-40°C...+150°C
(see
)
TSD
V
3.8
150
CC
-41 V
5.4
2
175
T
RS
+ 1 T
RS
+ 5
135
7
CC
-46 V
25
7.5
7.5
200
20
CC
-52
1.
To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
A
A
A
µs
V mV
°C
°C
°C
°C
10/31 Doc ID 13493 Rev 5
VN5160S-E Electrical specifications
Table 10.
Openload detection
Symbol Parameter Test conditions Min.
I
OL t
DOL(on)
Openload on-state detection threshold
Openload on-state detection delay t
POL
I
V
IN
= 5V, 8V<V
OUT
= 0A, V
CC
=13V
(see
)
CC
<18V 10
Delay between INPUT falling edge and STATUS rising edge in openload condition
I
OUT
= 0A (see
) 200
V
OL
Openload off-state voltage detection threshold
V
IN
= 0V, 8V<V
CC
<16V 2 t
DSTKON
Output short circuit to V cc detection delay at turn-off
180
Typ.
See
500
See
Max.
Unit
40
200 t
POL mA
µs
1000 µs
4 V
µs
Table 11.
Logic input
Symbol Parameter Test conditions
V
IL
I
IL
V
IH
I
IH
V
I(hyst)
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
V
V
IN
IN
= 0.9V
= 2.1V
V
V
ICL
SDCL
Input clamp voltage
STAT_DIS clamp voltage
I
IN
= 1mA
I
IN
= -1mA
V
SDL
I
SDL
V
SDH
I
SDH
V
SD(hyst)
STAT_DIS low level voltage
Low level STAT_DIS current V
CSD
= 0.9V
STAT_DIS high level voltage
High level STAT_DIS current V
CSD
= 2.1V
STAT_DIS hysteresis voltage
I
SD
= 1mA
I
SD
= -1mA
Min.
Typ.
Max.
Unit
0.9
1
2.1
0.25
5.5
1
2.1
0.25
5.5
-0.7
-0.7
10
7
0.9
10
7
µA
V
µA
V
V
V
V
µA
V
µA
V
V
V
V
Doc ID 13493 Rev 5 11/31
Electrical specifications VN5160S-E
Figure 4.
Status timings
V
OPEN LOAD STATUS TIMING (without external pull-up)
IN
I
OUT
< I
OL
V
OUT
< V
OL
V
OPEN LOAD STATUS TIMING (with external pull-up)
IN
I
OUT
< I
OL
V
OUT
> V
OL
V
STAT
V
STAT t
DOL(on) t
POL t
DOL(on)
V
IN
V
STAT t
DOL(on)
OUTPUT STUCK TO Vcc
I
OUT
> I
OL
V
OUT
> V
OL t
DSTKON
V
IN
OVER TEMP STATUS TIMING
T j
> T
TSD
V
STAT t
SDL t
SDL
Figure 5.
Output voltage drop limitation
V cc
-V out
T j
=150 o
C
T j
=25 o
C
T j
=-40 o
C
V on
V on
/R on(T)
I out
12/31 Doc ID 13493 Rev 5
VN5160S-E Electrical specifications
Table 12.
Truth table
Conditions INPUT OUTPUT
Normal operation
Current limitation
Overtemperature
Undervoltage
Output voltage > V
Output current < I
OL
OL
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
X
L
L
L
L
H
H
L
H
1.
If the V
SD
is high, the STATUS pin is in a high impedance.
2.
The STATUS pin is low with a delay equal to t
DSTKON
after INPUT falling edge.
3.
The STATUS pin becomes high with a delay equal to t
POL
after INPUT falling edge.
STATUS (V
SD
=0V)
(1)
H
H
H
H
H
L
X
X
L
(2)
H
H
(3)
L
Figure 6.
Switching characteristics
V
OUT t
Won
80% dV
OUT
/dt
(on) t r
10%
INPUT t d(on) t d(off) t
Woff
90% t f dV
OUT
/dt
(off) t t
Doc ID 13493 Rev 5 13/31
Electrical specifications VN5160S-E
Table 13.
Electrical transient requirements (part 1/3)
ISO 7637-2:
2004(E)
Test pulse III
Test levels
IV
Number of pulses or test times
Burst cycle/pulse repetition time
1
2a
3a
3b
-75V
+37V
-100V
+75V
-100V
+50V
-150V
+100V
5000 pulses
5000 pulses
1h
1h
0.5 s
0.2 s
90 ms
90 ms
5 s
5 s
100 ms
100 ms
4 -6V -7V 1 pulse
5b
(1)
+65V +87V 1 pulse
1.
Valid in case of external load dump clamp: 40V maximum referred to ground.
Delays and impedance
2 ms, 10
50 µs, 2
0.1 µs, 50
0.1 µs, 50
100 ms,
0.01
400 ms, 2
Table 14.
Electrical transient requirements (part 2/3)
ISO 7637-2:
2004(E)
Test pulse III
Test level results
(1)
IV
1
2a
3a
C
C
C
3b C C
4
5b
(2)
C C
C
1.
The above test levels must be considered referred to V
CC
= 13.5V except for pulse 5b.
2.
Valid in case of external load dump clamp: 40V maximum referred to ground.
C
C
C
C
Table 15.
Electrical transient requirements (part 3/3)
Class Contents
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
14/31 Doc ID 13493 Rev 5
VN5160S-E Electrical specifications
Figure 7.
Waveforms
NORMAL OPERATION
INPUT
STAT_DIS
LOAD CURRENT
STATUS
UNDERVOLTAGE
V
USDhyst
V
CC
INPUT
STAT_DIS
LOAD CURRENT
STATUS
V
USD undefined
OPEN LOAD with external pull-up
INPUT
STAT_DIS
LOAD VOLTAGE
STATUS
V
OL
V
OUT
>V
OL
OPEN LOAD without external pull-up
INPUT
STAT_DIS
LOAD VOLTAGE
LOAD CURRENT
STATUS t
I
OUT
POL
<I
OL
RESISTIVE SHORT TO Vcc, NORMAL LOAD
INPUT
STAT_DIS
LOAD VOLTAGE
STATUS
T j
T
R
T
TSD
T
RS
INPUT
STAT_DIS
LOAD CURRENT
STATUS
I
OUT
>I
OL V
OUT
>V
OL t
DSTKON
OVERLOAD OPERATION
V
OL
I
LIMH
I
LIML current limitation power limitation thermal cycling
SHORTED LOAD NORMAL LOAD
Doc ID 13493 Rev 5 15/31
Electrical specifications VN5160S-E
Figure 8.
Off-state output current
Iloff[nA]
600
500
400
300
200
100
0
-50 -25 0
Off-state
Vcc=13V
Vin=Vout=0V
25 50 75
Tc (°C)
100 125 150 175
Figure 10. High-level input current
Iih[µA]
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50 -25 0
Vin = 2.1V
25 50 75 100 125 150 175
Tc (°C)
Figure 12. Input low-level voltage
Vil[V]
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 9.
Input clamp voltage
Vicl[V]
7.0
6.8
6.6
6.4
6.2
6.0
5.8
5.6
5.4
5.2
5.0
-50 -25 0
Iin = 1mA
25 50 75 100 125 150 175
Tc (°C)
Figure 11. Input high-level voltage
Vih[V]
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 13. Input hysteresis voltage
Vihyst[V]
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
16/31 Doc ID 13493 Rev 5
VN5160S-E Electrical specifications
Figure 14. Status low-output voltage
Vstat[V]
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-50 -25
Istat = 1.6mA
0 25 50 75
Tc (°C)
100 125 150 175
Figure 16. Status clamp voltage
Vscl[V]
9.0
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
-50 -25
Istat = 1mA
0 25 50 75
Tc (°C)
100 125 150 175
Figure 18. On-state resistance vs V
CC
Ronl[m Ohm ]
300
175
150
125
100
75
50
275
250
225
200
0 5
Tc = 150°C
Tc = 125°C
10 15 20
Vcc[V]
25
Tc = 25°C
Tc = -40°C
30 35 40
Figure 15. Status leakage current
Ilstat[µA]
0.075
0.065
0.055
0.045
0.035
0.025
0.015
-50 -25 0
Vstat = 5V
25 50 75 100 125 150 175
Tc (°C)
Figure 17. On-state resistance vs T case
Ronl[m Ohm ]
300
250
200
150
100
50
0
-50 -25
Iout = 1A
Vcc = 13V
0 25 50 75
Tc (°C)
100 125 150 175
Figure 19. Open-load on-state detection threshold
Iol[m A]
60
50
40
30
100
90
80
70
20
10
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Doc ID 13493 Rev 5 17/31
Electrical specifications VN5160S-E
Figure 20. Open-load off-state voltage detection threshold
Vol[V]
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-50 -25 0
Vin = 0V
25 50 75
Tc (°C)
100 125 150 175
Figure 22. Turn-off voltage slope
(dVout/dt)off[V/ms]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0
Vcc = 13V
RL = 13Ohm
25 50 75
Tc (°C)
100 125 150 175
Figure 24. Undervoltage shutdown
12
10
8
Vusd[V]
16
14
6
4
2
0
-50 -25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 21. Turn-on voltage slope
(dVout/dt)on[V/ms]
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0
Vcc = 13V
RL = 13Ohm
25 50 75 100 125 150 175
Tc (°C)
Figure 23. I
LIM
vs T case
Ilim h[A]
16
14
12
10
8
6
4
2
0
-50 -25 0
Vcc = 13V
25 50 75
Tc (°C)
100 125 150 175
Figure 25. STAT_DIS clamp voltage
Vsdcl[V]
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
-50 -25 0
Ini = 1mA
25 50 75
Tc (°C)
100 125 150 175
18/31 Doc ID 13493 Rev 5
VN5160S-E Electrical specifications
Figure 26. High-level STAT_DIS voltage
2
1
4
3
0
-50
6
5
VsdH[V]
8
7
-25 0 25 50 75
Tc (°C)
100 125 150 175
Figure 27. Low-level STAT_DIS voltage
5
4
3
2
1
0
-50
7
6
VsdL[V]
8
-25 0 25 50 75
Tc (°C)
100 125 150 175
Doc ID 13493 Rev 5 19/31
Application Information VN5160S-E
Figure 28. Application schematic
+5V +5V
R prot
STAT_DIS
µC
R prot
R prot
INPUT
STATUS
V
CC
GND
V
GND
R
GND
D
GND
OUTPUT
D ld
3.1
20/31
GND protection network against reverse battery
resistor in the ground line (R
GND
only)
This can be used with any type of load.
The following is an indication on how to dimension the R
GND resistor.
1.
R
GND
600mV / (I
S(on)max
)
2. R
GND
V
CC
) / (-I
GND
) where -I
GND
is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet.
Power dissipation in R
GND
(when V
CC
<0: during reverse battery situations) is:
P
D
= (-V
CC
)
2
/ R
GND
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the maximum On-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
R
GND will produce a shift (I
S(on)max
* R
GND
) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below).
Doc ID 13493 Rev 5
VN5160S-E
3.1.2
Application Information
Solution 2: a diode (D
GND
) in the ground line
A resistor (R
GND
=1k
should be inserted in parallel to D inductive load.
GND
if the device drives an
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (
600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
3.3
3.4
D ld
is necessary ( Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V
CC
line, the control pins will be pulled negative. ST suggests to insert a resistor (R prot
) in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-V
CCpeak
/I latchup
R prot
(V
OH
C -V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100V and I latchup
20mA; V
OHµC
4.5V
5k
R prot
180k.
Recommended R prot values is 10k
Open load detection in off-state
Off-state open load detection requires an external pull-up resistor (R
PU
) connected between
OUTPUT pin and a positive supply voltage (V
PU
) like the +5V line used to supply the microprocessor.
The external resistor has to be selected according to the following requirements:
1.
no false open load indication when load is connected: in this case we have to avoid
V
OUT
V
OUT
to be higher than V
Olmin
; this results in the following condition
= (V
PU
/(R
L
+R
PU
))R
L
<V
Olmin
.
2. no misdetection when load is disconnected: in this case the V out
has to be higher than
V
OLmax
; this results in the following condition R
PU
<(V
PU
–V
OLmax
)/I
L(off2)
.
Because I s(OFF)
may significantly increase if V out
is pulled high (up to several mA), the pullup resistor R
PU
should be connected to a supply that is switched OFF when the module is in standby.
Doc ID 13493 Rev 5 21/31
Application Information VN5160S-E
The values of V
OLmin section.
, V
OLmax
and I
L(off2)
are available in the Electrical characteristics
Figure 29. Open-load detection in off-state
V batt.
V
PU
V CC
R
PU
INPUT
DRIVER
+
LOGIC
I L(off2)
OUT
STATUS
+
-
V
OL
R
R
L
GROUND
22/31 Doc ID 13493 Rev 5
VN5160S-E
3.5
Application Information
Maximum demagnetization energy (V
CC
= 13.5V)
Figure 30. Maximum turn-off current versus inductance
10
C
A
B
1
0,1
0,1 1 L (mH) 10 100
A: T jstart
= 150°C single pulse
B: T jstart
= 100°C repetitive pulse
C: T jstart
= 125°C repetitive pulse
V
IN
, I
L
Demagnetization Demagnetization Demagnetization
Note: t
Values are generated with R
L
=0
In case of repetitive pulses, T jstart
(at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
Doc ID 13493 Rev 5 23/31
Package and PCB thermal data
4 Package and PCB thermal data
4.1 SO-8 thermal data
Figure 31. SO-8 PC board
VN5160S-E
Note: Layout condition of R th
and Z th
measurements (PCB: FR4 area= 4.8 mm x 4.8 mm, PCB thickness=2 mm, Cu thickness= 35 µm, Copper areas: from minimum pad lay-out to 2 cm
2
).
Figure 32. R thj-amb
vs PCB copper area in open box free air condition
RTHj_amb(°C/W)
110
100
90
80
70
60
0 0.5
1 1.5
PCB Cu heatsink area (cm^2)
2 2.5
24/31 Doc ID 13493 Rev 5
VN5160S-E Package and PCB thermal data
Figure 33. SO-8 Thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
100
Footprint
2 cm
2
10
1
0.1
0.0001
0.001
0.01
0.1
Time (s)
1 10 100
Equation 1: pulse calculation formula
Z
TH
= R
TH where
= t
P
/T
THtp
1 –
Figure 34. Thermal fitting model of a single-channel HSD in SO-8
1000
1.
The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Doc ID 13493 Rev 5 25/31
Package and PCB thermal data
Table 16.
Thermal parameter
Area/island (cm
2
)
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Footprint
0.0008
0.0016
0.0075
0.045
0.35
1.05
1.2
6
3.5
21
16
58
VN5160S-E
2
28
2
26/31 Doc ID 13493 Rev 5
VN5160S-E
5
Package and packing information
Package and packing information
5.1 ECOPACK
®
packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
5.2 Package mechanical data
Figure 35. SO-8 package dimensions
Doc ID 13493 Rev 5 27/31
Package and packing information
SO-8 Table 17.
SO-8 mechanical data
Dim.
Min.
b b1
C c1
D
A a1 a2 a3
L
M
S
L1
E e e3
F
0.1
0.65
0.35
0.19
0.25
4.8
5.8
3.8
0.4
0.8
Millimeter
Typ.
45 (typ.)
1.27
3.81
8 (max.)
VN5160S-E
Max.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
5
6.2
4
1.27
0.6
1.2
28/31 Doc ID 13493 Rev 5
VN5160S-E Package and packing information
Figure 36. SO-8 tube shipment (no suffix)
B
C
A
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
All dimensions are in mm.
100
2000
532
3.2
6
0.6
Figure 37. SO-8 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
12
4
P 8
D (+ 0.1/-0) 1.5
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
1.5
5.5
4.5
2
All dimensions are in mm.
End
Top cover tape
No components
500mm min
Components No components
Empty components pockets saled with cover tape.
500mm min
User direction of feed
Start
Doc ID 13493 Rev 5 29/31
Revision history VN5160S-E
Table 18.
Document revision history
Date
Feb-2007
May-2007
17-Dec-2007
23-Nov-2009
20-Sep-2013
Revision
1
2
3
4
5
Changes
Initial release.
Document rewritten, restructured and put in corporate technical literature template.
Table 4: Absolute maximum ratings : changed E
MAX value from
14 to 34 mJ.
Table 13: Electrical transient requirements (part 1/3)
: updated test level values III and IV for test pulse 5b and notes.
Added Section 3.5: Maximum demagnetization energy (VCC =
.
Figure 34: Thermal fitting model of a single-channel HSD in
: added note.
Updated Section 2.3: Electrical characteristics
.
Updated Section 2.4: Electrical characteristics curves .
Updated Table 6: Power section .
Updated Disclaimer
30/31 Doc ID 13493 Rev 5
VN5160S-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
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OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
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DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
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Information in this document supersedes and replaces all information previously supplied.
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Doc ID 13493 Rev 5 31/31
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