STMicroelectronics STG3692 Datasheet
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تبلیغات
STG3692
Datasheet
Low voltage high bandwidth quad SPDT switch
QFN16L
(2.6x1.8 mm)
Product status link
STG3692
Product summary
Order code STG3692QTR
Package
Packing
QFN16L (2.6x1.8 mm)
Tape and reel
Features
• Ultra low power dissipation:
– I
CC
= 3 µA at T
A
= 85 °C
• Low on-resistance:
– R
DS(on)
= 4.6 Ω (T
A
= 25 °C) at V
CC
= 4.3 V
– R
DS(on)
= 5.8 Ω (T
A
= 25 °C) at V
CC
= 3.0 V
• Wide operating voltage range:
– V
CC
(opr) = 1.65 V to 4.3 V single supply
• 4.3 V tolerant and 1.8 V compatible threshold on digital control input at V
CC
=
2.3 V to 3.0 V
• Typical bandwidth (-3 dB) at 500 MHz on all channels
• Latch-up performance exceeds 100 mA per JESD 78, Class II
• ESD performance exceeds JESD22
– 2000-V human body model (A114-A)
• USB (2.0) high speed (480 Mbps) signal switching compliant
Description
The STG3692 is a high-speed CMOS low voltage quad analog SPDT (single pole dual throw) switch or 2:1 multiplexer /demultiplexer switch developed in silicon gate
C2MOS technology. It is designed to operate from 1.65 V to 4.3 V, making this device ideal for portable applications.
The nSEL inputs are provided to control the switch. The switch S1 is ON (connected to common ports Dn) when the nSEL input is held high and OFF (high impedance state exists between the two ports) when SEL is held low; the switch S2 is ON
(connected to common port D) when the nSEL input is held low and OFF (high impedance state exists between the two ports) when nSEL is held high. Additional key features are fast switching speed, break-before-make delay time and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.
DS4909 - Rev 9 - December 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
1
1.1
1.2
Note:
Pin settings
Pin connections
1S2
Figure 1. Pin connection (top through view)
D1 1S1 4S2 D4
16 15 14 13
1 12 4S1
V
CC
2
1-2SEL 3
11 GND
10 3-4SEL
2S1 4 9 3S2
5
D2
6 7 8
D3
2S2 3S1
Pin description
Pin
15, 1
4, 6
7, 9
12, 14
16, 5, 8, 13
3, 10
2
11
Table 1. Pin description
Symbol
1S1, 1S2
2S1, 2S2
3S1, 3S2
4S1, 4S2
D1, D2, D3, D4
1-2SEL, 3-4SEL
V
CC
GND
Name and function
Independent channels
Common channels
Control
Positive supply voltage
Ground (0 V)
Exposed pad must be soldered to a floating plane. Do not connect to power or ground.
STG3692
Pin settings
DS4909 - Rev 9 page 2/20
2 Device summary
Figure 2. Input equivalent circuit
D S2
STG3692
Device summary
S1
SEL
H
L
1. High impedance
SEL
Table 2. Truth table
SWITCH S1
ON
SWITCH S2
ON
DS4909 - Rev 9 page 3/20
3
3.1
STG3692
Maximum ratings
Maximum ratings
Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality documents.
Table 3. Absolute maximum ratings
Symbol
I
IK
I
OK
I
O
I
OP
V
CC
V
I
V
IC
V
O
I
IKC
I
CC
or I
GND
P
D
T stg
T
L
1. Derate above 70 °C by 18.5 mW/C.
Parameter
Supply voltage
DC input voltage
DC control input voltage
DC output voltage
DC input diode current on control pin (V
DC output current
DC output current peak (pulse at 1 ms, 10% duty cycle)
DC V
CC
or ground current
Power dissipation at T
A
Storage temperature
Lead temperature (10 s)
SEL
DC input diode current (V
SEL
<0 V)
DC output diode current
<0 V)
Recommended operating conditions
Value
-0.5 to 5.5
-0.5 to V
CC
+ 0.5
-0.5 to 5.5
-0.5 to V
CC
+ 0.5
-50
±50
±20
±128
±300
±100
1120
-65 to 150
300 mA mA mA mA mA
Unit
V
V
V
V mA mW
°C
°C
Symbol
V
CC
V
I
V
IC
V
O
T op dt/dv
Table 4. Recommended operating conditions
Parameters
Supply voltage
Input voltage
Control input voltage
Output voltage
Operating temperature
Input rise and fall time control input
V
CC
= 1.65 V to 2.7 V
V
CC
= 3.0 to 4.3 V
Value
1.65 to 4.3
0 to V
CC
0 to 4.3
0 to V
CC
-40 to 85
0 to 20
0 to 10
Unit
V
°C ns/V
DS4909 - Rev 9 page 4/20
STG3692
Electrical characteristics
4 Electrical characteristics
Symbol
V
IH
V
IL
R
PEAK
R
ON
ΔR
ON
R
FLAT
I
OFF
I
ON
Parameter
High level input voltage
Low level input voltage
Switch-on peak resistance
Switch-on resistance
ON-resistance match between
ON-resistance flatness
OFF-state leakage current (SN)
ON-state leakage current (D)
1.8
2.7
3
3.7
4.3
1.8
2.7
3
3.7
4.3
V
CC
(V)
1.65 -1.95
2.3-2.5
2.7-3.0
3.3-3.6
4.3
1.65-1.95
2.3-2.5
2.7-3.0
3.3-3.6
4.3
1.8
2.7
3
3.7
4.3
Table 5. DC specifications
Test conditions
Min.
0.65 V
CC
1.2
1.3
1.4
1.6
T
A
= 25 °C
Typ.
V
S
= 0 V to V
CC
,
I
S
= 8 mA
12
6.3
5.8
5
4.6
3
3
V
S
= 3 V,
I
S
= 8 mA
V
S
= 0.8 V,
I
S
= 8 mA
4
5
V
S
@ R
ON
max.,
I
S
= 8 mA
V
S
= 0 V to V
CC
,
I
S
= 8 mA
0.3
6.6
2
1.7
1.5
1.6
4.3
4.3
V
S
= 0.3 V and V
D
= 4 V or
V
S
= 4 V and V
D
= 0.3 V
V
S
= 0.3 V and V
D
= 4 V or
V
S
= 4 V and V
D
= 0.3 V
Value
Max.
5.2
6.5
±20
±20
16
8
7.5
6.5
6.0
0.25
0.25
0.25
0.30
0.40
-40 to 85 °C
Min.
Max.
0.65 V
CC
1.2
1.3
1.4
1.6
±100
±100
Unit
V
V
Ω
Ω
Ω
Ω nA nA
DS4909 - Rev 9 page 5/20
STG3692
Electrical characteristics
Test conditions Value
Symbol Parameter
V
CC
(V)
Min.
T
A
= 25 °C
Typ.
Max.
I
I
SEL
CC
SEL input leakage current
Quiescent supply current
0 to 4.3
1.65 to 4.3
V
V
SEL
SEL
= 0 to 4.3 V
= V
CC
or GND
±0.1
0.1
I
CCLV
Quiescent supply current low voltage driving
4.3
V
1-2SEL
,
V
3-4SEL
= 1.65 V
V
1-2SEL
,
V
3-4SEL
= 1.80 V
V
1-2SEL
,
V
3-4SEL
= 2.60 V
20
17
6
1. ΔRon = max. |mSN-nSN|, where m = 1..4 and n = 1..4, N = 1..2
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges.
25
22
11
-40 to 85 °C
Min.
Max.
2
3
35
30
20
Symbol t
PLH
, t
PHL t
ON t
OFF t
D
Q
Table 6. Analog switch characteristics (C
L
= 35 pF, R
L
= 50 Ω, t r
= t f
≤ 5 ns)
Parameter V
CC
(V)
Test conditions
T
A
= 25 °C
Min.
Value
Max.
Propagation delay
Turn-on time
Turn-off time
Break- before-make time delay
Charge injection
1.65 -1.95
2.3-2.7
3.0-3.3
3.6-4.3
1.65 -1.95
2.3-2.7
3.0-3.3
3.6-4.3
1.65 -1.95
2.3-2.7
3.0-3.3
3.6-4.3
1.65-1.95
2.3-2.7
3.0-3.3
3.6-4.3
1.65
2.3
3
4.3
V
S
= 0.8 V
V
S
= 1.5 V
V
S
= 0.8 V
V
S
= 1.5 V
C
L
= 35 pF,
R
L
= 50 Ω,
V
S
= 1.5 V
C
L
= 100 pF,
V
GEN
= 0 V,
R
GEN
= 0 Ω
1
1
1
1
31
20
15
12
22
14
11
10
7
5
4
3
2.8
3.5
3.8
5
Typ.
0.3
0.3
0.25
0.25
26
20
15
18
14
13
-40 to 85 °C
Min.
Max.
34
26
20
23
18
17
Unit
µA
µA
µA
Unit ns ns ns ns pC
DS4909 - Rev 9 page 6/20
STG3692
Electrical characteristics
Symbol Parameter
Table 7. Analog switch characteristics (C
L
= 5 pF, R
L
= 50 Ω, T
A
= 25 °C)
V
CC
(V)
Test conditions
T
A
= 25 °C
Min.
Typ.
Value
Max.
-40 to 85 °C
Min.
Max.
OIRR
X
B talk
D
D
C
W
G
P
IN
Off isolation
Crosstalk
-3 dB bandwidth
Differential gain
Differential phase
Control pin input capacitance
1.65 - 4.3
1.65 - 4.3
3.0 - 4.3
3.0 - 4.3
3.0 - 4.3
3.3
DC bias = V
CC
/2, f = 1 MHz, signal = 0 dBm
DC bias = V
CC
/2, f = 10 MHz, signal = 0 dBm
DC bias = V
CC
/2, f = 1 MHz, signal = 0 dBm
DC bias = V
CC
/2, f = 10 MHz, signal = 0 dBm
R
L
= 50 Ω,
DC bias = V
CC
/2, signal = 0 dBm
R
L
= 150 Ω
R
L
= 150 Ω f = 1 MHz,
V
S
= 0.1 Vpp
C
C
ON
OFF
Sn port capacitance when switch is enabled
Sn port capacitance when switch is disabled
3.3
3.3
f = 1 MHz,
V
S
= 0.1 Vpp f = 1 MHz,
V
S
= 0.1 Vpp
1. Off isolation = 20 Log10 (V
D
/V
S
), V
D
= output. V
S
= input to off switch.
-79
-60
-78
-61
500
0.64
0.1
6.2
12
5
Unit dB dB
MHz
% deg pF pF pF
Symbol Parameter
Table 8. USB related AC electrical characteristics
Test conditions
V
CC
(V) T
A
= 25 °C
Min.
Typ.
Value
Max.
3.0 to 3.6
C
L
= 10 pF 26
-40 to 85 °C
Min.
Max.
Unit ps t
SK(0) t
SK(P)
Channel-to-channel skew
Skew of opposite transition of the same output
3.0 to 3.6
60 ps
T
J
Total jitter 3.0 to 3.6
C
L
= 10 pF
R
L
= 50 Ω,
C
L
= 10 pF, t
R
= t
F
= 750 ps at 480 Mbps
130 ps
DS4909 - Rev 9 page 7/20
5 Test circuits
D
Vcc
SEL
Figure 3. On-resistance
I
DS
V
Vcc
S2
S1
Vs
GND
Figure 4. Bandwidth
Vcc
STG3692
Test circuits
Vout
50 Ohm
D
GND
SEL
S2
S1
~
Vs
GND
DS4909 - Rev 9 page 8/20
DS4909 - Rev 9
STG3692
Test circuits
Figure 5. Off leakage
Vcc
D
Vd
GND
SEL
I
ON
A
D
Vd
GND
SEL
GND
Figure 6. On leakage
Vcc
GND
S2
S1
IOFF
A
Vs
S2
S1
Vs page 9/20
DS4909 - Rev 9
STG3692
Test circuits
D
50 Ohm
GND
SEL
Figure 7. Channel-to-channel crosstalk
Vcc
S2
S1
Vout
~
Vs
GND
Figure 8. OFF isolation
Vcc
Vout
50 Ohm
D
Vcc
SEL
S2
S1
~
Vs
GND page 10/20
Figure 9. Test circuits
STG3692
Test circuits
Note: 1.
C
L
= 5/35 pF or equivalent: (includes jig capacitance)
2.
R
L
= 50 Ω or equivalent
3.
R
T
= Z
OUT
of pulse generator (typically 50 Ω)
Figure 10. Break-before-make time delay
Vcc
Vout
C
L
D
R
L
S2
Vs
S1
SEL
V
IN
GND
Vout
C
L
Figure 11. Switching time and charge injection (V
GEN
= 0 V, R
GEN
= 0 Ω, RL = 1 MΩ, CL= 100 pF)
Vcc
D
R
L
S2
S1
R
GEN
SEL
V
GEN
V
IN
GND
DS4909 - Rev 9 page 11/20
Vout
C
L
D
R
L
SEL
V
IN
Figure 12. Turn-on, turn-off delay time
Vcc
S2
S1
GND
STG3692
Test circuits
DS4909 - Rev 9 page 12/20
6
6.1
STG3692
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
QFN16 (2.6x1.8 mm) package information
Figure 13. QFN16L (2.6x1.8 mm) package outline
DS4909 - Rev 9 page 13/20
Note:
STG3692
QFN16 (2.6x1.8 mm) package information
Symbol
D
D2
E
E2 e
L
A
A1
A3 b
Table 9. QFN16L (2.6x1.8 mm) package mechanical data
Min.
0.45
0
0.15
2.55
1.45
1.75
0.65
0.25
mm
Typ.
0.5
0.02
0.127
0.2
2.6
1.5
1.8
0.7
0.4
0.3
Max.
0.55
0.05
0.25
2.65
1.55
1.85
0.75
0.35
VFQFPN - Standard for thermally enhanced vey fine pitch quad flat package no leads. The leads size is comprehensive of the thickness of the leads finishing material. Dimensions do not include mold protusion.
Package outline exclusive of metal burrs dimensions. Shipping media tape and reel units: 3000.
Figure 14. QFN16L (2.6x1.8 mm) recommended footprint
DS4909 - Rev 9 page 14/20
6.2
STG3692
QFN16L (2.6x1.8 mm) packing information
QFN16L (2.6x1.8 mm) packing information
Figure 15. QFN16L (2.6x1.8 mm) carrier tape
Figure 16. QFN16L (2.6x1.8 mm) reel
DS4909 - Rev 9 page 15/20
STG3692
Revision history
Date
11-Oct-2006
08-Nov-2006
08-Jan-2007
03-Jul-2007
05-May-2010
30-Jun-2010
14-Oct-2019
04-Aug-2021
07-Dec-2021
Version
1
2
3
4
5
6
7
8
9
Table 10. Document revision history
Changes
Initial release.
Added feature in cover page.
Mechanical data updated.
C
ON
and C
OFF
values updated on Table 8 on page 8.
Document reformatted no content change.
Update of product maturity.
Updated Section 5 Test circuits.
Updated ISEL, ICC max. value in Table 5, BW typ. value, OIRR and Xtalk test conditions in Table 7.
Updated Table 5. DC specifications
.
DS4909 - Rev 9 page 16/20
STG3692
Contents
Contents
DS4909 - Rev 9 page 17/20
STG3692
List of tables
List of tables
Table 6. Analog switch characteristics (C
≤ 5 ns) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 7. Analog switch characteristics (C
= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
DS4909 - Rev 9 page 18/20
STG3692
List of figures
List of figures
Figure 11. Switching time and charge injection (V
= 0 Ω, RL = 1 MΩ, CL= 100 pF) . . . . . . . . . . . . . . . . 11
DS4909 - Rev 9 page 19/20
STG3692
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS4909 - Rev 9 page 20/20
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