STMicroelectronics AS21P2THB Datasheet
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AS21P2THB
Low voltage high bandwidth dual single-pole double-throw analog switch
Datasheet
-
production data
Applications
Wearable
Sport and fitness
Portable equipment
QFN10
(1.8 x 1.4 mm)
Description
Features
Ultra low power dissipation:
– I
CC
= 1 A (max.) at T
A
= 85 °C
Low “ON” resistance:
The AS21P2THB is a high-speed CMOS low voltage dual analog SPDT (single pole double throw) switch or 2:1 multiplexer/demultiplexer switch fabricated in silicon gate C²MOS technology. It is designed to operate from 1.65 V to 4.3 V, thus making this device the ideal selection for portable applications.
– R
ON
= 4.8
(T
A
= 25 °C) at V
– R
ON
= 5.9
(T
A
= 25 °C) at V
CC
= 4.3 V
CC
= 3.0 V
Wide operating voltage range:
– V
CC
(opr.) = 1.65 V to 4.3 V
The SEL input is provided to control the switch.
The switch nS1 is ON (connected to common ports Dn) when the SEL input is held high and
OFF (high impedance state exists between the two ports) when SEL is held low, the switch nS2 is
ON (it is connected to common port Dn) when the 4.3 V tolerant and 1.8 V compatible threshold
SEL input is held low and OFF (high impedance on digital control input at V
CC
= 2.3 V to 3.0 V state exists between the two ports) when SEL is
Typical bandwidth (-3 dB) at 800 MHz on all held high. AS21P2THB has an integrated fail safe channels function to withstand over-voltage condition when
USB (2.0) high speed (480 Mbps) signal the device is powered off.
switching compliant
The AS21P2THB also has an interrupt pin which
Integrated fail safe function
Interrupt function to indicate to the processor that the device is in dedicated port charging
mode
Obsolete Product(s) - Obsolete Product(s)
JESD 78, Class II features are fast switching speed, break-beforemake-delay time and ultralow power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess
ESD performance exceeds JESD22: is in dedicated port charging mode. Additional key voltage.
– Dn pins: 4000-V human body model (A114sends a signal to the processor when the device
A)
– All other pins: 2000-V human body model
(A114-A)
Table 1. Device summary
Package Packaging Order code
AS21P2THB QFN10 (1.8 x 1.4 mm) Tape and reel
March 2014
This is information on a product in full production.
DocID026023 Rev 1 1/23 www.st.com
Contents
Contents
AS21P2THB
Dedicated port charging detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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2/23 DocID026023 Rev 1
AS21P2THB Pin settings
Pin number
1
4
5
2
3
8
9
6
7
10
Figure 1. Pin connection (top through view)
6 6
,17
9&&
6(/
'
*1'
'
6 6
Table 2. Pin description
Symbol Name and function
INT
VCC
SEL
2S1
2S2
D2
GND
D1
1S2
1S1
Interrupt
Positive supply voltage
Control
Independent channel for switch 2
Independent channel for switch 2
Common channel for switch 2
Ground (0 V)
Common channel for switch 1
Independent channel for switch 1
Independent channel for switch 1
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Logic diagram AS21P2THB
Figure 2. Logic block diagram
'
'
6
6
6
6
6(/
Figure 3. Logic equivalent circuit
Q6 'Q
Q6
6(/
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Table 3. Truth table
$09
SEL Switch nS1
H
L
1. High impedance.
ON
OFF
(1)
Switch nS2
OFF
(1)
ON
4/23 DocID026023 Rev 1
AS21P2THB
3
Dedicated port charging detection
Dedicated port charging detection
The AS21P2THB has a built-in dedicated port charging detection circuit to detect the condition when the USB D+/D- lines are both in high state. When this occurs, the device sends an interrupt signal to the processor to indicate that the connected USB device is in dedicated port charging mode.
Figure 4. Interrupt function logic representation
D1
D2
INT
1S1
1S2
2S1
2S2
SEL
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Maximum rating AS21P2THB
Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Symbol
Table 4. Absolute maximum ratings
Parameter
V
CC
V
I
V
IC
V
O
I
IKC
I
IK
I
OK
I
O
I
OP
I
CC
or I
GND
P
D
T stg
T
L
Supply voltage
DC input voltage
DC control input voltage
DC output voltage
DC input diode current on control pin (V
SEL
DC input diode current (V
SEL
DC output diode current
DC output current
DC output current peak (pulse at 1ms, 10% duty cycle)
DC V
CC
or ground current
Power dissipation at T
A
= 70 °C
(1)
Storage temperature
Lead temperature (10 sec)
< 0V)
< 0V)
Value
-0.5 to 5.5
-0.5 to V
CC
+ 0.5
-0.5 to 5.5
-0.5 to V
CC
+ 0.5
-50
±50
±20
±128
±300
±100
1120
-65 to +150
300
1. Derate above 70 °C by 18.5 mW/°C.
Unit mA mA mW
°C
°C
V
V
V
V mA mA mA mA
4.1 Recommended operating conditions
Table 5. Recommended operating conditions
Parameter Value Symbol Unit
V
CC
Supply voltage
Input voltage
1.65 to 4.3
Obsolete Product(s) - Obsolete Product(s) V
V V
I
0 to V
CC
Control input voltage 0 to 4.3
V V
IC
V
O
T op
Output voltage
Operating temperature
0 to V
CC
-40 to 85
V
°C dt/dv
Input rise and fall time control input
V
L
= 1.65 V to 2.7 V
V
L
= 3.0 to 4.3 V
0 to 20
0 to 10 ns/V
6/23 DocID026023 Rev 1
AS21P2THB Electrical characteristics
Symbol Parameter
V
V
IH
IL
High level input voltage
1.65 – 1.95
2.3 – 2.5
2.7 – 3.0
3.3 – 3.6
Low level input voltage
4.3
1.65 – 1.95
2.3 – 2.5
2.7 – 3.0
3.3 – 3.6
4.3
V
IH-INT
High level input voltage for INT
4.3
Table 6. DC specifications
V
CC
(V) Test condition
–
–
Value
T
A
= 25 °C
Min
0.65 V
CC
1.2
1.3
1.4
1.6
–
–
–
–
–
Typ Max
–
–
–
–
– –
– 0.25
– 0.25
– 0.25
– 0.30
– 0.40
–
–
–
–
-40 to 85 °C
Min
0.65V
CC
1.2
1.3
1.4
1.6
–
–
–
–
–
Max
–
0.25
0.25
0.25
0.30
0.40
–
–
–
–
Unit
V
V
– 2.4
– – 2.4
– V
V
IL-INT
Low level input voltage for INT
4.3
– – – 0.9
– 0.9
V
V
OL-INT
Low level output voltage for INT
4.3
I
O
= 4 mA – – 0.40
– 0.50
V
R
PEAK
Switch ON peak resistance
1.8
2.7
3.0
3.7
V
S
= 0 V to V
CC
I
S
= 8 mA
–
–
–
–
15.1 17.8
6.4
8.0
5.9
7.5
5.0
6.5
–
–
–
–
–
–
–
–
4.3
V
S
= 3 V
– 4.8
6.1
– –
Obsolete Product(s) - Obsolete Product(s)
3.0
– 4.2
5.4
– –
I
S
= 8 mA
R
ON
Switch ON resistance
V
S
= 0.4 V
3.0
– 5.7
7.0
– –
I
S
= 8 mA
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Electrical characteristics AS21P2THB
Table 6. DC specifications (continued)
Value
Symbol Parameter V
CC
(V) Test condition T
A
= 25 °C -40 to 85 °C Unit
∆ R
ON
ON resistance match between channels
(1)
1.8
2.7
3.0
3.7
4.3
V
S
at R
ON
max
I
S
= 8 mA
Min
–
–
–
–
–
Typ Max
–
–
0.1
–
–
–
–
–
–
–
Min
–
–
–
–
–
Max
–
–
–
–
–
1.8
V
S
= 0 V to 0.4 V
I
S
= 8 mA
– 4.5
– – –
R
FLAT
ON resistance flatness
(2)
1.8
2.7
3.0
3.7
4.3
V
S
= 0 V to V
CC
I
S
= 8 mA
–
–
–
–
–
9.0
2.2
1.8
1.6
1.6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
I
OFF
OFF state leakage current (Sn), (D)
4.3
V
S
= 0.3 or 4 V -20 – 20 -100 100 nA
I
IN
Input leakage current 0 to 4.3
V
SEL
= 0 to 4.3 V -0.2
– 0.2
-1.0
1.0
µ A
I
CC
Quiescent supply current
1.65 to 4.3
V
SEL
GND
= VCC or
-0.2
0.2
-1.0
1.0
µ A
I
CCLV
Quiescent supply current for low voltage driving
4.3
V
V
SEL
SEL
= 1.65 V
= 1.80 V
–
–
±37 ±50
±33 ±40
–
–
±100
±50
V
SEL
= 2.60 V – ±11 ±20 – ±30
1. R
ON
= max |mSN-nSN|, where m = 1, 2 and n = 1, 2, N = 1, 2
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges.
µ A
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8/23 DocID026023 Rev 1
AS21P2THB Electrical characteristics
Symbol t
ON t
OFF t
D
Table 7. AC characteristics (C
L
= 35 pf, R
L
: 50
, T
R
= T f
5 ns)
Value
Parameter V
CC
(V)
Test conditions
T
A
= 25 °C -40 to 85 °C
Min Typ Max Min Max t
PLH, t
PHL
Propagation delay
Turn on time
Turn off time
Break-beforemake time delay
1.65 - 1.95
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
–
1.65 - 1.95 V
S
= 0.8 V
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
V
S
= 1.5 V
1.65 - 1.95 V
S
= 0.8 V
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
V
S
= 1.5 V
1.65 - 1.95
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
C
L
= 35 pF
R
L
= 50
V
S
= 1.5 V
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
14
11
10
6
4
3
15
13
27
19
0.21
0.15
0.14
0.13
34
20
–
–
16
13
–
–
17
15
–
22
–
23
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
18
14
–
–
20
17
–
25
–
26
–
–
–
–
Unit ns ns ns ns
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DocID026023 Rev 1 9/23
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Electrical characteristics AS21P2THB
Symbol
Q
Xtalk
BW
Table 8. AC electrical characteristics (C
L
= 5 pF, R
L
= 50
, T
A
= 25 °C)
Value
Parameter V
CC
(V)
Test conditions
T
A
= 25 °C -40 to 85 °C
1.65
Min
–
Typ
3.9
Max
–
Min Max
– –
Charge injection
2.3
3.0
C
L
= 100 pF
V
GEN
= 0 V
R
GEN
= 0
–
–
4.8
5.2
–
–
–
–
–
–
4.3
– 6.4
– – –
OIRR OFF isolation (1)
Crosstalk
-3dB bandwidth
1.65 – 4.3
1.65 – 4.3
3.0 – 4.3
V
S
= 1V
RMS
, f = 1 MHz
Signal = 0 dBm
V
S
= 1 V
RMS
, f = 10 MHz
Signal = 0 dBm
V
S
= 1 V
RMS
, f = 1 MHz
Signal = 0 dBm
V
S
= 1V
RMS
, f = 10 MHz
Signal = 0 dBm
R
L
= 50
Signal = 0 dBm
–
–
–
–
–
-78
-57
-78
-58
800
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
C
IN
C
ON
C
OFF
Control pin input capacitance
Sn port capacitance when switch is enabled
Sn port capacitance when switch is disabled
3.3
3.3
V
CC
= 0 V f = 240 MHz f = 240 MHz
–
–
–
2
6
2
–
–
–
–
–
–
–
–
–
Unit pC dB dB
MHz pF
10/23 DocID026023 Rev 1
AS21P2THB Electrical characteristics
Table 9. USB related AC electrical characteristics
Value
Symbol Parameter V
CC
(V)
Test conditions
T
A
= 25 °C -40 to 85 °C
Min Typ Max Min Max t
SK(0) t
SK(P)
Channel-tochannel skew
Skew of opposite transition of the same output
3.0 - 3.6 C
L
= 10 pF
3.0 - 3.6 C
L
= 10 pF
–
–
26
60
–
–
–
–
–
–
T
J
Total jitter 3.0 - 3.6
R
L
= 50
C
L
= 10 pF t
R
= t
F
=
750 ps at 480 Mbps
– 130 – – –
Unit ps ps ps
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DocID026023 Rev 1 11/23
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Test circuit AS21P2THB
Figure 5. ON resistance
I
DS
V
V
CC
D
S1
VS
GND
S2
IN
GND
CS14071
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12/23 DocID026023 Rev 1
AS21P2THB Test circuit
Figure 6. OFF leakage
V
CC
I
S(OFF)
A
D
I
D(OFF)
A
V
SS V
D
V
CC
S2
IN
GND
Figure 7. OFF isolation
V
CC
S1
V
S
S2
GND
IN
GND
50 Ω
V
OUT
CS14081
DocID026023 Rev 1 13/23
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Test circuit
Figure 8. Bandwidth
V
CC
S1
S2
V
CC
IN
Figure 9.
Channel-to-channel crosstalk
GND
D
V
OUT
CS00371
AS21P2THB
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CS14091
14/23 DocID026023 Rev 1
AS21P2THB
Figure 10. Test circuit
Test circuit
1. C
L
2. R
L
= 5/35 pF or equivalent (includes jig and probe capacitance)
= 50 or equivalent
3. R
T
= Z
OUT
of pulse generator (typically 50 )
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DocID026023 Rev 1 15/23
23
Test circuit
Figure 11. Break-before-make time delay
AS21P2THB
Figure 12. Switching time and charge injection (V
GEN
= 0 V, R
GEN
= 0
, R
L
= 1 M
, C
L
= 100 pF)
Figure 13. Turn ON, turn OFF delay time
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16/23 DocID026023 Rev 1
AS21P2THB
7 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
Figure 14. Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
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DocID026023 Rev 1
7936408 Rev.D
17/23
23
Package mechanical data
Symbol
Table 10. QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
Millimeters
Min.
Typ.
AS21P2THB
Max.
A3 0.127 e 0.40
Figure 15. Footprint recommendations for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
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18/23 DocID026023 Rev 1
AS21P2THB Package mechanical data
Figure 16. Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
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DocID026023 Rev 1 19/23
23
Package mechanical data AS21P2THB
Figure 17. Reel information (front side) for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
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20/23 DocID026023 Rev 1
AS21P2THB Package mechanical data
Figure 18. Reel information (back view) for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.4 mm pitch
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Revision history
Date
07-Mar-2014
Table 11. Document revision history
Revision Changes
1 Initial release.
AS21P2THB
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22/23 DocID026023 Rev 1
AS21P2THB
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