STG3820
Flip Chip 30
(2.0 x 2.4 mm)
Features
Ultralow power dissipation
– I
CC
= 1 µA (max.) at T
A
= 85 °C
Low “ON” resistance
– R
ON
= 5.4
(T
A
= 25 °C) at V
CC
= 4.3 V
– R
ON
= 6.6
(T
A
= 25 °C) at V
CC
= 3.0 V
Wide operating voltage range
– V
CC
(OPR.) = 1.65 V to 4.3 V
4.3 V tolerant and 1.8 V compatible threshold on digital control input at V
CC
= 2.3 V to 3.0 V
4 select pins controlling 2 switches each
Typical bandwidth (-3 dB) at 800 MHz on all channels
USB (2.0) high speed (480 Mbps) signal switching compliant
Integrated fail safe function
Latch-up performance exceeds 100 mA per
JESD 78, Class II
ESD performance exceeds JESD22
2000-V human body model (A114-A)
Applications
Mobile phones
Low voltage high bandwidth quad DPDT switch
Datasheet
-
production data
Description
The STG3820 device is a high-speed CMOS low voltage quad analog DPDT (dual pole dual throw) switch or 2:1 multiplexer/demultiplexer switch fabricated in silicon gate C 2 MOS technology. It is designed to operate from 1.65 V to 4.3 V, making this device ideal for portable applications.
The SELm-n input is provided to control the switches. The switches nS1 and mS1 are ON
(connected to common ports Dn and Dm respectively) when the SELm-n input is held high and OFF (high impedance state exists between the two ports) when the SELm-n is held low. The switches nS2 and mS2 are ON (connected to common port Dn and Dm respectively) when the
SELm-n input is held low and OFF (high impedance state exists between the two ports) when the SELm-n is held high.
The STG3820 device has an integrated fail safe function to withstand overvoltage condition when the device is powered off. Additional key features are fast switching speed, break-before-makedelay time and ultralow power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.
Table 1. Device summary
Order code Package Packing
STG3820BJR
Flip Chip 30
(2.0 x 2.4 mm)
Tape and reel
August 2013
This is information on a product in full production.
DocID15992 Rev 4 1/20 www.st.com
2
3
6
7
4
5
Contents
Contents
1
STG3820
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20 DocID15992 Rev 4
STG3820 Pin settings
Figure 1. Pin connection
6 6 6(/ 6 6
' ' 9&& ' '
6 6 6(/ 6 6
6 6 6(/ 6 6
' ' *1' ' '
6 6 6(/ 6 6
$
$
$
$
% & '
% & '
% & '
% & '
(
(
(
(
$
$
% & '
% & '
(
(
%XPSYLHZ 7RSYLHZ
$09
Pin number
A5
A6
B1
B2
A1
A2
A3
A4
B3
B4
B5
B6
Table 2. Pin assignment
Symbol Name and function
D5
5S1
2S1
D2
1S1
D1
1S2
5S2
2S2
6S2
D6
6S1
Independent channel for switch 1
Common channel for switch 1
Independent channel for switch 1
Independent channel for switch 5
Common channel for switch 5
Independent channel for switch 5
Independent channel for switch 2
Common channel for switch 2
Independent channel for switch 2
Independent channel for switch 6
Common channel for switch 6
Independent channel for switch 6
DocID15992 Rev 4 3/20
20
Pin settings
Pin number
E1
E2
E3
E4
E5
E6
D3
D4
D5
D6
C5
C6
D1
D2
C1
C2
C3
C4
Table 2. Pin assignment (continued)
Symbol Name and function
3S2
7S2
D7
7S1
4S1
D4
4S2
8S2
D8
8S1
SEL1-2
VCC
SEL3-4
SEL5-6
GND
SEL7-8
3S1
D3
Switch 1-2 selection control
Positive supply voltage
Switch 3-4 selection control
Switch 5-6 selection control
Ground (0 V)
Switch 7-8 selection control
Independent channel for switch 3
Common channel for switch 3
Independent channel for switch 3
Independent channel for switch 7
Common channel for switch 7
Independent channel for switch 7
Independent channel for switch 4
Common channel for switch 4
Independent channel for switch 4
Independent channel for switch 8
Common channel for switch 8
Independent channel for switch 8
STG3820
4/20 DocID15992 Rev 4
STG3820 Logic diagram
Figure 2. Logic equivalent circuit
Dn nS2 nS1
SEL
SEL
H
L
1. High impedance.
Table 3. Truth table
Switch nS1
ON
OFF
(1)
Switch nS2
OFF (1)
ON
AM00789V1
DocID15992 Rev 4 5/20
20
Maximum ratings STG3820
Stressing the device above the rating listed in Table 4: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in
Table 5: Recommended operating conditions
of this specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.
Symbol
Table 4. Absolute maximum ratings
Parameter
I
IKC
I
IK
I
OK
I
O
V
CC
V
I
V
IC
V
O
I
OP
I
CC
or I
GND
P
D
T stg
T
L
Supply voltage
DC input voltage
DC control input voltage
DC output voltage
DC input diode current on control pin (V
SEL
< 0 V)
DC input diode current (V
SEL
< 0 V)
DC output diode current
DC output current
DC output current peak (pulse at 1 ms, 10% duty cycle)
DC V
CC
or ground current
Power dissipation at T
A
= 70 °C
Storage temperature
Lead temperature (10 sec.)
Value
-0.5 to 6.0
-0.5 to V
CC
+ 0.5
-0.5 to 5.5
-0.5 to V
CC
+ 0.5
-50
±50
±20
±128
±300
±100
1120
-65 to +150
300
Unit mA mA mA mA
V
V
V
V mA mA mW
°C
°C
Recommended operating conditions
Symbol
V
CC
V
I
V
IC
V
O
T op dt/dv
Table 5. Recommended operating conditions
Parameter Value
Supply voltage
Input voltage
Control input voltage
Output voltage
Operating temperature
Input rise and fall time control input
V
L
= 1.65 V to 2.7 V
V
L
= 3.0 V to 4.3 V
1.65 to 4.3
0 to V
CC
0 to 4.3
0 to V
CC
-40 to 85
0 to 20
0 to 10
Unit
V
V
V
V
°C ns/V
6/20 DocID15992 Rev 4
STG3820 Electrical characteristics
Symbol
V
IH
V
IL
R
PEAK
R
ON
R
ON
Parameter
High level input voltage
Low level input voltage
Switch ON peak resistance
Switch ON resistance
ON resistance match between channels
(1)
2.3 – 2.5
2.7 – 3.0
3.3 – 3.6
4.3
1.65 – 1.95
2.3 – 2.5
2.7 – 3.0
3.3 – 3.6
4.3
1.8
2.7
3.0
3.7
4.3
V
S
= 0 V to V
CC
I
S
= 8 mA
3.0
3.0
V
S
= 3 V
I
S
= 8 mA
V
S
= 0.4 V
I
S
= 8 mA
1.8
2.7
3.0
3.7
4.3
V
S
at R
I
S
ON
MAX
= 8 mA
V
CC
(V)
Table 6. DC specifications
1.65 – 1.95
Test conditions
Min.
T
A
= 25 °C
Typ.
Max.
1.6
0.65
V
CC
1.2
1.3
1.4
17.0
7.5
6.6
5.8
5.4
0.25
0.25
0.25
0.30
0.40
19.6
8.7
7.6
6.7
6.2
5.1
Value
5.8
6.3
0.3
7.3
-40 to 85 °C
1.6
Min.
Max.
0.65
V
CC
1.2
1.3
1.4
0.25
0.25
0.40
0.25
0.30
Unit
V
V
Ω
Ω
Ω
DocID15992 Rev 4 7/20
20
Electrical characteristics STG3820
Symbol Parameter
Table 6. DC specifications (continued)
Value
V
CC
(V)
Test conditions
Min.
T
A
= 25 °C
Typ.
Max.
-40 to 85 °C Unit
Min.
Max.
1.8
V
S
= 0 V to
0.4 V
I
S
= 8 mA
4.5
R
FLAT
ON resistance flatness
(2)
1.8
2.7
3.0
3.7
V
S
= 0 V to V
CC
I
S
= 8 mA
9.5
2.2
1.8
1.6
Ω
4.3
1.6
I
OFF
OFF state leakage current
(Sn), (D)
4.3
V
S
= 0.3 or 4 V -20 20 -100 100 nA
I
IN
Input leakage current
0 to 4.3
V
SEL
= 0 to
4.3 V
-0.2
0.2
-1.0
1.0
µA
I
CC
Quiescent supply current
1.65 to 4.3
V
SEL
= V
GND
CC
or
-0.2
0.2
-1.0
1.0
µA
I
CCLV
Quiescent supply current for low voltage driving
(3)
4.3
V
V
SEL
SEL
= 1.65 V
= 1.80 V
±37
±33
±50
±40
±100
±50
V
SEL
= 2.60 V ±11 ±20 ±30
1.
R
ON
= max. |mSN - nSN|, where m = 1 to 8 and n = 1 to 8, N = 1, 2.
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges.
3. Measurement is for one SEL pin.
µA
8/20 DocID15992 Rev 4
STG3820 Electrical characteristics
Symbol t
ON t
OFF t
D
Q
Table 7. AC electrical characteristics (C
L
= 35 pF, R
L
= 50 Ω , t r
= t f
5 ns)
Value
Parameter V
CC
(V)
Test conditions
T
A
= 25 °C -40 to 85 °C
Min.
Typ.
Max.
Min.
Max.
t
PLH, t
PHL
Propagation delay
Turn-on time
Turn-off time
Break-beforemake time delay
Charge injection
1.65 - 1.95
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
1.65 - 1.95
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
1.65 - 1.95
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
1.65 - 1.95
2.3 - 2.7
3.0 - 3.3
3.6 - 4.3
1.65
2.3
3.0
4.3
V
S
= 0.8 V
V
S
= 1.5 V
V
S
= 0.8 V
V
S
= 1.5 V
C
L
= 35 pF
R
L
= 50 Ω
V
S
= 1.5 V
C
L
= 100 pF
V
GEN
= 0 V
R
GEN
= 0 Ω
0.21
0.15
0.14
0.13
36
20
15
13
29
19
14
11
10
7
6
4
3.9
4.8
5.2
6.4
23
17
15
22
16
13
17
25
26
14
20
18
Unit ns ns ns ns pC
DocID15992 Rev 4 9/20
20
Electrical characteristics STG3820
Symbol
Table 8. AC electrical characteristics (C
L
= 5 pF, R
L
= 50 Ω , T
A
= 25 °C)
Value
Parameter V
CC
(V) Test conditions T
A
= 25 °C -40 to 85 °C
Min.
Typ.
Max.
Min.
Max.
OIRR
Xtalk
BW
OFF isolation
Crosstalk
(1)
-3dB bandwidth
1.65 – 4.3
1.65 – 4.3
3.0 – 4.3
V
S
= 1 V
RMS f = 1 MHz
, signal = 0 dBm
V
S
= 1 V
RMS
, f = 10 MHz signal = 0 dBm
V
S
= 1 V
RMS f = 1 MHz
, signal = 0 dBm
V
S
= 1 V
RMS
, f = 10 MHz signal = 0 dBm
R
L
= 50 Ω signal = 0 dBm
C
IN
Control pin input capacitance
V
CC
= 0 V
C
Sn
Sn port capacitance 3.3
F = 240 MHz, switch is enabled
F = 240 MHz, switch is disabled
C
D
D port capacitance 3.3
F = 240 MHz
1. Off isolation = 20 Log10 (V
D
/V
S
), V
D
= output, V
S
= input to off switch.
-78
-57
-78
-58
800
2
6
2
8
Unit dB dB
MHz pF pF pF
10/20 DocID15992 Rev 4
STG3820 Electrical characteristics
Symbol t
SK(0) t
SK(P)
T
J
Parameter
Table 9. USB related AC electrical characteristics
Value
V
CC
(V)
Test conditions
T
A
= 25 °C
Min.
Typ.
Max.
Channel-tochannel skew
Skew of opposite transition of the same output
3.0 - 3.6
3.0 - 3.6
C
L
= 10 pF
C
L
= 10 pF
26
60
Total jitter 3.0 - 3.6
R
L
= 50 Ω
C
L
= 10 pF t
R
= t
F
= 750 ps at 480 Mbps
130
-40 to 85 °C
Min.
Max.
Unit ps
ps ps
DocID15992 Rev 4 11/20
20
Test circuits
12/20
Figure 3. On-resistance
I
DS
V
V
CC
S1
VS
S2
GND
IN
GND
Figure 4. Bandwidth
V
CC
D
CS14071
S1
50
Ω
V
OUT
S2
V
S
V
CC
IN
GND
CS00371
DocID15992 Rev 4
STG3820
STG3820
9
66
Test circuits
Figure 5. Off leakage
9
&&
,
62))
$
9
&&
6
,1
*1'
Figure 6. Channel to channel crosstalk
'
,
'2))
$
9
'
&6
CS14091
DocID15992 Rev 4 13/20
20
Test circuits
Figure 7. Off isolation
9&&
6
96
6
*1'
,1
*1'
Figure 8. Test circuit
9287
&6
STG3820
Note: C
L
= 5/35 pF or equivalent: (includes jig capacitance).
R
L
= 50 Ω or equivalent.
R
T
= Z
OUT
of pulse generator (typically 50 Ω ).
14/20 DocID15992 Rev 4
STG3820
Figure 9. Break-before-make time delay
Test circuits
CS1410V2
Figure 10. Switching time and charge injection (V
GEN
= 0 V, R
GEN
= 0 Ω , R
L
= 1 M Ω , C
L
= 100 pF)
Figure 11. Turn-on, turn-off delay time
DocID15992 Rev 4 15/20
20
Package information STG3820
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK is an ST trademark.
Figure 12. Package outline for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch
I (
H
H
I
'
2E
%277209,(:
&
$
FFF&
(
6
$
$
'
7239,(:
)OLS&KLS
16/20 DocID15992 Rev 4
STG3820 Package information
Table 10. Mechanical data for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch
Dimensions (mm)
Symbol
Min.
Typ.
Max.
E1 e f ccc
$
A
A1
A2 b
D
D1
E
0.565
0.17
0.355
0.215
2.1
1.97
0.36
0.19
0.040
1.6
0.4
0.2
0.05
0.045
0.625
0.205
0.375
0.255
2.4
2.0
2.0
0.685
0.24
0.395
0.295
2.43
2.03
0.44
0.21
0.05
Figure 13. Footprint recommendations for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch
2
*ULGSODFHPHQWDUHD
DocID15992 Rev 4 17/20
20
Package information
Figure 14. Tape information for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch
STG3820
$R
.R
%R
Figure 15. Reel information for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch
2
2
18/20
2
DocID15992 Rev 4
STG3820 Revision history
Date
18-Dec-2009
19-Jan-2011
23-Apr-2013
06-Aug-2013
Table 11. Document revision history
Revision Changes
1
2
3
4
Initial release.
Document reformatted, added Contents
, updated Figure 12
and
Figure 13
, corrected typo in Features ,
Table 1 ,
Section 1: Pin settings , Table 2
,
Table 7
,
Table 8 , notes below
Figure 8
, title of
Figure 11 ,
Figure 12 ,
Table 10 , and Figure 13
, corrected name
of “Table 11” to Figure 13
.
Moved Description to page 1.
Redrawn Figure 1 .
Updated Section 3
(added/updated cross-references, updated
V
CC
value in Table 4 ).
Redrawn Figure 12
to Figure 15 .
Updated Figure 12
(removed superfluous reference to note).
Updated title of
Figure 14 and Figure 15 (added “Flip Chip 30
(2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch”).
Minor corrections throughout document.
Updated Table 8 on page 10 (replaced C
ON by C sn
and C
D symbol).
and C
OFF symbol
DocID15992 Rev 4 19/20
20
STG3820
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20/20 DocID15992 Rev 4
