STMicroelectronics VIP-M07-ADIS User Manual
STMicroelectronics VIP-M07-ADIS is an easy-to-use board offered at an affordable price. Together with a dedicated GUI and firmware (STSW-M07-ADIS) and in combination with SPC560B-DIS board, it becomes a tool to evaluate M0-7 high-side drivers. It works connected to SPC560B-DIS discovery board to create a complete solution for a specific 12 V BCM (Body Control Module) system. In a typical car body application it is necessary to connect a microcontroller to drive several loads (bulb lamps, led lamps, electrical motors, and so on). When using a bulb lamp, to increase its lifetime and avoid flickering, it is necessary to shift PWM signals and adapt the duty cycle to battery voltage.
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Oglas
UM1985
User manual
VIP-M07-ADIS
Introduction
This document describes the specifications for the 12 V M0-7 discovery board that is able to work connected to SPC560B-DIS discovery board to create a complete solution for a specific 12 V BCM (Body Control Module) system.
In a typical car body application it is necessary to connect a microcontroller to drive several loads (bulb lamps, led lamps, electrical motors, and so on). When using a bulb lamp, to increase its lifetime and avoid flickering, it is necessary to shift PWM signals and adapt the duty cycle to battery voltage.
The M0-7 expansion board provides diagnostics feedback and current consumptions to operating close loop for each single load synchronized with the PWM signals. SPC560B-
DIS is the core hardware to generate shifted PWM signals and synchronize ADC conversion.
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Contents
Contents
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Hardware, schematic and layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
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List of tables
List of tables
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List of figures
List of figures
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1 Overview
Overview
VIP-M07-ADIS is an easy-to-use board offered at budget price. Together with a dedicated
GUI and firmware (STSW-M07-ADIS) and in combination with SPC560B-DIS board, it becomes a tool to evaluate M0-7 high-side drivers.
Follow the sequence below to configure the system and launch the application:
1.
Check jumper position in the SPC560B-DIS board:
– J14,J13,J12,J7,J6,J11,J5,J4 removed
– S1,S2,J10,J9,J2,J1,J3 inserted
2. Connect the SPC560B-DIS board to a PC with a USB cable ‘type A to mini-B’
3. Download firmware STSW-M07-ADIS and program board as described on www.st.com
5. Plug VIP-M07-ADIS board and connect 12 V power supply on J30
6. Install GUI on your PC as described on www.st.com
7. Connect loads to the outputs
8. Check jumper position in the VIP-M07-ADIS:
– J1,J7,J8,J29 – pin 2 connected to pin 1
– J2 inserted
9. Connect USB cable to PC
10. Execute GUI ( www.st.com
)
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Overview
1.2 Hardware, schematic and layout
Figure 1. VIP-M07-ADIS schematic
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Figure 2. VIP-M07-ADIS top layer
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Figure 3. VIP-M07-ADIS bottom layer
Overview
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Overview UM1985
These devices are manufactured using ST proprietary VIPower M0-7 technology and are designed to drive 12 V automotive grounded loads through a 3 V and 5 V CMOS-compatible interface, providing protection and diagnostics.
The device integrates advanced protective functions such as load current limitation, overload active management by power limitation and overtemperature shutdown with configurable latch-off.
A dedicated multifunction multiplexed analog output pin delivers sophisticated diagnostic functions including high precision proportional load current sense, supply voltage feedback and chip temperature sense, in addition to the detection of overload and short circuit to ground, short to V
CC
and off-state open-load.
Here below a short description of the most important features of M0-7 devices:
• General
– Smart high-side driver with MultiSense analog feedback
– Very low standby current
– Compatible with 3 V and 5 V CMOS outputs
• MultiSense diagnostic functions
– Multiplexed analog feedback of: load current with high precision proportional current mirror, V
CC supply voltage and T CHIP device temperature
– Overload and short to ground (power limitation) indication
– Thermal shutdown indication
– Off-state open-load detection
– Output short to V
CC detection
– Sense enable/ disable
•
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Configurable latch-off on overtemperature or power limitation with a dedicated fault reset pin
– Loss of ground and loss of V
CC
– Reverse battery through self turn-on
– Electrostatic discharge protection
The VIP-M07-ADIS is equipped with 4 M0-7 high-side drivers:
• M0-7_ A is a VND7020AJ quad channels in PowerSSO-16 package with 22 m Ω of R
ON
•
M0-7_ B is a VNQ7050AJ quad channels in PowerSSO-16 package with 50 m Ω of
R
ON
• M0-7_ C and M0-7_D is a VND7012AY dual channels in PowerSSO-36 package with
12 m Ω of R
ON
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The suggested configuration to drive front lights is illustrated in
:
Light
Position
Low Beam
High Beam
Fog
Turn
Position
Low Beam
High Beam
Fog
Turn
Table 1. Loads configuration
Load (W) Part number
W5W/H7
H3/H15
H7
21W
W16W
W5W/H7
H3/H15
H7
21W
W16W
VNQ7050AJ
VND7012AY
VND7012AY
VND7020AJ
VNQ7050AJ
VNQ7050AJ
VND7012AY
VND7012AY
VND7020AJ
VNQ7050AJ
Device
M0-7_B
M0-7_C
M0-7_D
M0-7_A
M0-7_B
M0-7_B
M0-7_D
M0-7_C
M0-7_A
M0-7_B
Channel
2
1
0
1
0
0
0
1
1
3
The power supply is provided through J30 connectors and current capability that must be adequate to the loads.
1.5 LEDs
LED x: indicates the status of the correspondent output x (each output has a LED connected to indicate its status).
1.6 Jumpers
A FaultRST pin is an active low compatible with 3 V and 5 V CMOS outputs and unlatches the output in case of fault or disables the latch-off functionality.
J1,7,8,29 are multi positions and they allow three different configurations:
1.
Pin 2 connected with pin 1, FaultRST is forced to GND setting the outputs in autorestart mode
2. Pin 2 connected with pin 3, FaultRST is forced to 5 V so unlatches the output in case of fault
3. Pin 2 connected with pin 4, FaultRST is driven by microcontroller output
J2 connects signal ground and powers ground at the same time.
The male headers X1,X2,X3 and X4 are two strip lines connectors of 2 x 36 each and they are used to allow the access to all the SPC560B54L5 MCU pins with exception of JTAG,
TCK, TMS, TDI, TDO, XTAL, EXTAL and VDD_LV. The pins used in this M0-7 application
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Overview are described in
.
Table 2. Extension connectors pins used
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1
2
3
6
7
4
5
8
9
10
24
GND
PE[2]
PC[5]
(CSN)
PE[4]
PH[4]
PH[6]
PH[8]
PE[7]
PC[13]
PB[2]
PG[6]
1
GPIO3
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
13
14
15
20
21
22
23
GND
PB[0]
(TxDC)
PC[15]
PG[4]
PG[2]
PE[0]
PE[1]
PE[9]
PA[0]
RESET
_ASD
11
CTRL_
PUP
12
13
14
15
16
17
18
IN0 19
20
PG[8]
GND
21
22
PC[10] SEL1 23
24
GND
PE[3]
PC[4] GPIO2
PE[5]
PH[5]
PH[7]
PE[6]
PC[12]
PB[1]
(RxDC)
PB[3]
1
2
3
4
5
6
7
8
9
10
Batt
GND
TCK
1
2
3
TDO
PA[6]
4
IN6 5
PC[2] GPIO1
PG[11]
6
7
PE[15] 8
PG[15] 9
PE[12]
GND
PC[14]
PG[5]
PG[3]
PA[2]
PA[1]
PE[8]
PE[10]
PE[11]
PG[9]
11
12
13
14
SEL0 15
IN1 16
17
18
19
20
PC[11] GPIOD
GND
21
22
PG[7] 23
PC[9]
CTRL_
FRST_
A
24
GND
PA[10]
11
IN2 12
PA[8]
PE[13]
PF[15]
PG[1]
PH[2]
PH[0]
PG[13]
PB[15]
PB[14]
GND
PB[13]
IN8 13
14
15
16
17
18
19
MultiSE
NSE_D
MultiSE
NSE_C
20
21
22
MultiSE
NSE_B
23
PB[12]
MultiSE
NSE_A
24
10
Batt
GND
TDI
PA[7]
PF[14]
PG[0]
PH[3]
PH[1]
PG[12]
PA[3]
PD[15]
TMS
PA[5] IN5
PC[3] S_EN
PG[10]
PE[14]
PG[14]
PA[11]
GND
CTRL_
FRST_
B
PA[9] IN9
IN7
IN3
PD[14]
GND
PD[13]
PD[12]
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Table 2. Extension connectors pins used (continued)
25
26
27
28
29
30
31
32
33
34
35
36
PC[8] GPIOC
PF[8]
25
26
PC[6]
(TxDL)
GPIOA 27
PF[10] 28
PA[15]
PA[14]
(CLK)
29
30
PA[12]
(MISO)
CTRL_
FRST_
C
31
PB[9]
PB[10]
ADC_V bat
CTRL_
Led
32
33
PF[1]
GND
5V
34
35
36
PF[9]
PF[12]
25
26
PC[7]
(RxDL)
GPIOB 27
PF[11] 28
PF[13]
PA[4]
29
IN4 30
PA[13]
(MOSI)
CTRL_
FRST_
D
PB[8]
31
32
PF[0]
PF[2]
GND
5V
33
34
35
36
PB[11]
PD[10]
PB[7]
25
26
27
PB[5]
PD[8]
ADC_G
ND
28
29
PD[6] 30
PD[4]
PD[2]
PD[0]
PF[6]
PF[4]
GND
31
32
33
34
35
36
PD[11]
PD[9]
PB[6]
PB[4]
PD[7]
PD[5]
PD[3]
PD[1]
PF[7]
PF[5]
PF[3]
GND
1.8 R
sense
configuration
In normal operating conditions,
Equation 1 describes relation between
I out
and V sense
Equation 1
V
SENSE
= R
SENSE
× I
SENSE
= R
SENSE
× ( I out
⁄ k )
Design value of Sense Resistor can be calculated from the above equation given the intended voltage at the ADC with the nominal load current and the typical K factor of the device.
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Overview UM1985
The calculated sense resistor implies following considerations that have to be taken into account: a) In normal operating conditions, in order not to reach MultiSense voltage saturation
V
SENSE_SAT
, with the maximum load current that can be read I
OUT_MAX
, the
R
SENSE
has to fulfill in Equation 2 :
Equation 2
R
SENSE
< K
MIN
(
SENSE
⁄ I
OUT MAX
)
MultiSense is guaranteed within this maximum current linearity. If a lower maximum load current needs to be read, like for example in case a LED string, the R
SENSE value must be increased. b) In normal operating conditions, the maximum sense voltage that can be read with the given R
SENSE
must be higher than a certain ADC threshold. This can be expressed by
Equation 3
R
SENSE
> V
SENSEMAX
⁄ I
SENSE SAT MIN
12/14
V
SENSEMAX is the maximum voltage that the ADC has to read at the maximum monitored load current. This value can be below or equal 5 V which normally is the maximum operating range of the ADC.
c) In fault conditions (overload, short-circuit to GND that causes Power Limitation or
Thermal Shutdown and in open-load/short to battery in OFF state), in order to be able to differentiate a normal operating condition from a Fault condition, the
MultiSense pin must be capable to develop a voltage above the V given in the datasheet, V
SENSEH
SENSEH
(Value
= 6 V typically). Therefore the following condition must be fulfilled:
Equation 4
R
SENSE
> V
SENSE_MIN
⁄ I
SENSE _H_MIN d) Finally the current sense resistor is necessary to protect the MultiSense pin in case of reverse battery. During this event, for monolithic devices an intrinsic diode between MultiSense and V
CC
pins is forward biased and the resulting current must be limited (in the datasheet the maximum MultiSense current that can flow in reverse battery condition is indicated in the absolute maximum rating table). This value is given in the Absolute Maximum Ratings section of M0-7 datasheet
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(I
R
SENSE value, in case of VND7020AJ this is 20 mA), therefore the minimum
SENSE
to protect the MultiSense pin in case of reverse battery (supposing a static condition of V
CC
= -16 V) is.
Equation 5
R
SENSE
> ( – V
CC
– V
F
) ⁄ I
SENSE_rev_max
= ( 16V = 0.7V
) ⁄ 20mA = 765 Ω
In conclusion the R
SENSE
value must fulfill two opposite conditions to have linearity in normal operating condition: one is avoiding MultiSense pin current saturation (increase
R
SENSE
) and the other is avoiding MultiSense pin voltage saturation (decrease of R
SENSE
).
Moreover the R
SENSE value has to be dimensioned in order to distinguish a normal operating condition (linear mode V
SENSE proportional to load current) from a Fault condition
(Constant Voltage Generator developing V
SENSE_H
across the R
SENSE
).
In the board there are 4 M0-7 with 4 R
SENSE selected in order to have V
SENSE
= 2 V and
I
OUT
depending of the devices:
• VNQ7050AJ is a 50m
R
SENSE
= K x (V
Ω
SENSE
, in order to have V
/I
OUT
SENSE =
2 V at I
OUT
= 2A
) = 1120 x (2 V / 2 A) = 1120 Ω -> 1.1 k Ω
•
VNQ7012AY is a 12m
R
SENSE
= K x (V
Ω
SENSE
, in order to have V
/I
OUT
SENSE =
2V at I
OUT
= 7A
) = 4280 x (2 V / 7 A) = 1222 Ω -> 1.2 k Ω
• VND7020AJ is a 20m
R
SENSE
= K x (V
Ω
SENSE
, in order to have V
/I
OUT
SENSE =
2V at I
OUT
= 3A
) = 2755 x (2 V / 3 A) = 1836 Ω -> 2.2 k Ω
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Graphical User Interface
2 Graphical User Interface
The Graphical User Interface STSW-M07-ADIS is available on www.st.com
.
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Date
17-Nov-2015
13-Apr-2016
Table 3. Document revision history
Revision Changes
1
2
Initial release.
Updated:
-
-
-
-
-
Section 1.7: Extension connectors
Updated:
Section 2: Graphical User Interface
Deleted Appendix.
Revision history
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