L6494
SO-14
Features
Transient withstand voltage 600 V
dV/dt immunity ± 50 V/ns in full temperature range
Driver current capability:
– 2 A source typ. at 25 °C
– 2.5 A sink typ. at 25 °C
Short propagation delay: 85 ns
Switching times 25 ns rise/fall with 1 nF load
Integrated bootstrap diode
Single input and shutdown pin
Adjustable deadtime
3.3 V, 5 V TTL/CMOS inputs with hysteresis
UVLO on both high-side and low-side sections
Compact and simplified layout
Bill of material reduction
Flexible, easy and fast design
Applications
Motor driver for home appliances, factory automation, industrial drives and fans
HID ballasts
Induction heating
Welding
Industrial inverters
UPS
Power supply units
DC-DC converters
High voltage high and low-side 2 A gate driver
Datasheet
-
production data
Description
The L6494 is a high-voltage device manufactured with the BCD6 “offline” technology. It is a single chip half-bridge gate driver for N-channel power
MOSFETs or IGBTs.
The high-side (floating) section is designed to stand a DC voltage rail up to 500 V, with 600 V transient withstand voltage. The logic inputs are
CMOS/TTL compatible down to 3.3 V for easy interfacing control units such as microcontrollers or DSP.
The device is a single input gate driver with programmable deadtime, and also features an active-low shutdown pin.
Both device outputs can sink 2.5 A and source 2
A, making the L6494 particularly suited for medium and high capacity power
MOSFETs\IGBTs.
The independent UVLO protection circuits present on both the lower and upper driving sections prevent the power switches from being operated in low efficiency or dangerous conditions.
The integrated bootstrap diode as well as all of the integrated features of this driver make the application PCB design simpler and more compact, and help reducing the overall bill of material.
November 2017
This is information on a product in full production.
DocID030317 Rev 2 1/18 www.st.com
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Contents
Contents
8
L6494
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description and connection diagram . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
C
BOOT
selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8.1
SO-14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18 DocID030317 Rev 2
L6494 Block diagram
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DocID030317 Rev 2 3/18
18
Pin description and connection diagram
2 Pin description and connection diagram
L6494
Figure 2. Pin connection SO-14 (top view)
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Pin no.
Pin name Type
Table 1. Pin description
Function
1
11
12
13
3
6
7
2
4
5
8, 9, 10, 14
IN
SD
DT
LVG
(1)
VCC
OUT
HVG
(1)
BOOT
SGND
PGND
NC
I
I
-
Output drivers logic input (is in phase with HVG and in opposition of phase with LVG)
Shutdown logic input (active-low)
Deadtime setting
O Low-side driver output
P Low-side section supply voltage
P High-side (floating) section common voltage
O High-side driver output
P High-side (bootstrapped) section supply voltage
P Signal ground
P Power ground
Not connected
1. The circuit guarantees less than 1 V on the LVG and HVG pins (at I normally used to hold the pin low.
sink
= 10 mA), with V
CC
> 3 V. This allows omitting the “bleeder” resistor connected between the gate and the source of the external MOSFET
4/18 DocID030317 Rev 2
L6494 Electrical data
3.1 Absolute maximum ratings
Symbol
Table 2. Absolute maximum ratings (1)
Parameter
V
CC
V
PGND
V
OUT
Supply voltage
Low-side driver ground
Output voltage
V
BOOT
V hvg
V lvg
Boot DC voltage
Boot transient withstand voltage (T pulse
< 1 ms)
High-side gate output voltage
Low-side gate output voltage
V i
Logic input pins voltage dV
OUT
/dt Allowed output slew rate
P
TOT
T
J
T stg
ESD
Total power dissipation (T
A
= 25 °C) SO-14
Junction temperature
Storage temperature
Human body model
1. Each voltage referred to SGND unless otherwise specified.
Value
Unit
Min.
Max.
-0.3
21
V
CC
- 21 V
CC
+ 0.3
V
BOOT
- 21 V
BOOT
+ 0.3
-0.3
500
620
V
OUT
- 0.3
V
BOOT
+ 0.3
PGND - 0.3
V
CC
+ 0.3
-0.3
15
-
-
-
-50
2
50
1
150
150 kV
V
V
V
V
V
V
V
V
V/ns
W
°C
°C
-
Symbol
R th(JA)
Table 3. Thermal data
Parameter
Thermal resistance junction to ambient
Package
SO-14
Value
120
Unit
°C/W
DocID030317 Rev 2 5/18
18
Electrical data
3.3
L6494
Recommended operating conditions
Symbol Pin
Table 4. Recommended operating conditions
Parameter Test condition
V
V
V
CC
V
PS
(1)
BO
(2)
OUT
VCC Supply voltage -
SGND - PGND Low-side driver ground -
BOOT - OUT Floating supply voltage -
OUT DC voltage -
OUT
OUT transient withstand voltage
T pulse
< 1 ms f
SW
-
Maximum switching frequency
HVG, LVG load C
T
J
T
A
-
Junction temperature
Ambient temperature
(4)
-
-
1. V
PS
= V
PGND
- SGND.
2. V
BO
= V
BOOT
- V
OUT
.
3. LVG off. V
CC
= 12.5 V. Logic is operational if V
BOOT
> 5 V.
4. Maximum ambient temperature is actually limited by T
J
.
L
= 1 nF
Min.
Max. Unit
10
-5
9.3
- 9
(3)
20
+5
20
480
V
V
V
V
-
-
-40
-40
600 V
800 kHz
125 °C
125 °C
6/18 DocID030317 Rev 2
L6494 Electrical characteristics
Symbol
Table 5. Electrical characteristics (V
CC
= 15 V; T
J
= +25 °C; PGND = SGND)
Pin Parameter Test condition Min. Typ. Max. Unit
Low-side section supply
V
CC_hys
V
CC _thON
V
CC _thOFF
I
I
QCCU
QCC
VCC vs.
SGND
V
CC
UV hysteresis
V
CC
UV turn ON threshold
V
CC
UV turn OFF threshold
Undervoltage quiescent supply current
Quiescent current
-
-
-
V
CC
= SD = 7 V
IN = SGND
V
CC
= 15 V
SD = 5 V; IN = SGND
0.5
-
-
0.6
135
490
0.72
200
700
V
8.7
9.3
9.8
V
8.2
8.7
9.2
V
A
A
High-side floating section supply
(1)
V
BO_hys
V
BO_thON
V
BO_thOFF
I
I
QBOU
QBO
V
BO
V
BO
V
BO
UV hysteresis
UV turn ON threshold
UV turn OFF threshold
BOOT vs.
OUT
Undervoltage V
BO current
quiescent
V
BO
quiescent current
-
-
-
V
BO
= SD = 7 V
IN = SGND
VBO = 15 V
SD = IN = 5 V
-
V hvg
= V out
= V boot
= 600 V -
-
-
-
0.48
0.6
0.7
V
8.0
8.6
9.1
V
7.5
8.0
8.5
V
20
90
-
175
30
120
8
-
A
A
A
I
LK
R
DS(on)
Output driving buffers
High-voltage leakage current
Bootstrap diode on-resistance
(2)
I
I
SO
SI
LVG, HVG
High/low-side source short-circuit current
High/low-side sink short-circuit current
LVG/HVG ON
T
J
= 25 °C
Full temperature range (3)
LVG/HVG ON
T
J
= 25 °C
Full temperature range
(3)
Logic inputs
V il
V ih
I
INh
I
INl
I
SDh
I
SDl
IN, SD vs.
SGND
Low level logic threshold voltage
High level logic threshold voltage -
-
IN vs.
SGND
IN logic “1” input bias current IN = 15 V
SD vs.
SGND
IN logic “0” input bias current
SD logic “1” input bias current
SD logic “0” input bias current
IN = 0 V
SD = 15 V
SD = 0 V
1.6
1.25
2
1.55
0.95
2
2
2.5
-
-
-
-
-
-
-
1.45
2.5
A
A
A
A
V
V
120 200 260 A
1 A
-
14
-
17
1 A
23 A
DocID030317 Rev 2 7/18
18
Electrical characteristics L6494
Table 5. Electrical characteristics (V
CC
= 15 V; T
J
= +25 °C; PGND = SGND) (continued)
Symbol Pin Parameter Test condition Min. Typ. Max. Unit
R
R
PU_SD
PD_IN
SD vs.
SGND
IN vs.
SGND
SD pull-up resistor
IN pull-down resistor -
185
58
250
75
310
125 k k
Dynamic characteristics (see
Figure 3
and
Figure 4
) t t on off
MT
SD vs.
LVG/HVG
-
High/low-side driver turn-on propagation delay
SD vs.
LVG/HVG;
IN vs.
LVG/HVG
High/low-side driver turn-off propagation delay
Delay matching, HS and LS turnon/off
(4)
-
V
C
OUT
L
= 0 V; V
= 1 nF; V i
BOOT
= V
CC
= 0 to 3.3 V
;
-
-
85
85
-
120
120
30 ns ns ns t t f r
DT
MDT
LVG, HVG
-
-
Rise time
Fall time
Deadtime setting range
Matching deadtime
(5)
(5)
C
L
= 1 nF
C
L
= 1 nF
R
DT
= 0 , C
L
= 1 nF,
R
DT
C
DT
= 100 k
= 100 nF
, C
L
= 1 nF,
R
DT
C
DT
= 200 k
= 100 nF
, C
L
= 1 nF,
R
DT
= 0 , C
L
= 1 nF,
R
DT
C
DT
= 100 k
= 100 nF
, C
L
= 1 nF,
R
DT
C
DT
= 200 k
= 100 nF
, C
L
= 1 nF,
-
-
-
-
-
1. V
BO
= V
BOOT
- V
OUT
.
2. R
DSON
is tested in the following way:
R
DSON
= [(V
CC
- V
BOOT1
) - (V
CC
- V
BOOT2
)] / [I
1
(V
CC
, V
BOOT1
) - I
2
(V
CC
, V
BOOT2
)] where I
1
is the BOOT pin current when V
BOOT
= V
BOOT1
, I
2
when V
BOOT
= V
BOOT2
.
3. Characterized, not tested in production.
4. MT = max. (| ton
(LVG) - t off
(LVG)|, |t on
(HVG) - t off
(HVG)|, |t off
(LVG) - t on
(HVG)|, |t off
(HVG) - t on
(LVG)|).
5. MDT = | DT
LH
- DT
HL
| see
Figure 4 .
25
25
-
-
-
-
-
0.26 0.40 0.54
2.10 2.70 3.30
4.00 5.00 6.00
85
350
700 ns ns
s s s ns ns ns
8/18 DocID030317 Rev 2
L6494
Figure 3. SD timings
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G
U
PGG
U
PO
Figure 4. IN timings and deadtime
U
S
U
S
U PGG
U
G
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Electrical characteristics
U
PGG
U
G
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DocID030317 Rev 2 9/18
18
Electrical characteristics
Figure 5. Typical deadtime vs. DT resistor value
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10/18 DocID030317 Rev 2
L6494 Truth table
Input
SD IN
L X
(1)
H
H
1. X = don't care .
L
H
Table 6. Truth table
LVG
L
H
L
Output
HVG
L
L
H
DocID030317 Rev 2 11/18
18
Typical application diagram
6 Typical application diagram
7
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Figure 7. Suggested PCB layout (SO-14)
C
BOOT
SD
R
PU
SIGNAL GROUND
R
DT
C
DT
VCC
SIGNAL GROUND Rg
BOTTOM layer
TOP layer
POWER GROUND
AM040071
12/18 DocID030317 Rev 2
L6494 Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is usually accomplished by a high voltage fast recovery diode (
Figure 8 ). In the L6494 an integrated
structure replaces the external diode.
C
BOOT
selection and charging
To choose the proper C
BOOT
value the external MOS can be seen as an equivalent capacitor. This capacitor C
EXT
is related to the MOS total gate charge:
Equation 1
C
EXT
=
Q
V gate
The ratio between the capacitors C
EXT
It has to be:
and C
BOOT
is proportional to the cyclical voltage loss.
Equation 2
C
BOOT
>>>C
EXT if Q gate
is 30 nC and V gate
is 10 V, C
EXT
is 3 nF. With C
BOOT
= 100 nF the drop is 300 mV.
If HVG has to be supplied for a long time, the C
BOOT the leakage and quiescent losses.
selection has also to take into account
HVG steady-state consumption is lower than 120 A, so if HVG T
ON
is 5 ms, C
BOOT
has to supply 0.6 C. This charge on a 1 F capacitor means a voltage drop of 0.6 V.
The internal bootstrap driver gives a great advantage: the external fast recovery diode can be avoided (it usually has great leakage current).
This structure can work only if V
OUT
is close to SGND (or lower) and in the meanwhile the
LVG is on. The charging time (T charge
) of the C
BOOT
is the time in which both conditions are fulfilled and it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS R
DS(on)
(typical value:
175 ). At low frequency this drop can be neglected. Anyway, the rise of frequency has to take into account.
The following equation is useful to compute the drop on the bootstrap DMOS:
Equation 3
V drop
=
I ch arg e
R
DS on
V drop
=
T
Q ch arg e
R
DS on where Q gate is the gate charge of the external power MOS, the bootstrap DMOS and T charge
R
DS(on )
is the on resistance of
is the charging time of the bootstrap capacitor.
DocID030317 Rev 2 13/18
18
Bootstrap driver L6494
For example: using a power MOS with a total gate charge of 30 nC the drop on the bootstrap DMOS is about 1 V, if the T charge
is 5 s. In fact:
Equation 4
Vdrop =
30nC
5 s
175 1V
V drop
has to be taken into account when the voltage drop on C
BOOT
is calculated: if this drop is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode can be used.
Figure 8. Bootstrap driver with external high voltage fast recovery diode
D
BOOT
VCC BOOT
H.V.
HVG
OUT
C
BOOT
TO LOAD
LVG
14/18 DocID030317 Rev 2
L6494 Package information
8.1
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
SO-14 package information
Figure 9. SO-14 package outline
DocID030317 Rev 2
40
15/18
18
Package information
Symbol
L k ddd h
25 e
H
D
E
B
C
A
A1
A2
Table 7. SO-14 package mechanical data
Dimensions (mm)
Min.
-
5.80
0
-
0.40
0
-
1.35
0.10
1.10
0.33
0.19
8.55
3.80
Typ.
-
-
-
1.27
-
-
0.50
-
-
-
-
-
-
-
Figure 10. SO-14 package suggested land pattern
Max.
-
6.20
-
-
1.27
8
0.10
1.75
0.25
1.65
0.51
0.25
8.75
4.00
L6494
".
16/18 DocID030317 Rev 2
L6494 Ordering information
Order code
L6494LD
L6494LDTR
Table 8. Device summary
Package
SO-14
SO-14
Packaging
Tube
Tape and reel
Date
08-Feb-2017
14-Nov-2017
Table 9. Document revision history
Revision Changes
1
2
Initial release.
Updated Section : Description on page 1
,
Table 4 on page 6
and Table 5 on page 7 .
DocID030317 Rev 2 17/18
18
L6494
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18/18 DocID030317 Rev 2
