STMicroelectronics SD4933 Datasheet
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SD4933
M177
Epoxy sealed
HF/VHF/UHF RF power N-channel MOSFET
Datasheet
-
production data
Features
• Improved ruggedness V
(BR)DSS
> 200 V
• Excellent thermal stability
• 20:1 all phases load mismatch capability
• P
OUT
= 300 W min. with 24 dB gain @ 30 MHz
• In compliance with the 2002/95/EEC European directive
Description
The SD4933 is an N-channel MOS field-effect RF power transistor. It is intended for use in 50 V ISM applications up to 100 MHz.
Figure 1. Pin connection
1. Drain
2. Source
3
4 1
5
2
3. Gate
4. Source
5. Source
Order code
SD4933
Marking
SD4933
(1)
Table 1. Device summary
Base qty.
25 pcs
Package
M177
1.
For more details please refer to
Chapter 9: Marking, packing and shipping specifications
.
Packaging
Plastic tray
May 2017
This is information on a product in full production.
DocID15487 Rev 9 1/17 www.st.com
Contents
Contents
1
SD4933
Typical performance (30 MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Marking, packing and shipping specifications . . . . . . . . . . . . . . . . . . . 15
2/17 DocID15487 Rev 9
SD4933 Electrical data
(T
CASE
= 25 °C)
Symbol
V
(BR)DSS
V
DGR
V
GS
I
D
P
DISS
E
AS
T
J
T
STG
Table 2. Absolute maximum ratings
Parameter
Drain source voltage
Drain-gate voltage (R
GS
= 1 M
Ω
)
Gate-source voltage
Drain current
Power dissipation
Avalanche energy
Single pulse (I
D
= 56 A - 800 µH coil)
Max. operating junction temperature
Storage temperature
Value
200
200
±20
40
648
1200
200
-65 to +150
Unit
V
V
V
A
W mJ
°C
°C
Symbol
R thJC
Table 3. Thermal data
Parameter
Junction - case thermal resistance
Value
0.27
Unit
°C/W
DocID15487 Rev 9 3/17
17
Electrical characteristics SD4933
T
CASE
= +25 o
C
2.1 Static
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(Q)
V
DS(ON)
G
FS
C
ISS
C
OSS
CRSS
V
GS
= 0 V
V
GS
= 0 V
V
GS
= 20 V
V
DS
= 10 V
V
GS
= 10 V
V
DS
= 10 V
V
GS
= 0 V
V
GS
= 0 V
V
GS
= 0 V
Table 4. Static
Test conditions
I
DS
= 100 mA
V
DS
= 100 V
V
DS
= 0 V
I
D
= 250 mA
I
D
= 20 A
I
D
= 5 A
V
DS
= 50 V
V
DS
= 50 V
V
DS
= 50 V f = 1 MHz f = 1 MHz f = 1 MHz
Min Typ Max Unit
200 240
2.5
8
3.5
1000
400
16
2
500
3.75
4.0
14
V
S pF pF pF
V mA nA
V
2.2 Dynamic
Symbol
Table 5. Dynamic
Test conditions Min Typ Max Unit
P
OUT
G
PS h
D
V
DD
= 50 V I
DQ
= 250 mA
V
DD
= 50 V I
DQ
= 250 mA P
OUT
f = 30 MHz
= 300 W f = 30 MHz
300
V
DD
= 50 V I
DQ
= 250 mA P
OUT =
300 W f = 30 MHz 20
50
Load mismatch
V
DD
= 50 V I
DQ
= 250 mA P
OUT =
300 W f = 30 MHz
All phase angles
10:1
24
58
20:1
-
-
-
-
W dB
%
VSWR
4/17 DocID15487 Rev 9
SD4933 Impedance data
7\SLFDO,QSXW
,PSHG DQFH
Figure 2. Impedance data
'
=
'/
7\SLFDO'UDLQ
/RDG,PSHGDQFH
*
=
,1
Z in
1.6 - j 5.0
6
Table 6. Impedance values
Z dl
3.3 + j 1.0
$09
DocID15487 Rev 9 5/17
17
Typical performance SD4933
Figure 3. Capacitance vs. drain voltage Figure 4. Drain current vs. drain-source voltage
1400
1200
1000
800
600
400
200
0
0
Cgs Cgd Cds
10 20 30
Drain-source voltage (V)
40 50
AM09243V1
Figure 5. Drain current vs. drain-source voltage at different temperatures
35
30
25
20
15
10
5
0
0 2 4
Vds (V)
6 8 10
AM09244V1
40
35
30
25
20
15
10
5
0
2.0
2.5
25°C
3.0
80°C -20°C
3.5
4.0
Vgs (V)
4.5
5.0
5.5
6.0
AM09245V1
6/17 DocID15487 Rev 9
SD4933
0.30
0.25
0.20
0.15
0.10
0.05
0.00
1.E-04
Figure 6. Transient thermal impedance
Single -repetitive pulse
Typical performance single pulse
10%
20%
30%
40%
50%
60%
1.E+00 1.E-03 1.E-02 1.E-01
Rectangular power pulse Width (s)
AM09280V2
DocID15487 Rev 9 7/17
17
Typical performance
Figure 7. Transient thermal impedance model
'LVVLSDWHG3RZHU:DWWV
5
5
5 2KP
SD4933
&
&
& )
5
5
5 2KP
&
&
& )
5
5
5 2KP
&
&
& )
5
5
5 2KP
&
&
& )
$09
8/17 DocID15487 Rev 9
SD4933
5 Typical performance (30 MHz)
Typical performance (30 MHz)
Figure 8. Gain and efficiency vs. output power_Vdd = 50 V, Idq = 250 mA, freq = 30 MHz
Figure 9. Output power vs. input power
20
18
16
14
0
28
26
24
22
50 100 150 200 250
Pgain
300
Output Power (W)
Efficiency
350 400
40
30
20
450
10
80
70
60
50
AM09248V2
Figure 10. Output power vs. supply voltage
450
400
350
300
250
200
150
100
50
0
0.0
50 V 40 V
0.5
1.0
1.5
2.0
Pin (W)
2.5
3.0
3.5
AM09246V1
Figure 11. Output power vs. gate voltage
400
350
300
250
200
150
100
25 30 35
Vdd (V)
40
Pin = 2.8W
Pin = 1.4W
45 50
AM09247V1
500
400
300
200
100
0
-3
Pin = 2.8W
-2 -1 0
Vgs (V)
1 2 3 4
AM09248V1
DocID15487 Rev 9 9/17
17
Typical performance (30 MHz)
5.1 Test circuit (30 MHz)
Figure 12. 30 MHz test circuit schematic
SD4933
10/17
Dim.
F
G
H
J
K
L
M
N
P
R
C
D
E
A
B
Table 7. Transmission line dimensions
Inch
0.532
0.250
0.181
0.383
0.351
0.633
0.477
0.438
0.200
0.164
0.174
0.817
0.350
0.779
0.639
mm
13.51
6.35
4.59
9.37
8.91
16.08
12.12
11.12
5.08
4.16
4.42
20.75
8.89
19.79
16.23
DocID15487 Rev 9
SD4933 Typical performance (30 MHz)
Dim.
Table 7. Transmission line dimensions (continued)
Inch mm
V
W
X
S
T
U
0.165
1.017
0.375
0.456
0.325
0.650
4.19
25.84
9.52
11.58
8.24
16.50
Component
C1,C9
C2, C3
Table 8. 30 MHz test circuit component list
Description
0.01
μ
F / 500 V surface mount ceramic chip capacitor
750 pF ATC 700B surface mount ceramic chip capacitor
C4 300 pF ATC 700B surface mount ceramic chip capacitor
C5,C10,C11,C14,C16 10000 pF ATC 200B surface mount ceramic chip capacitor
C6 510 pF ATC 700B surface mount ceramic chip capacitor
C7
C8
C12
C13
C15
R1,R3
R2
T1
T2
L1
L2
RFC1,RFC2
FB1
FB2
PCB
300 pF ATC 700B surface mount ceramic chip capacitor
175-680 pF type 46 standard trimmer capacitor
47 μ F / 63 V aluminum electrolytic radial lead capacitor
1200 pF ATC 700B surface mount ceramic chip capacitor
100 μ F / 63 V aluminum electrolytic radial lead capacitor
1 k Ω , 1 W surface-mount chip resistor
560
Ω
2 W wire-wound axis lead resistor
HF 2-30 MHz surface mount 9:1 transformer
RG - 142B/U 50 coaxial cable OD = 0.165[4.18] L 15”[381.00] covered with 15” [381.00] tinned copper tubular brand 13/65” [5.1] width
1 3/4 turn air-wound 16 AWG ID = 0.219 [5.56] poly-coated magnet wire
1 3/4 turn air-wound 12 AWG ID = 0.250 [6.34] bus bar wire
3 turns 14 AWG wire through ferrite toroid
Surface mount EMI shield bead
Toroid
ULTRALAM 2000. 0.030” THK,
ε r = 2.55, 2 Oz ED CU both sides
DocID15487 Rev 9 11/17
17
Circuit layout
Figure 13. Test fixture component layout
SD4933
SD 4933
Figure 14. Test circuit photomasters
44
12/17 DocID15487 Rev 9
Marking
G9
H4
H5
H6
H7
H8
F9
G4
G5
G6
G7
G8
I6
I7
I8
I9
H9
I4
I5
E9
F4
F5
F6
F7
F8
E4
E5
E6
E7
E8
SD4933
7 V
GS
/G
FS
sorts
V
GS
(min)
Table 9. V
GS
/G
FS
sorts
V
GS
(max)
3.00
3.25
3.25
3.25
3.25
3.25
2.75
3.00
3.00
3.00
3.00
3.00
3.25
3.50
3.50
3.50
3.50
3.50
3.50
2.50
2.75
2.75
2.75
2.75
2.75
2.50
2.50
2.50
2.50
2.50
3.25
3.50
3.50
3.50
3.50
3.50
3.00
3.25
3.25
3.25
3.25
3.25
3.50
3.75
3.75
3.75
3.75
3.75
3.75
2.75
3.00
3.00
3.00
3.00
3.00
2.75
2.75
2.75
2.75
2.75
13
8
9
10
11
12
13
8
9
10
11
12
10
11
12
13
13
8
9
13
8
9
10
11
12
G
FS
(min)
8
9
10
11
12
VGS/GFS sorts
14
9
10
11
12
13
14
9
10
11
12
13
11
12
13
14
14
9
10
14
9
10
11
12
13
G
FS
(max)
9
10
11
12
13
DocID15487 Rev 9 13/17
17
Package mechanical data
8 Package mechanical data
SD4933
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK is an ST trademark.
Table 10. M177 (.550 DIA 4/L N/HERM W/FLG) mechanical data mm.
Inch
Dim.
Min Typ
A 5.72
B 6.73
Max Min Typ Max
0.235
0.275
F 0.08
G 2.49
H 3.81
0.007
0.108
0.170
Figure 15. Package dimensions
14/17
Controlling dimension: Inches
DocID15487 Rev 9
GAPMSMD00039
SD4933
9
Marking, packing and shipping specifications
Marking, packing and shipping specifications
Order code
SD4933
Table 11. Packing and shipping specifications
Packaging
Pcs per tray
Dry pack humidity
V
GS and G
FS code
Plastic tray 25 < 10% Not mixed
Lot code
Not mixed
Figure 16. Marking layout
SD4933
Symbol
X
CZ xxx
VY
MAR
CZ y yy
Table 12. Marking specifications
Description
V
GS
and G
FS sort
Assembly plant
Last 3 digits of diffusion lot
Diffusion plant
Country of origin
Test and finishing plant
Assembly year
Assembly week
DocID15487 Rev 9 15/17
17
Revision history SD4933
Date
11-Mar-2009
24-Feb-2010
29-Sep-2010
06-Apr-2011
24-May-2011
11-Aug-2011
10-Jun-2013
01-Jul-2013
09-May-2017
Revision
Table 13. Document revision history
Changes
1
2
3
4
5
6
7
8
9
Initial release
Updated Table 9: VGS/GFS sorts on page 13.
Document status promoted from preliminary to datasheet.
Inserted Section 3: Impedance data, Section 4: Typical performance,
Section 6: Circuit layout and Section 9: Marking, packing and
shipping specifications.
Inserted Figure 6: Transient thermal impedance, Figure 7: Transient
thermal impedance model and Section 9: Marking, packing and
shipping specifications.
– E
AS
parameter inserted in Table 2: Absolute maximum ratings on
page 3.
– Minor text changes.
– Corrected error in V
GS(Q)
symbol and test conditions in Table 4:
Static.
– Minor text edits.
– Modified the VGS(Q) and GFS values in Table 4: Static.
– Reduced the number of entries in Table 9: VGS/GFS sorts to include only the relevant selection codes.
– Modified the G
FS
values in
16/17 DocID15487 Rev 9
SD4933
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DocID15487 Rev 9 17/17
17
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