STMicroelectronics STD2HNK60Z Datasheet
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STD2HNK60Z, STD2HNK60Z-1
Datasheet
N-channel 600 V, 3.5 Ω typ., 2 A SuperMESH Power MOSFETs in
DPAK and IPAK packages
TAB
1
DPAK
3
TAB
1
2
3
IPAK
G(1)
D(2, TAB)
S(3)
AM01476v1_tab
Features
Order codes V
DS
STD2HNK60Z
STD2HNK60Z-1
• 100% avalanche tested
• Gate charge minimized
• Very low intrinsic capacitance
• Zener-protected
600 V
R
DS(on)
max.
4.8 Ω
I
D
2 A
Applications
• Switching applications
Description
These high-voltage devices are Zener-protected N-channel Power MOSFETs developed using the SuperMESH technology by STMicroelectronics, an optimization of the well-established PowerMESH. In addition to a significant reduction in onresistance, these devices are designed to ensure a high level of dv/dt capability for the most demanding applications.
Product status links
STD2HNK60Z
STD2HNK60Z-1
Product summary
Order code
Marking
Package
Packing
Order code
Marking
Package
Packing
STD2HNK60Z
D2HNK60Z
DPAK
Tape and reel
STD2HNK60Z-1
D2HNK60Z
IPAK
Tube
DS3646 - Rev 7 - October 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STD2HNK60Z, STD2HNK60Z-1
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Drain-source voltage
Gate-source voltage
Parameter
I
D
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed) I
DM
P
TOT
ESD
T
STG
T
J
Total power dissipation at T
C
Gate-source human body model (R = 1.5 kΩ, C = 100 pF)
Peak diode recovery voltage slope
Storage temperature range
= 25 °C
Operating junction temperature range
1. Pulse width limited by safe operating area.
2. I
SD
≤ 2 A, di/dt ≤ 200 A/μs, V
DS
(peak) ≤ V
(BR)DSS
, V
DD
= 80% V
(BR)DSS
.
Table 2. Thermal data
Symbol Parameter
R thJC
R thJA
R thJB
Thermal resistance, junction-to-case
Thermal resistance, junction-to-ambient
Thermal resistance, junction-to-board
1. When mounted on 1 inch² FR-4, 2 Oz copper board.
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive (t p
limited by T
J
max)
Single pulse avalanche energy (starting T
J
= 25 °C, I
D
= I
AR
; V
DD
= 50 V)
Value
600
±30
2.0
1.26
8
45
2
4.5
-55 to 150
DPAK
Value
IPAK
2.77
100
50
Unit
°C/W
°C/W
°C/W
Value
2
120
Unit
A mJ
Unit
V
V
A
A
W kV
V/ns
°C
°C
DS3646 - Rev 7 page 2/21
2
STD2HNK60Z, STD2HNK60Z-1
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 4. On/off states
Symbol
V
(BR)DSS
I
DSS
Parameter
I
GSS
V
GS(th)
R
DS(on)
1. Specified By Design – Not tested in production.
Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 600 V
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 600 V, T
C
Gate-body leakage current
Gate threshold voltage
V
DS
= 0 V, V
GS
= ±20 V
V
DS
= V
GS
, I
D
= 50 μA
Static drain-source on resistance V
GS
= 10 V, I
D
= 1 A
Min.
Typ.
Max.
Unit
600 V
1
50
μA
3 3.75
3.5
±10
4.5
4.8
μA
V
Ω
Table 5. Dynamic characteristics
Symbol Parameter Test conditions Min.
Typ.
Max.
Unit
C iss
C oss
C rss
C oss eq
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent output capacitance
V
DS
= 25 V, f = 1 MHz, V
GS
V
DS
= 0 to 480 V, V
GS
= 0 V
= 0 V
-
-
-
280
38
7
30 pF pF pF pF
Q g
Q gs
Q gd
Total gate charge
Gate-source charge
Gate-drain charge
V
V
DD
GS
= 480 V, I
D
= 2 A,
= 0 to 10 V (see Figure 14. Test circuit for gate charge behavior )
-
-
11
2.25
6
15
nC nC nC
1. C oss eq
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS
increases from 0 to 80% V
DSS
.
2. Specified By Design – Not tested in production.
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 300 V, I
D
= 1 A,
R
G
= 4.7 Ω , V
GS
= 10 V
(see
Figure 13. Test circuit for resistive load switching times and
Figure 18. Switching time waveform )
Min.
Typ.
Max.
Unit
10 ns
-
-
-
30
23
50
-
-
ns ns ns
DS3646 - Rev 7 page 3/21
STD2HNK60Z, STD2HNK60Z-1
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
V
SD
t rr
Q rr
I
RRM t rr
I
Q rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Pulse width is limited by safe operating area.
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
I
V
GS
SD
= 0 V, I
Test conditions
SD
= 2 A
= 2 A, di/dt = 100 A/μs, V
DD
(see
= 20 V
Figure 15. Test circuit for inductive load switching and diode recovery times
I
SD
= 2 A, di/dt = 100 A/μs,
V
DD
= 20 V, T
J
= 150 °C
(see
Figure 15. Test circuit for inductive load switching and diode recovery times )
-
-
-
-
-
Min.
Typ.
Max.
Unit
2 A
-
8
1.6
A
V
178
445
5
200
500 ns nC
A ns nC
5 A
DS3646 - Rev 7 page 4/21
STD2HNK60Z, STD2HNK60Z-1
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
I
D
(A)
Figure 1. Safe operating area
GADG280920211324SOA
I
DM t p
=10µs
10 0
10 -1
10 0
by R
DS(on)
R
DS(on)
max.
10 1
T
C
= 25 °C
T
J
≤ 150 °C single pulse
10 2 t p
=100µs t p
=1ms
V
(BR)DSS t p
=10ms
V
DS
(V)
Figure 3. Output characterisics
K
Figure 2. Thermal impedance
GADG280920211324ZTH duty=0.5
2
10 -1
05
02
0.01
Single pulse
10 -2
10 -5 10 -4 10 -3
Z th
= KR duty = t p thJ-c
/ T t p
T
10 -2 t p
(s)
Figure 4. Transfer characteristics
Figure 5. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
1.10
I
D
= 1 mA
GADG280920211325BDV
1.05
1.00
0.95
0.90
0.85
-75 -25 25 75 125 T j
(°C)
DS3646 - Rev 7
Figure 6. Static drain-source on-resistance page 5/21
Figure 7. Gate charge vs gate-source voltage
STD2HNK60Z, STD2HNK60Z-1
Electrical characteristics (curves)
Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage vs temperature
Figure 10. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.5
V
GS
= 10 V
GADG280920211325RON
2.0
1.5
1.0
0.5
0.0
-75 -25 25 75 125 T j
(°C)
Figure 11. Source-drain diode forward characteristics Figure 12. Maximum avalanche energy vs temperature
I
D
= 2 A
V
DD
= 50 V
DS3646 - Rev 7 page 6/21
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
Figure 14. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 16. Unclamped inductive load test circuit
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
G
25 Ω
A
D
S
D.U.T.
B
+
_
R
A A fast diode
B
B
G
G
100 µH
D
D.U.T.
3.3
µF +
1000
µF
S
V
DD
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01470v1
STD2HNK60Z, STD2HNK60Z-1
Test circuits
Figure 17. Unclamped inductive waveform
V
(BR)DSS
I
DM
V
D
I
D
V
DD
V
DD
AM01472v1
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r
90% t d(off) t off t f
90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS3646 - Rev 7 page 7/21
4
4.1
STD2HNK60Z, STD2HNK60Z-1
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
DPAK (TO-252) type A package information
Figure 19. DPAK (TO-252) type A package outline
DS3646 - Rev 7
0068772_A_30 page 8/21
DS3646 - Rev 7
Dim.
(L1)
L2
L4
R
V2
E1 e e1
H
L c c2
D
D1
E
A
A1
A2 b b4
STD2HNK60Z, STD2HNK60Z-1
DPAK (TO-252) type A package information
Table 8. DPAK (TO-252) type A mechanical data mm
Typ.
Min.
4.60
2.159
4.445
9.35
1.00
2.60
0.65
0.60
0.45
0.48
6.00
4.95
6.40
2.20
0.90
0.03
0.64
5.20
5.10
4.70
2.286
4.572
2.80
0.80
0.20
0°
Max.
4.80
2.413
4.699
10.10
1.50
3.00
0.95
1.00
0.60
0.60
6.20
5.25
6.60
2.40
1.10
0.23
0.90
5.40
8° page 9/21
4.2
STD2HNK60Z, STD2HNK60Z-1
DPAK (TO-252) type C package information
DPAK (TO-252) type C package information
Figure 20. DPAK (TO-252) type C package outline
DS3646 - Rev 7
0068772_C_29 page 10/21
DS3646 - Rev 7
Dim.
L6
θ1
θ2
V2
L2
L3
L4
E1 e
H
L
L1 c c2
D
D1
E
A
A1
A2 b b4
STD2HNK60Z, STD2HNK60Z-1
DPAK (TO-252) type C package information
Table 9. DPAK (TO-252) type C mechanical data
Min.
0.47
0.47
6.00
5.25
6.50
2.20
0.90
0.00
0.72
5.13
4.70
2.186
9.80
1.40
mm
Typ.
2.30
1.01
5.33
6.10
6.60
2.286
10.10
1.50
2.90 REF
0.90
0.60
5°
5°
0°
0.51 BSC
0.80
1.80 BSC
7°
7°
6.70
2.386
10.40
1.70
Max.
2.38
1.10
0.10
0.85
5.46
0.60
0.60
6.20
1.25
1.00
9°
9°
8° page 11/21
DS3646 - Rev 7
STD2HNK60Z, STD2HNK60Z-1
DPAK (TO-252) type C package information
Figure 21. DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_30 page 12/21
4.3
STD2HNK60Z, STD2HNK60Z-1
DPAK (TO-252) packing information
DPAK (TO-252) packing information
Figure 22. DPAK (TO-252) tape outline
T
Top cover tape
10 pitches cumulative tolerance on tape +/- 0.2 mm
P0 D P2
F
E
W
B1
K0
B0
For machine ref. only including draft and radii concentric around B0
A0 P1
User direction of feed
D1
User direction of feed
R
Bending radius
AM08852v1
DS3646 - Rev 7 page 13/21
DS3646 - Rev 7
A
D
B
STD2HNK60Z, STD2HNK60Z-1
DPAK (TO-252) packing information
Figure 23. DPAK (TO-252) reel outline
T
40mm min. access hole at slot location
C
N
G measured at hub
Full radius
Tape slot in core for tape start
2.5mm min.width
Dim.
P2
R
T
W
K0
P0
P1
E
F
A0
B0
B1
D
D1
AM06038v1
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
C
D
G
A
B
N
T
Min.
1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
1.5
12.8
20.2
16.4
50 mm
Max.
330
13.2
18.4
22.4
2500
2500 page 14/21
4.4
STD2HNK60Z, STD2HNK60Z-1
IPAK (TO-251) type A package information
IPAK (TO-251) type A package information
Figure 24. IPAK (TO-251) type A package outline
DS3646 - Rev 7
0068771_IK_typeA_rev15 page 15/21
DS3646 - Rev 7
Dim.
B5 c c2
D
E
A
A1 b b2 b4
L
L1
L2
V1 e e1
H
STD2HNK60Z, STD2HNK60Z-1
IPAK (TO-251) type A package information
Table 11. IPAK (TO-251) type A package mechanical data mm
Typ.
Min.
2.20
0.90
0.64
5.20
0.45
0.48
6.00
6.40
4.40
9.00
0.80
0.30
2.28
16.10
0.80
10°
0.60
0.60
6.20
6.60
Max.
2.40
1.10
0.90
0.95
5.40
4.60
9.40
1.20
1.00
page 16/21
4.5
STD2HNK60Z, STD2HNK60Z-1
IPAK (TO-251) type C package information
IPAK (TO-251) type C package information
Figure 25. IPAK (TO-251) type C package outline
DS3646 - Rev 7
0068771_IK_typeC_rev15 page 17/21
DS3646 - Rev 7
Dim.
E1 e e1
H
L
L1
L2
θ1
θ2 c c2
D
D1
E
A
A1 b b2 b4
STD2HNK60Z, STD2HNK60Z-1
IPAK (TO-251) type C package information
Table 12. IPAK (TO-251) type C package mechanical data
Min.
2.20
0.90
0.66
mm
Typ.
2.30
1.00
5.20
6.50
4.60
2.20
4.40
16.18
9.00
0.80
0.90
3°
1°
5.23
0.46
0.46
6.00
5.33
16.48
9.30
1.00
1.08
5°
3°
6.10
5.37
6.60
4.78
2.25
4.50
Max.
4.95
2.30
4.60
16.78
9.60
1.20
1.25
7°
5°
0.59
0.59
6.20
5.55
6.70
2.35
1.10
0.79
0.90
5.43
page 18/21
STD2HNK60Z, STD2HNK60Z-1
Revision history
Date
09-Mar-2004
23-Mar-2004
02-Apr-2005
06-Mar-2006
25-May-2012
04-Jun-2018
06-Oct-2021
6
7
Table 13. Document revision history
Revision
1
2
3
4
5
Changes
First release.
Modified title
Added new section: Electrical characteristics (curves)
Inserted DPAK. The document has been reformatted
Corrected unit in Table 5: On/off states
Removed maturity status indication from cover page. The document status is production data.
Updated title and features in cover page, Section 1 Electrical ratings , Section
2 Electrical characteristics and Section 4 Package information.
Minor text changes.
The part numbers STF2HNK60Z and STQ2HNK60ZR-AP have been moved to a separate datasheet and the document has been updated accordingly.
Modified Table 7. Source-drain diode
.
Modified Figure 1. Safe operating area , Figure 2. Thermal impedance
,
.
and
Updated Section 4 Package information .
DS3646 - Rev 7 page 19/21
STD2HNK60Z, STD2HNK60Z-1
Contents
Contents
DS3646 - Rev 7 page 20/21
STD2HNK60Z, STD2HNK60Z-1
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DS3646 - Rev 7 page 21/21
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