STMicroelectronics STF16N90K5 Datasheet
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STF16N90K5
Datasheet
N-channel 900 V, 280 mΩ typ., 15 A MDmesh K5 Power MOSFET in a TO-220FP package
G(1)
TO-220FP
D(2)
S(3)
1
2
3
Features
Order code
STF16N90K5
V
DS
900 V
• Industry’s lowest R
DS(on)
x area
• Industry’s best FoM (figure of merit)
• Ultra-low gate charge
• 100% avalanche tested
• Zener-protected
Applications
• Switching applications
R
DS(on)
max.
330 mΩ
I
D
15 A
AM15572v1_no_tab
Description
This very high voltage N-channel Power MOSFET is designed using MDmesh K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency.
Product status link
STF16N90K5
Product summary
Order code
Marking
Package
Packing
STF16N90K5
16N90K5
TO-220FP
Tube
DS13052 - Rev 1 - August 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STF16N90K5
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM
P
TOT
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Parameter
V
ISO dv/dt
dv/dt
T
J
T stg
Total power dissipation at T
C
= 25 °C
Insulation withstand voltage (RMS) from all three leads to external heat sink
(t = 1 s; T
C
= 25 °C)
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Operating junction temperature range
Storage temperature range
1. Pulse width limited by safe operating area.
2. I
SD
≤ 15 A, di/dt ≤ 100 A/μs; V
DS
(peak) ≤ V
(BR)DSS
, V
DD
= 450 V.
3. V
DS
≤ 720 V.
Symbol
R thj-case
R thj-amb
Table 2. Thermal data
Thermal resistance junction-case
Thermal resistance junction-amb
Parameter
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive (pulse width limited by T
J
max)
Single pulse avalanche energy (starting T
J
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±30
15
9
60
30
2.5
4.5
50
-55 to 150
Unit
V
A
A
A
W kV
V/ns
°C
Value
4.1
62.5
Value
5
380
Unit
°C/W
°C/W
Unit
A mJ
DS13052 - Rev 1 page 2/12
2
STF16N90K5
Electrical characteristics
Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 4. On/off state
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
Test conditions
= 0 V, I
D
= 1 mA
I
DSS
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 900 V
V
GS
= 0 V, V
DS
= 900 V
T
C
I
GSS
Gate body leakage current
Gate threshold voltage
V
DS
= 0 V, V
GS
= ±20 V
V
GS(th)
V
DS
= V
GS
, I
D
= 100 µA
R
DS(on)
Static drain-source on-resistance
V
GS
= 10 V, I
1. Defined by design, not subject to production test.
D
= 7.5 A
Min.
900
3
Typ.
4
280
Max.
1
50
±10
5
330
Table 5. Dynamic
Symbol
C
C
C iss
C oss
C
R
Q
Q
Q rss o(er) o(tr) g g gs gd
Parameter Test conditions
Input capacitance
Output capacitance
V
DS
= 100 V, f = 1 MHz,
V
GS
= 0 V
Reverse transfer capacitance
Equivalent capacitance energy related
Equivalent capacitance time related
V
GS
= 0 V,
V
DS
= 0 to 720 V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 720 V, I
D
= 15 A
V
GS
= 0 to 10 V
(see Figure 14. Test circuit for gate charge behavior
)
Min.
-
-
-
-
1
-
-
-
Typ.
1027
106
1.6
51
141
4.9
29.7
7.3
17.7
Max.
9
-
-
-
-
-
-
-
-
Unit pF pF pF pF pF nC
1. C o(er)
is a constant capacitance value that gives the same stored energy as C oss
while V
DS
is rising from 0 to 80% V
DSS
.
2. C o(tr)
is a constant capacitance value that gives the same charging time as C oss
while V
DS
is rising from 0 to 80% V
DSS
.
Ω nC nC
Unit
V
µA
µA
µA
V mΩ
DS13052 - Rev 1 page 3/12
DS13052 - Rev 1
STF16N90K5
Electrical characteristics
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 450 V, I
D
= 7.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 13. Test circuit for resistive load switching times
and
Figure 18. Switching time waveform
)
Min.
-
-
-
-
Typ.
28.8
36
46
9.8
Max.
-
-
-
-
Unit ns ns ns ns
Table 7. Source-drain diode
Symbol
I
I
SD
SDM
Parameter
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Test conditions
V
SD
I
I t rr
Q rr
RRM t
Q rr rr
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 15 A, V
GS
= 0 V
I
SD
= 15 A, di/dt = 100 A/µs,
V
DD
= 60 V
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
I
SD
= 15 A, di/dt = 100 A/µs,
V
DD
= 60 V,
T j
= 150 °C
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Min.
-
-
-
-
-
-
-
-
-
Symbol
V
(BR)GSO
Parameter
Gate-source breakdown voltage
Table 8. Gate-source Zener diode
Test conditions Min.
I
GS
= ±1 mA, I
D
= 0 A 30
458
8.13
35.5
546
9.2
33.7
Typ.
Max.
15
60
1.5
A ns
µC
V ns
µC
Unit
A
A
A
Typ.
-
Max.
-
Unit
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry.
page 4/12
STF16N90K5
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A)
10 1
I
DM
this
area
DS(on)
by R
GADG300720190845SOA t p
= 1µs
V
(BR)DSS t p
= 10µs t p
= 100µs
10 0
R
DS(on)
max.
t p
= 1ms
10 -1
10 -2
10 -1 10 0
T
T
J
C
= 25 °C
≤ 150°C
Single pulse
10 1 10 2 10 3 t p
= 10ms
V
DS
(V)
Figure 3. Typical output characteristics
I
D
(A)
35
GIPG231020180825OCH
V
GS
=10V
30
V
GS
=9V
25
20
15
V
GS
=8V
10
5
0
0 4 8 12 16
V
GS
=7V
V
V
DS
GS
=6V
(V)
Figure 5. Normalized breakdown voltage vs temperature
V
(BR)DSS
(norm.)
1.10
I
D
= 1 mA
GIPG221020181225BDV
1.05
1.00
0.95
0.90
0.85
-75 -25 25 75 125 T
J
(°C)
Figure 2. Maximum transient thermal impedance
Z thJ-C
(°C/W)
0.4
GADG300720190845ZTH
0.3
duty=0.5
10 0
0.2
0.1
0.05
10 -1
10 -2
RthJ-C = 4.1 °C/W duty = t on
/ T
Single pulse t on
10 -3
T
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
Figure 4. Typical transfer characteristics
25
20
15
I
D
(A)
35
30
10
5
0
4 5
V
DS
= 15 V
6 7
GIPG231020180826TCH
8 9 V
GS
(V)
Figure 6. Typical drain-source on-resistance
R
DS(on)
(mΩ)
310
GADG310720191006RON
300
290
280
270
260
250
0 2 4
V
GS
= 10 V
6 8 10 12 14 I
D
(A)
DS13052 - Rev 1 page 5/12
STF16N90K5
Electrical characteristics (curves)
Figure 7. Typical gate charge characteristics
V
DS
(V)
700
V
DD
GADG300720191127QVG
= 720 V, I
D
= 15 A
V
GS
(V)
14
600
500
400
Q gs
300
200
100
0
0 6
Q g
Q gd
12 18 24 30 36
12
10
8
6
4
2
Q
0 g
(nC)
Figure 9. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
1.1
GIPG221020181223VTH
I
D
=250 μA
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T
J
(°C)
Figure 11. Maximum avalanche energy vs temperature
E
AS
(mJ)
360
300
GIPG231020180827EAS
Single pulse
I
D
= 5 A
V
DD
= 50 V
240
180
120
60
0
-75 -25 25 75 125 T
J
(°C)
Figure 8. Typical capacitances vs voltage
C
(pF)
GIPG231020180825CVR
10 3
C
ISS
10 2
10 1 f = 1 MHz
C
OSS
C
RSS
10 0
10 -1 10 0 10 1 10 2
V
DS
(V)
Figure 10. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.5
V
GS
= 10 V
GIPG221020181224RON
2.0
1.5
1.0
0.5
0.0
-75 -25 25 75 125 T
J
(°C)
Figure 12. Typical source-drain diode forward characteristics
V
SD
(V)
1.0
GIPG231020180825SDF
T
J
= -50 °C
0.9
0.8
0.7
0.6
0.5
0.4
2 4 6 8
T
J
= 25 °C
T
J
= 150 °C
10 12 14 I
SD
(A)
DS13052 - Rev 1 page 6/12
STF16N90K5
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
Figure 14. Test circuit for gate charge behavior
V
DD
RL
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
100 Ω D.U.T.
V
G
AM01469v10
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
A A fast diode
B
B
G
+
_
R
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS13052 - Rev 1 page 7/12
4
4.1
STF16N90K5
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
TO-220FP package information
Figure 19. TO-220FP package outline
DS13052 - Rev 1
7012510_Rev_13_B page 8/12
DS13052 - Rev 1
Dim.
F2
G
G1
H
L2
L3
L4
L5
L6
L7
Dia
D
E
A
B
F
F1
Table 9. TO-220FP package mechanical data mm
Typ.
Min.
4.40
2.50
2.50
0.45
0.75
1.15
1.15
4.95
2.40
10.00
16.00
28.60
9.80
2.90
15.90
9.00
3.00
STF16N90K5
TO-220FP package information
Max.
4.60
2.70
2.75
0.70
1.00
1.70
1.70
5.20
2.70
10.40
30.60
10.60
3.60
16.40
9.30
3.20
page 9/12
Revision history
Date
01-Aug-2019
Revision
1
Table 10. Document revision history
Changes
First release.
STF16N90K5
DS13052 - Rev 1 page 10/12
STF16N90K5
Contents
Contents
DS13052 - Rev 1 page 11/12
STF16N90K5
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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DS13052 - Rev 1 page 12/12
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