STMicroelectronics STFH10N60M6 Datasheet
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STFH10N60M6
Datasheet
N-channel 600 V, 520 mΩ typ., 6.4 A MDmesh M6 Power MOSFET in a
TO-220FP wide creepage package
TO-220 FP wide creepage
D(2)
Features
Order code
V
DS
@
T
Jmax
STFH10N60M6 650 V
• Reduced switching losses
• Lower R
DS(on)
per area vs previous generation
• Low gate input resistance
• 100% avalanche tested
• Zener-protected
R
DS(on)
max.
600 mΩ
I
D
6.4 A
G(1)
S(3)
Product status link
STFH10N60M6
Product summary
Order code
Marking
Package
Packing
STFH10N60M6
10N60M6
TO-220FP wide creepage
Tube
AM15572v1_no_tab
Applications
• Switching applications
• LLC converters, resonant converters
• Boost PFC converters
Description
The new MDmesh M6 technology incorporates the most recent advancements to the well-known and consolidated MDmesh family of SJ MOSFETs. STMicroelectronics builds on the previous generation of MDmesh devices through its new M6 technology, which combines excellent R
DS(on)
per area improvement with one of the most effective switching behaviors available, as well as a user-friendly experience for maximum end-application efficiency.
The TO-220FP wide creepage package provides increased surface insulation for
Power MOSFETs to prevent failure due to arcing, which can occur in polluted environments.
DS12910 - Rev 2 - May 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STFH10N60M6
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
GS
I
D
I
D
I
DM
P
TOT dv/dt
dv/dt
Gate-source voltage
Parameter
Drain current (continuous) at T
C
Drain current (continuous) at T
C
Drain current (pulsed)
Total power dissipation at T
C
= 25 °C
= 100 °C
= 25 °C
Peak diode recovery voltage slope
V
ISO
MOSFET dv/dt ruggedness
Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; T
C
= 25 °C)
Storage temperature range T stg
T j
Operating junction temperature range
1. Limited by package.
2. Pulse width limited by package.
3. I
SD
≤ 6.4 A, di/dt ≤ 400 A/µs; V
DS (peak)
< V
(BR)DSS
, V
DD
= 400 V
4. V
DS
≤ 480 V
Symbol
R thj-case
R thj-amb
Table 2. Thermal data
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
(pulse width limited by T jmax
)
Single pulse avalanche energy
(starting T j
=25 °C, I
D
= I
AR
; V
DD
=50 V)
Value
±25
6.4
4
16.6
20
15
100
2.5
- 55 to 150
Value
6.25
62.5
Value
1.4
120
Unit
°C/W
°C/W
Unit
V
A
A
A
W
V/ns
V/ns kV
°C
Unit
A mJ
DS12910 - Rev 2 page 2/12
2
STFH10N60M6
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4. On /off states
Symbol
V
(BR)DSS
Parameter
Drain-source breakdown voltage
V
GS
= 0 V, I
Test conditions
D
= 1 mA
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
Static drain-source onresistance
1. Defined by design, not subject to production test.
V
GS
= 0 V, V
DS
= 600 V
V
GS
= 0 V, V
DS
= 600 V, T
C
V
DS
V
DS
= 0 V, V
= V
GS
GS
, I
D
= ±25 V
= 250 µA
V
GS
= 10 V, I
D
= 3.2 A
Min.
Typ.
Max.
Unit
600 V
3.25
4
520
1
100
±5
4.75
600
µA
µA
µA
V mΩ
Table 5. Dynamic
Symbol
C iss
C oss
C rss
C oss eq.
R
G
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
V
DS
Test conditions
= 100 V, f = 1 MHz, V
Equivalent output capacitance V
DS
= 0 to 480 V, V
GS
= 0 V
Intrinsic gate resistance f = 1 MHz, I
D
=0 A
Total gate charge
Gate-source charge
Gate-drain charge
GS
= 0 V
V
DD
= 480 V, I
D
= 6.4 A, V
GS
= 0 to 10 V
(see Figure 14. Test circuit for gate charge behavior )
Min.
-
-
-
-
-
-
-
-
Typ.
338
26.2
3.88
59
7
8.8
2.7
4.8
Max.
-
-
-
-
-
-
-
-
Unit pF pF pF pF
Ω nC nC nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V to 80% V
DSS
DS
increases from 0
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
V
GS
= 300 V, I
D
= 3.2 A, R
G
= 4.7 Ω,
= 10 V (see Figure 13. Test circuit for resistive load switching times and
Figure 18. Switching time waveform )
Min.
Typ.
Max.
Unit
11 ns
8 ns
-
23
10 -
ns ns
DS12910 - Rev 2 page 3/12
STFH10N60M6
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
V
SD
I t rr
Q rr
I
RRM t
Q rr rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1. Limited by package.
2. Pulse width limited by safe operating area.
3. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
Test conditions
I
SD
= 6.4 A, V
GS
= 0 V
I
SD
= 6.4 A, di/dt = 100 A/µs
V
DD
= 60 V (see
Figure 15. Test circuit for inductive load switching and diode recovery times )
I
SD
= 6.4 A, di/dt = 100 A/µs
V
DD
= 60 V, T j
= 150 °C
(see Figure 15. Test circuit for inductive load switching and diode recovery times
)
-
-
-
-
-
-
Min.
Typ.
Max.
Unit
6.4
A
16.6
A
1.6
155
0.813
10.5
250
1.35
A ns
µC
V ns
µC
10.8
A
DS12910 - Rev 2 page 4/12
STFH10N60M6
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A)
GADG010220191022SOA
Operation in this area is limited by R
DS(on)
10 1
10 0
10 -1
10 -1 10 0
T
J
≤150 °C
T
C
=25 °C
V
GS
=10 V single pulse
10 1 10 2 t p
=1 µs t p
=10 µs t p
=100 µs t p
=1 ms t p
V
DS
=10 ms
(V)
I
D
(A)
14
12
10
8
6
4
2
0
0
Figure 3. Output characteristics
2 4
GADG010220191025OCH
V
GS
= 9, 10 V
6
V
GS
=8 V
V
GS
=7 V
V
GS
=6 V
8 10 12 14 V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
DS
(V)
600
500
Q gs
400
V
DD
I
D
= 480 V
= 6.4 A
GADG010220191029QVG V
GS
(V)
12
Q g
Q gd
10
8
300
200
100
0
0 2
V
DS
4 6 8 10
6
4
2
Q
0 g
(nC)
Figure 2. Thermal impedance
GC20940_ZTH
K
δ=0.5
δ=0.2
0.1
0.05
10 -1
0.02
0.01
Single pulse
10 -2
10 -3
10 -4 10 -3 10
-2
10
-1
10
0 t p (s)
Figure 4. Transfer characteristics
I
D
(A)
14
12
10
8
6
4
2
0
2 3
V
DS
= 16 V
4 5 6
GADG010220191025TCH
7 8 9 V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(mΩ)
580
V
GS
= 10 V
GADG010220191024RID
560
540
520
500
480
460
0 1 2 3 4 5 6 I
D
(A)
DS12910 - Rev 2 page 5/12
STFH10N60M6
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
GADG010220191025CVR
10 3
C
ISS
10 2
10 1
10 0
10 -1 10 0 f = 1 MHz
10 1 10 2
C
OSS
C
RSS
V
DS
(V)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
2.5
GADG191220180856RON
2.0
1.5
1.0
0.5
0.0
-75 -25
V
GS
= 10 V
25 75 125 T j
(°C)
Figure 11. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
1.10
GADG191220180856BDV
I
D
= 1 mA 1.05
1.00
0.95
0.90
0.85
-75 -25 25 75 125 T j
(°C)
Figure 8. Normalized gate threshold voltage vs.
temperature
V
GS(th)
(norm.)
1.1
GADG191220180856VTH
1.0
0.9
0.8
0.7
0.6
-75 -25
I
D
= 250 µA
25 75 125 T j
(°C)
Figure 10. Source-drain diode forward characteristics
V
SD
(V)
1.1
GADG010220191024SDF
T j
= -50 °C
1.0
0.9
0.8
0.7
0.6
0.5
0 1 2 3
T j
= 25 °C
T j
= 150 °C
4 5 6 I
SD
(A)
Figure 12. Output capacitance stored energy
E
OSS
(µJ)
3.0
GADG010220191039EOS
2.5
2.0
1.5
1.0
0.5
0.0
0 100 200 300 400 500 600 V
DS
(V)
DS12910 - Rev 2 page 6/12
STFH10N60M6
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF V
DD
D.U.T.
Figure 14. Test circuit for gate charge behavior
V
DD
RL
V
GS pulse width
2200
μF
+
1 kΩ
I
G
= CONST
2.7 kΩ
47 kΩ
100 Ω D.U.T.
V
G
AM01469v10
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
A A fast diode
B
B
G
+
_
R
G
100 µH
D
D.U.T.
S
3.3
µF
+
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
V
D
I
DM
I
D
V
DD
V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS12910 - Rev 2 page 7/12
4
4.1
STFH10N60M6
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
TO-220FP wide creepage package information
Figure 19. TO-220FP wide creepage package outline
DS12910 - Rev 2
DM00260252_1 page 8/12
DS12910 - Rev 2
Dim.
F2
G
G1
H
L2
L3
L4
L5
L6
L7
Dia
D
E
A
B
F
F1
STFH10N60M6
TO-220FP wide creepage package information
Table 8. TO-220FP wide creepage package mechanical data
4.15
10.90
15.25
28.70
10.00
2.55
16.00
9.05
3.00
0.46
0.76
0.96
1.11
8.40
Min.
4.60
2.50
2.49
8.50
4.25
11.00
15.40
29.00
10.20
2.70
16.10
9.15
3.10
mm
Typ.
4.70
2.60
2.59
4.35
11.10
15.55
29.30
10.40
2.85
16.20
9.25
3.20
0.59
0.89
1.25
1.40
8.60
Max.
4.80
2.70
2.69
page 9/12
STFH10N60M6
Revision history
Date
11-Feb-2019
30-May-2019
Revision
1
2
Table 9. Document revision history
Changes
First release.
Updated
and Section 2.1 Electrical characteristics
.
Minor text changes.
DS12910 - Rev 2 page 10/12
STFH10N60M6
Contents
Contents
DS12910 - Rev 2 page 11/12
STFH10N60M6
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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© 2019 STMicroelectronics – All rights reserved
DS12910 - Rev 2 page 12/12
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