STMicroelectronics STF11N65M2(045Y) Datasheet
โฆษณา
โฆษณา
STF11N65M2(045Y)
Datasheet
N-channel 650 V, 0.60 Ω typ., 7 A MDmesh M2 Power MOSFET in a TO-220FP narrow leads package
G(1)
1
2
3
TO-220FP narrow leads
D(2)
S(3)
NG1D2S3Z
Features
Order code
STF11N65M2(045Y)
V
DS
650 V
R
DS(on)
max.
0.68 Ω
• Extremely low gate charge
• Excellent output capacitance (C
OSS
) profile
• 100% avalanche tested
• Zener-protected
I
D
7 A
P
TOT
25 W
Applications
• Switching applications
Description
This device is an N-channel Power MOSFET developed using MDmesh M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters.
Product status link
STF11N65M2(045Y)
Product summary
Order code
Marking
Package
Packing
STF11N65M2(045Y)
11N65M2
TO-220FP narrow leads
Tube
DS10326 - Rev 3 - July 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STF11N65M2(045Y)
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
I
V
GS
D
Parameter
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
I
DM
P
TOT
Drain current (pulsed)
Total power dissipation at T
C
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
V
ISO
Insulation withstand voltage (RMS) from all three leads to external heat sink
(t = 1 s, T
C
= 25 °C)
Storage temperature range T stg
T
J
Operating junction temperature range
1. Limited by maximum junction temperature.
2. Pulse width limited by T
J
max.
3. I
SD
≤ 7 A, di/dt = 400 A/μs, V
DS
(peak) < V
(BR)DSS
, V
DD
= 400 V.
4. V
DS
≤ 520 V.
Symbol
R thj-case
R thj-amb
Table 2. Thermal data
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
E
AS
Table 3. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive (pulse width limited by T
J
max)
Single pulse avalanche energy (starting T
J
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
±25
7
4.4
28
25
15
50
2.5
-55 to 150
Unit
V
A
A
W
V/ns kV
°C
Value
5
62.5
Value
1.5
110
Unit
°C/W
Unit
A mJ
DS10326 - Rev 3 page 2/12
2
STF11N65M2(045Y)
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Table 4. Static
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
V
GS
= 0 V, V
DS
= 650 V
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 650 V, T
C
= 125 °C
Gate-body leakage current
Gate threshold voltage
V
DS
= 0 V, V
GS
= ±25 V
V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance V
GS
= 10 V, I
D
= 3.5 A
1. Defined by design, not subject to production test.
Min.
Typ.
Max.
Unit
650 V
1
µA
100
2
±10
3 4
0.60
0.68
µA
V
Ω
Table 5. Dynamic
Symbol
C iss
C oss
C rss
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
C oss eq.
Equivalent output capacitance
R
G
Q g
Intrinsic gate resistance
Total gate charge
Q gs
Q gd
Gate-source charge
Gate-drain charge
V
V
= 100 V, f = 1 MHz, V
= 0 to 520 V, V f = 1 MHz, I
V
DS
DS
DD
= 520 V, I
(see
D
Test conditions
= 0 A
D
GS
GS
= 0 V
= 7 A, V
GS
= 0 V
= 0 to 10 V
Figure 15. Test circuit for gate
Min.
-
-
-
-
-
-
-
-
Typ.
410
20
0.9
43
6.4
12.5
3.2
5.8
Max.
-
-
-
-
-
-
-
-
Unit pF pF
Ω nC
1. C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS
increases from 0 to 80% V
DSS
.
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 325 V, I
D
= 3.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 14. Test circuit for resistive load switching times
and
Figure 19. Switching time waveform )
Min.
Typ.
Max.
Unit
-
9.5
7.5
-
ns
-
26
15 -
-
DS10326 - Rev 3 page 3/12
STF11N65M2(045Y)
Electrical characteristics
Table 7. Source-drain diode
Symbol
I
SD
I
SDM
V
SD
t rr
Q rr
I
RRM
I t
Q rr rr
RRM
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
V
GS
SD
1. Pulse width is limited by safe operating area.
2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
= 0 V, I
Test conditions
SD
= 7 A
= 7 A, di/dt = 100 A/µs, V
DD
(see
= 60 V
Figure 16. Test circuit for inductive load switching and diode recovery times
I
SD
= 7 A, di/dt = 100 A/µs,
V
DD
= 60 V, T
J
= 150 °C
(see
Figure 16. Test circuit for inductive load switching and diode recovery times )
-
-
-
-
-
-
Min.
Typ.
Max.
Unit
7 A
28 A
1.6
318
2.5
15.5
437
3.2
V ns
µC
A ns
µC
15 A
DS10326 - Rev 3 page 4/12
STF11N65M2(045Y)
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
GIPG080915MQF1045YFSOA I
D
(A)
10 1
Operation in this area is limited by R
DS(on)
10 0
10 μs
100 μs
1 ms
10 ms
10 -1
10 -2
10 -1 10 0
T j
T c
≤ 150 °C
= 25 °C single pulse
10 1 10 2
V
DS
(V)
4
2
0
0
I
D
(A)
12
Figure 3. Output characteristics
GIPG110515MQF1LOCH
V
GS
= 8,9,10 V
V
GS
= 7 V
10
8
6
V
GS
= 6 V
4 8 12
V
GS
= 5 V
16 V
DS
(V)
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
10
V
DS
GIPG110515MQF1LQVG
V
DS
(V)
V
DD
= 520 V
I
D
= 7 A
600
500
8
6
4
400
300
2
0
0 2 4 6 8 10 12
200
100
Q
0 g
(nC)
K
Figure 2. Thermal impedance
GC20940
10 -1
10 -2
10 -3
10 -4 10 -3 10 -2 10 -1 10 0 t p
(s)
4
2
0
0
I
D
(A)
12
Figure 4. Transfer characteristics
GIPG110515MQF1LTCH
V
DS
= 19 V
10
8
6
2 4 6 8 V
GS
(V)
Figure 6. Static drain-source on-resistance
R
DS(on)
(Ω)
GIPG140815MQF1PRID
V
GS
= 10 V
0.624
0.608
0.592
0.576
0 2 4 6 I
D
(A)
DS10326 - Rev 3 page 5/12
STF11N65M2(045Y)
Electrical characteristics (curves)
C
(pF)
Figure 7. Capacitance variations
GIPG140815MQF1PCVR
10 3
C
ISS
10 2
C
OSS
10 1
10 0
10 -1
10 -1 10 0 f = 1 MHz
10 1 10 2
C
RSS
V
DS
(V)
Figure 9. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
GIPG110515MQF1LRON
V
GS
= 10 V
2.2
1.8
1.4
1.0
0.6
0.2
-75 -25 25 75 125 T j
(°C)
Figure 11. Output capacitance stored energy
E
OSS
(μJ)
GIPG110515MQF1LEOS
3
2
1
0
0 100 200 300 400 500 600 V
DS
(V)
Figure 8. Normalized gate threshold voltage vs temperature
V
GS(th)
(norm.)
GIPG110515MQF1LVTH
I
D
= 250 µA
1.1
1.0
0.9
0.8
0.7
0.6
-75 -25 25 75 125 T j
(°C)
Figure 10. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
GIPG110515MQF1LBDV
I
D
= 1 mA
1.08
1.04
1.00
0.96
0.92
0.88
-75 -25 25 75 125 T j
(°C)
Figure 12. Source- drain diode forward characteristics
V
SD
(V)
GIPG140815MQF1PSDF
T j
= -50 °C
1.0
T j
= 25 °C
0.8
T j
= 150 °C
0.6
0.4
0 2 4 6 I
SD
(A)
DS10326 - Rev 3 page 6/12
STF11N65M2(045Y)
Test circuits
3
Test circuits
Figure 13. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 14. Test circuit for gate charge behavior
12 V
V
GS pulse width
2200
μF
+
I
G
= CONST
2.7 kΩ
47 kΩ
1 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 16. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 17. Unclamped inductive waveform
V (BR)DSS
V D
I DM
I D
V DD V
DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF
V
DD
D.U.T.
AM01471v1
0
Figure 18. Switching time waveform t d(on) t on t r t d(off) t off t f
90% 90%
10%
V
GS
V
DS
90%
10%
0 10%
AM01473v1
DS10326 - Rev 3 page 7/12
4
4.1
STF11N65M2(045Y)
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
TO-220FP narrow leads package information
Figure 19. TO-220FP narrow leads package outline
TOP VIEW SIDE VIEW
DS10326 - Rev 3
8197858_3 page 8/12
DS10326 - Rev 3
Dim.
G
G1
H
L2
L3
L4
L5
L6
L7
Dia.
D
E
A
B
F
F1
STF11N65M2(045Y)
TO-220FP narrow leads package information
Table 8. TO-220FP narrow leads package mechanical data mm
Typ.
10.00
15.20
28.60
10.30
2.60
15.80
9.00
3.00
0.45
0.75
0.95
4.95
2.40
Min.
4.40
2.50
2.50
2.70
16.00
10.40
15.60
30.60
11.10
2.90
16.20
9.30
3.20
0.70
1.00
1.20
5.20
2.70
Max.
4.60
2.70
2.75
page 9/12
STF11N65M2(045Y)
Revision history
Date
09-May-2014
08-Sep-2015
05-Jul-2019
Table 9. Document revision history
Revision
1
2
3
Changes
First release.
Text and formatting changes throughout document.
On cover page:
- updated Title , Features and Description
- updated cover image silhouette
In section Electrical characteristics :
- updated and renamed table Static (was On /off states)
Updated section Electrical characteristics (curves)
Updated and renamed section Package information (was Package mechanical data)
Updated
Section 4.1 TO-220FP narrow leads package information .
Minor text changes.
DS10326 - Rev 3 page 10/12
STF11N65M2(045Y)
Contents
Contents
DS10326 - Rev 3 page 11/12
STF11N65M2(045Y)
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks . All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
DS10326 - Rev 3 page 12/12
ดาวน์โหลด
โฆษณา