STL13NM60N
*
6
6
3
N-channel 600 V, 0.320
Ω
typ., 10 A MDmesh™ II
Power MOSFET in a PowerFLAT™ 8x8 HV package
Datasheet
-
production data
Features
%RWWRPYLHZ
'
3RZHU)/$7[+9
Order code V
DS
@ T jmax
STL13NM60N 650 V
R
DS(on)
max.
0.385 Ω
• 100% avalanche tested
• Low input capacitance and gate charge
• Low gate input resistance
I
D
10 A
Applications
•
Switching applications
Figure 1. Internal schematic diagram
*
'
Description
This device is an N-channel Power MOSFET developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters.
6
!-V
Order code
STL13NM60N
Table 1. Device summary
Marking Packages
13NM60N PowerFLAT™ 8x8 HV
Packaging
Tape and reel
November 2013
This is information on a product in full production.
DocID018870 Rev 2 1/16 www.st.com
5
6
3
4
1
2
Contents
Contents
STL13NM60N
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16 DocID018870 Rev 2
STL13NM60N Electrical ratings
Symbol
Table 2. Absolute maximum ratings
Parameter Value
V
DS
V
GS
I
D
(1)
I
D
(1)
I
D
(2)
I
D
(2)
I
DM
(2),(3)
P
TOT (2)
P
TOT
(1)
I
E
AR
AS
Drain-source voltage
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (continuous) at T amb
= 25 °C
Drain current (continuous) at T amb
= 100 °C
Drain current (pulsed)
Total dissipation at T amb
= 25 °C
Total dissipation at T
C
= 25 °C
Avalanche current, repetitive or notrepetitive (pulse width limited by T j
max)
Single pulse avalanche energy
(starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Peak diode recovery voltage slope
600
± 30
10
6.5
1.9
1.1
7.6
3
90
3
93 dv/dt
(4)
15
T stg
T j
Storage temperature
Max. operating junction temperature
1.
The value is rated according to R thj-case
2.
When mounted on 1inch² FR-4 board, 2 oz Cu
3.
Pulse width limited by safe operating area
4.
I
SD
≤
10 A, di/dt
≤
400 A/µs, V
DSpeak
≤
V
(BR)DSS
, V
DD
= 80% V
(BR)DSS
- 55 to 150
150
Symbol
Table 3. Thermal data
Parameter
R thj-case
R thj-amb
(1)
Thermal resistance junction-case max
Thermal resistance junction-amb max
1.
When mounted on 1inch² FR-4 board, 2 oz Cu
Value
1.39
42
Unit
°C/W
°C/W mJ
V/ns
°C
°C
Unit
A
A
A
V
V
A
A
W
W
A
DocID018870 Rev 2 3/16
16
Electrical characteristics STL13NM60N
4/16
(T
C
= 25 °C unless otherwise specified)
Symbol Parameter
Table 4. On /off states
Test conditions
V
(BR)DSS
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Drain-source breakdown voltage
I
D
= 1 mA, V
GS
= 0
Zero gate voltage drain current (V
GS
= 0)
V
DS
= 600 V
V
DS
= 600 V, T
C
=125 °C
Gate-body leakage current (V
DS
= 0)
V
GS
= ± 25 V
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on-resistance
V
GS
= 10 V, I
D
= 5 A
Min.
Typ.
Max.
Unit
600
2
V
1 µA
100 µA
±100 nA
3 4 V
0.320
0.385
Ω
Symbol Parameter
Table 5. Dynamic
Test conditions Min.
Typ.
Max.
Unit
C iss
C oss
C rss
Input capacitance
Output capacitance
Reverse transfer capacitance
C oss eq.
(1)
Output equivalent capacitance
V
V
V
DS
GS
DS
= 50 V, f = 1 MHz,
= 0
= 0 to 480 V, V
GS
= 0 -
-
-
790
60
3.6
135 -
-
-
pF pF pF pF
R
G
Intrinsic gate resistance f = 1 MHz, I
D
=0 4.7
Ω
Q g
Q gs
Q gd
Total gate charge
Gate-source charge
Gate-drain charge
V
V
DD
GS
= 480 V, I
= 10 V
(see
Figure 14
D
)
= 10 A,
-
-
27
4
14 -
-
-
1.
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss increases from 0 to 80% V
DS
.
when V
DS nC nC nC
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
V
DD
= 300 V, I
D
= 5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 18
)
Min.
Typ.
Max Unit
-
-
-
3
8
30
10
-
-
-
ns ns ns ns
DocID018870 Rev 2
STL13NM60N Electrical characteristics
Symbol Parameter
Table 7. Source drain diode
Test conditions
I
SD
I
SDM
(1)
V
SD
(2) t rr
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
I
SD
= 10 A, V
GS
= 0
Q rr
I
RRM t
Q rr rr
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
I
SD
V
= 10 A, di/dt = 100 A/µs
DD
I
RRM
Reverse recovery current
1.
Pulse width limited by safe operating area.
2.
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
= 100 V (see Figure 15
I
SD
= 10 A, di/dt = 100 A/µs
V
DD
= 100 V, T j
= 150 °C
(see Figure 15
)
)
Min.
Typ.
Max.
Unit
-
-
-
-
-
-
-
-
-
340
2
18
290
190
17
10
40
1.6
A
A
V ns
µC
A ns
µC
A
DocID018870 Rev 2 5/16
16
Electrical characteristics STL13NM60N
2.1 Electrical characteristics (curves)
)
'
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Figure 2. Safe operating area
7M &
7F &
6LQJOH
SXOVH
$0Y
K
Figure 3. Thermal impedance
Zth PowerFLAT 8x8 HV d =0.5
0.2
'6RQ
PV
PV
10
-1
0.1
0.02
0.05
case
2SHUDWLRQLQWKLVDUHDLV
/LPLWHGE\PD[5
0.01
PV
Single pulse
PV
9
'6
9
Figure 4. Output characteristics
$0Y
)
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9
*6
9
9
10
-2
10
-5
10
-4
10
-3
10
-2 t p
(s)
)
'
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Figure 5. Transfer characteristics
$0Y
9 9
'6
9
9
9 '6 9 9 *6 9
Figure 6. Normalized V
DS
vs temperature
AM09028v1
V
DS
(norm)
1.10
I
D
=1mA
Figure 7. Static drain-source on-resistance
R
DS(on)
(
Ω
)
0.335
V
GS
=10V
AM09779v1
1.08
0.330
1.06
0.325
1.04
1.02
0.320
1.00
0.315
0.98
0.96
0.310
0.305
0.94
0.92
-50 -25 0 25 50 75 100 T
J
(°C)
0.300
0 1 2 3 4 5 6 7 8 9 10 I
D
(A)
6/16 DocID018870 Rev 2
STL13NM60N
Figure 8. Gate charge vs gate-source voltage
6 *6
9
9 '6
$0Y
9 '6
9
9 '' 9
,
'
$
Electrical characteristics
Figure 9. Capacitance variations
#
S)
$0Y
&LVV
&RVV
&UVV
4 J Q&
Figure 10. Normalized gate threshold voltage vs temperature
9 *6WK
QRUP
$0Y
9 '6 9
Figure 11. Normalized on resistance vs temperature
$0Y
2 '6RQ
QRUP
9 9
*6
, $
7 & 7 &
Figure 12. Source-drain diode forward characteristics
$0Y
6 6'
9
7
-
&
7
-
&
7 &
, 6' $
DocID018870 Rev 2 7/16
16
Test circuits
3 Test circuits
STL13NM60N
Figure 13. Switching times test circuit for resistive load
Figure 14. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
GS
V
D
R
G
R
L
D.U.T.
2200
μ
F
3.3
μ
F
V
DD
V i
=20V=V
GMAX
2200
μ F
I
G
=CONST
2.7k
Ω
100 Ω
D.U.T.
V
G
P
W
AM01468v1
Figure 15. Test circuit for inductive load switching and diode recovery times
47k
Ω
P
W
1k
Ω
AM01469v1
Figure 16. Unclamped inductive load test circuit
25 Ω
G
D
A
D.U.T.
S
B
R
G
A
FAST
DIODE
A
B
B
G
D
S
L=100 μ H
3.3
μ F
1000
μ F
V
DD
V i
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)DSS
V
D
V
D
I
D
L
2200
μ F
3.3
μ F
V
DD
D.U.T.
P w
AM01471v1
Figure 18. Switching time waveform t on td on t r t off td off t f
I
DM
90%
90%
10%
I
D 0
10% V
DS
V
DD
V
DD
90%
V
GS
AM01472v1
0
10%
AM01473v1
8/16 DocID018870 Rev 2
STL13NM60N
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
DocID018870 Rev 2 9/16
16
Package mechanical data STL13NM60N
Dim.
E
D2
E2 e
L
A
A1 b
D
Table 8. PowerFLAT™ 8x8 HV mechanical data mm
Min.
0.80
0.00
0.95
7.05
4.15
0.40
Typ.
8.00
7.20
4.30
2.00
0.50
0.90
0.02
1.00
8.00
Max.
1.00
0.05
1.05
7.30
4.40
0.60
10/16 DocID018870 Rev 2
STL13NM60N Package mechanical data
Figure 19. PowerFLAT™ 8x8 HV drawing mechanical data
DocID018870 Rev 2
8222871_REV_C
11/16
16
Package mechanical data STL13NM60N
Figure 20. PowerFLAT™ 8x8 HV recommended footprint (dimensions in mm.)
8222871_REV_C_footprint
12/16 DocID018870 Rev 2
STL13NM60N
5 Packaging mechanical data
Packaging mechanical data
Figure 21. PowerFLAT™ 8x8 HV tape
P2 (2.0±0.1) P0 (4.0±0.1)
D0 ( 1.55±0.05) T (0.30±0.05)
E (1.75±0.1)
D1 ( 1.5 Min)
P1 (12.00±0.1) A0 (8.30±0.1)
K0 (1.10±0.1)
Note: Base and Bulk quantity 3000 pcs
8229819_Tape_revA
Figure 22. PowerFLAT™ 8x8 HV package orientation in carrier tape.
DocID018870 Rev 2 13/16
16
Packaging mechanical data
Figure 23. PowerFLAT™ 8x8 HV reel
STL13NM60N
8229819_Reel_revA
14/16 DocID018870 Rev 2
STL13NM60N Revision history
Date
23-May-2011
19-Nov-2013
Revision
Table 9. Document revision history
Changes
1
2
First release.
– Modified: Q g
, Q gd
values, the entire typical values and I
D
in Table 6
– Modified:
Figure 3 , 6
,
8
,
9
– Updated:
Section 4: Package mechanical data
– Added: Section 5: Packaging mechanical data
– Minor text changes
DocID018870 Rev 2 15/16
16
STL13NM60N
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