STD60NF55LA
N-channel 55 V, 0.012 Ω , 60 A DPAK
STripFET™ II Power MOSFET
Features
Order code
STD60NF55LA
V
DSS
55V
■ Low threshold drive
R
DS(on)
<0.015
Ω
I
D
60A
Applications
■
■
Switching application
Automotive
Description
This Power MOSFET has been developed using
STMicroelectronics’ unique STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements.
DPAK
1
3
Figure 1.
Internal schematic diagram
$
'
3
Table 1.
Device summary
Order code
STD60NF55LA
Marking
D60NF55LA
Package
DPAK
!-V
Packaging
Tape and reel
October 2011 ID 11226 Rev 3 1/16 www.st.com
16
5
6
3
4
1
2
Contents
Contents
STD60NF55LA
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/16 ID 11226 Rev 3
STD60NF55LA Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P tot
Drain-source voltage
Gate- source voltage
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
C
C
= 25 °C
= 100 °C
Total dissipation at T
C
= 25 °C
Derating factor dv/dt
(2)
E
AS
(3)
T stg
Peak diode recovery voltage slop
Single pulse avalanche energy
Storage temperature e
T j
Max. operating junction temperature
1.
Pulse width limited by safe operating area.
2.
I
SD
≤
40A, di/dt
≤
350A/µs, V
DD
V(
BR)DSS
, Tj
≤
JMAX
.
3.
Starting T j
= 25 °C, I
D
= 17.5 A, V
DD
=24 V
Table 3.
Symbol
R thj-case
R thj-amb
Thermal data
Parameter
Thermal resistance junction-case max
Thermal resistance junction-to ambient max
Value
55
± 15
60
42
240
110
0.73
16
400
-55 to 175
Unit
V
V
A
A
A
W
W/°C
V/ns mJ
°C
Value
1.36
100
Unit
°C/W
°C/W
ID 11226 Rev 3 3/16
Electrical characteristics STD60NF55LA
(T
CASE
=25°C unless otherwise specified)
Table 4.
Symbol
On/off states
Parameter
V
(BR)DSS
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Drain-source breakdown voltage
Zero gate voltage drain current (V
GS
= 0)
Gate-body leakage current (V
DS
= 0)
Gate threshold voltage
Static drain-source on resistance
I
D(on)
On state drain current
Test conditions
I
D
= 250 µA, V
GS
=0
V
DS
= 55 V
V
DS
= 55 V, T
C
=125 °C
V
GS
= ± 15 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 30 A
V
GS
= 5 V, I
D
= 30 A
V
GS
= 3.5 V, V
DS
>12 V
-55 °C < Tj < 150 °C
Min.
Typ.
Max.
Unit
55
1
35
1
10
±100
0.012
0.014
2
0.015
0.017
V
µA
µA nA
V
Ω
Ω
A
Table 5.
Symbol
Dynamic
Parameter Test conditions g fs
C
C
C
(1) iss oss rss
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer capacitance
V
V
V
DS
DS
GS
= 10 V, I
= 25 V, f = 1 MHz,
= 0
D
= 30 A t d(on) t r t d(off) t f
Q g
Q gs
Q gd
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
R
G
(see
V
DD
V
GS
= 25 V, I
D
= 4.7 Ω V
GS
= 4.5 V
Figure 14
= 40 V, I
D
= 5 V, R
(see
1.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
G
Figure 15
= 30 A
)
= 60 A,
)
= 4.7
Ω
Min.
Typ.
Max.
Unit
35 S
-
-
-
1950
390
130
30
180
80
35
40
10
20
56 pF pF pF nC nC nC ns ns ns ns
4/16 ID 11226 Rev 3
STD60NF55LA Electrical characteristics
Table 6.
Symbol
Source drain diode
Parameter Test conditions
I
I
SD
I
SDM
V
SD t
Q rr rr
(1)
(2)
RRM
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 60 A, V
GS
= 0
I
SD
= 40 A, di/dt = 100 A/µs,
V
DD
= 25 V, T j
= 150 °C
(see Figure 16
)
1.
Pulse width limited by safe operating area.
2.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Min.
Typ.
Max.
Unit
-
-
60
240
1.3
-
65
130
4
A
A
V ns nC
A
ID 11226 Rev 3 5/16
Electrical characteristics
Figure 2.
Safe operating area Figure 3.
Thermal impedance
STD60NF55LA
Figure 4.
Output characterisics Figure 5.
Transfer characteristics
Figure 6.
Transconductance Figure 7.
Static drain-source on resistance
6/16 ID 11226 Rev 3
STD60NF55LA Electrical characteristics
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
Figure 10. Normalized gate threshold voltage vs temperature
Figure 11. Normalized on resistance vs temperature
Figure 12. Source-drain diode forward characteristics
ID 11226 Rev 3 7/16
Electrical characteristics
Figure 13. Allowable I
AV
vs time in avalanche
STD60NF55LA
The previous curve gives the safe operating area for unclamped inductive loads, single pulse or repetitive, under the following conditions:
P
D(AVE)
= 0.5* (1.3*BV
DSS
*I
AV
)
E
AS(AR)
= P
D(AVE)
*t
AV
Where:
I
AV
is the allowable current in avalanche,
P
D(AVE)
is the average power dissipation in avalanche (single pulse) t
AV
is the time in avalanche.
To derate above 25°C, at fixed I
AV
, the following equation must be applied:
I
AV
=2*(T jmax
-T
CASE
) / (1.3*BV
DSS
*Z th
)
Where:
Z th
= K*R th to T
AV
is the value coming from normalized thermal response at fixed pulse width equal
8/16 ID 11226 Rev 3
STD60NF55LA
3 Test circuit
Test circuit
Figure 14. Switching times test circuit for resistive load
Figure 15. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
G S
V
D
R
G
R
L
D.U.T.
2200
μ
F
3 .
3
μ
F
V
DD
V i
=20V=V
GMAX
2200
μ F
I
G
=CON S T
2.7k
Ω
100
Ω
D.U.T.
V
G
P
W
47k
Ω
P
W
1k
Ω
AM0146 8 v1 AM01469v1
Figure 16. Test circuit for inductive load switching and diode recovery times
Figure 17. Unclamped Inductive load test circuit
25 Ω
G
A
D
D.U.T.
S
B
R
G
A
FA S T
DIODE
A
B
B
G
D
S
L=100 μ H
3 .
3
μ F
1000
μ F
V
DD
V i
V
D
I
D
L
D.U.T.
2200
μ F
3 .
3
μ F
V
DD
P w
AM01470v1
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform
V
D
V
(BR)D SS t on td on t r t off td off t f
AM01471v1
I
DM
90 %
90 %
10 %
I
D 0
10 % V
D S
V
DD
V
DD
90 %
V
G S
AM01472v1
0
10 %
AM0147 3 v1
ID 11226 Rev 3 9/16
Package mechanical data
4 Package mechanical data
STD60NF55LA
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
10/16 ID 11226 Rev 3
STD60NF55LA
H
L
L1
L2
L4
D1
E
E1 e e1
R
V2 b4 c c2
D
A
A1
A2 b
Table 7.
Dim.
DPAK (TO-252) mechanical data
Min.
5.20
0.45
0.48
6.00
2.20
0.90
0.03
0.64
6.40
4.40
9.35
1
0.60
0° mm
Typ.
5.10
4.70
2.28
2.80
0.80
0.20
Package mechanical data
Max.
5.40
0.60
0.60
6.20
2.40
1.10
0.23
0.90
6.60
4.60
10.10
1.50
1
8°
ID 11226 Rev 3 11/16
Package mechanical data
Figure 20.
DPAK (TO-252) drawing
STD60NF55LA
006 8 772_H
Figure 21.
DPAK footprint
(a)
6.7
1.
8 3
1.6
6.7
1.6
2.
3
2.
3
AM0 88 50v1
12/16 a.
All dimension are in millimeters
ID 11226 Rev 3
STD60NF55LA
5 Packing mechanical data
Packing mechanical data
D
D1
E
F
K0
P0
P1
P2
A0
B0
B1
R
T
W
Table 8.
Dim.
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
DPAK (TO-252) tape and reel mechanical data
Tape mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
N
T
D
G
A
B
C
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
Reel mm
Max.
330
13.2
18.4
22.4
2500
2500
ID 11226 Rev 3 13/16
Packing mechanical data
Figure 22.
Tape for DPAK (TO-252)
T
Top cover t a pe
10 pitche s c u m u l a tive toler a nce on t a pe +/- 0.2 mm
P0 D P2
B1
K0
For m a chine ref. only incl u ding dr a ft a nd r a dii concentric a ro u nd B0
B0
A0 P1
U s er direction of feed
D1
STD60NF55LA
F
E
W
R
14/16
U s er direction of feed
Figure 23.
Reel for DPAK (TO-252)
REEL DIMEN S ION S
40mm min.
Acce ss hole
At s l ot loc a tion
B
D
C
A
Bending r a di us
AM0 88 52v1
T
N
F u ll r a di us
ID 11226 Rev 3
T a pe s lot in core for t a pe s t a rt 25 mm min.
width
G me asu red a t h ub
AM0 88 51v2
STD60NF55LA
Table 9.
Date
Revision history
Revision
11-May-2005
31-Jan-2006
1
2
05-Oct-2011 3
Changes
First release
New template
Section : Applications
has been modified
Minor text changes
Revision history
ID 11226 Rev 3 15/16
STD60NF55LA
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16/16 ID 11226 Rev 3
