STD25NF10LA
N-channel 100 V, 0.030 Ω , 25 A DPAK
STripFET™ II Power MOSFET
Features
Order code
STD25NF10LA
V
DSS
100 V
■
■
■
Exceptional dv/dt capability
100% avalanche tested
Logic level device
R
DS(on) max
< 0.035 Ω
I
D
25 A
Applications
■
■
Switching application
Automotive
Description
This Power MOSFET has been developed using
STMicroelectronics’ unique STripFET process, which is specifically designed to minimize input capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate charge driving requirements.
G(1)
TAB
1
DPAK
3
Figure 1.
Internal schematic diagram
D(TAB)
Table 1.
Device summary
Order code
STD25NF10LA
Marking
D25NF10LA
Package
DPAK
S ( 3 )
AM09016v1
Packaging
Tape and reel
October 2011 Doc ID 022319 Rev 1 1/15 www.st.com
15
5
6
3
4
1
2
Contents
Contents
STD25NF10LA
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/15 Doc ID 022319 Rev 1
STD25NF10LA Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
(1)
I
D
I
DM
(2)
P tot
Drain-source voltage
Gate- source voltage
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
C
C
= 25 °C
= 100 °C
Total dissipation at T
C
= 25 °C
Derating Factor dv/dt
(3)
E
AS
(4)
T stg
Peak diode recovery avalanche energy
Single pulse avalanche energy
Storage temperature
T j
Max. operating junction temperature
1.
Current limited by package
2.
Pulse width limited by safe operating area.
3.
I
SD
≤
25 A, di/dt
≤
300 A/µs, V
DD
=V
(BR)DSS
, T
J
≤
JMAX
4.
Starting T j
= 25 °C, I
D
= 12.5 A V
DD
= 50 V
Table 3.
Symbol
Thermal data
Parameter
Rthj-case Thermal resistance junction-case max
Rthj-pcb Thermal resistance junction-pcb max
(1)
1.
When Mounted on 1 inch2 FR-4 board, 2 oz. of Cu.
Value
100
± 16
25
21
100
100
0.67
20
450
-55 to 175
Value
1.5
50
Unit
°C/W
°C/W
Unit
V
V
A
A
A
W
W/°C
V/ns mJ
°C
Doc ID 022319 Rev 1 3/15
Electrical characteristics STD25NF10LA
(T
CASE
=25°C unless otherwise specified)
Table 4.
Symbol
On/off states
Parameter Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
R
I
I
DSS
GSS
GS(th)
DS(on)
I
D
= 250 µA, V
GS
=0
Zero gate voltage drain current
V
DS
= 100 V
V
DS
= 100 V, T
C
= 125 °C
V
GS
=0
Gate-body leakage current
V
GS
= ± 16 V, V
DS
= 0
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
Static drain-source on resistance
V
GS
= 10 V, I
D
= 12.5 A
V
GS
= 4.5 V, I
D
= 12.5 A
Min.
Typ.
Max.
Unit
100 V
1
10
µA
µA
1
±100
0.030
0.035
2.5
0.035
0.040
nA
V
Ω
Ω
Table 5.
Symbol
C iss
C oss
C rss t d(on) t r t d(off) t f
Q g
Q gs
Q gd
Dynamic
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0
V
DD
= 50 V, I
D
= 12.5 A
R
G
= 4.7 Ω V
GS
= 5 V
(see
Figure 13 )
V
DD
= 80 V, I
D
= 25 A,
V
GS
= 5 V, R
G
= 4.7 Ω
(see
Figure 14 )
Min.
Typ.
Max.
Unit
-
-
-
1710
250
110
20
40
58
20
38
8.5
21
52 pF pF pF nC nC nC ns ns ns ns
4/15 Doc ID 022319 Rev 1
STD25NF10LA Electrical characteristics
Table 6.
Symbol
Source drain diode
Parameter Test conditions
I
I
SD
(1)
SDM
V
SD
(2) t rr
Q rr
I
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 25 A, V
GS
= 0
I
SD
= 25 A, di/dt = 100 A/µs,
V
DD
= 50 V, T j
= 150 °C
(see Figure 15
)
1.
Pulse width limited by safe operating area.
2.
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Min.
Typ.
Max.
Unit
-
-
-
88
317
7.2
25
100
1.5
A
A
V ns nC
A
Doc ID 022319 Rev 1 5/15
Electrical characteristics
Figure 2.
Safe operating area Figure 3.
Thermal impedance
STD25NF10LA
Figure 4.
Output characteristics Figure 5.
Transfer characteristics
Figure 6.
Normalized breakdown voltage vs. temperature
Figure 7.
Static drain-source on resistance
6/15 Doc ID 022319 Rev 1
STD25NF10LA Electrical characteristics
Figure 8.
Gate charge vs. gate-source voltage Figure 9.
Capacitance variations
Figure 10. Normalized gate threshold voltage vs. temperature
Figure 11. Normalized on resistance vs. temperature
Figure 12. Source-drain diode forward characteristics
Doc ID 022319 Rev 1 7/15
Test circuit
3 Test circuit
STD25NF10LA
Figure 13. Switching times test circuit for resistive load
Figure 14. Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
G S
V
D
R
G
R
L
D.U.T.
2200
μ
F
3 .
3
μ
F
V
DD
V i
=20V=V
GMAX
2200
μ F
I
G
=CON S T
2.7k
Ω
100
Ω
D.U.T.
V
G
P
W
47k
Ω
P
W
1k
Ω
AM0146 8 v1 AM01469v1
Figure 15. Test circuit for inductive load switching and diode recovery times
Figure 16. Unclamped Inductive load test circuit
25 Ω
G
A
D
D.U.T.
S
B
R
G
A
FA S T
DIODE
A
B
B
G
D
S
L=100 μ H
3 .
3
μ F
1000
μ F
V
DD
V i
V
D
I
D
L
D.U.T.
2200
μ F
3 .
3
μ F
V
DD
P w
AM01470v1
Figure 17. Unclamped inductive waveform
V
(BR)D SS
V
D
Figure 18. Switching time waveform t on t off t r td on td off t f
AM01471v1
I
DM
90 %
90 %
10 %
I
D 0
10 % V
D S
V
DD
V
DD
90 %
V
G S
AM01472v1
0
10 %
AM0147 3 v1
8/15 Doc ID 022319 Rev 1
STD25NF10LA
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
Doc ID 022319 Rev 1 9/15
Package mechanical data
H
L
L1
L2
L4
D1
E
E1 e e1
R
V2 b4 c c2
D
A
A1
A2 b
Table 7.
Dim.
DPAK (TO-252) mechanical data
Min.
5.20
0.45
0.48
6.00
2.20
0.90
0.03
0.64
6.40
4.40
9.35
1
0.60
0° mm
Typ.
5.10
4.70
2.28
2.80
0.80
0.20
STD25NF10LA
4.60
10.10
1.50
1
8°
Max.
5.40
0.60
0.60
6.20
2.40
1.10
0.23
0.90
6.60
10/15 Doc ID 022319 Rev 1
STD25NF10LA
Figure 19.
DPAK (TO-252) drawing
Package mechanical data
006 8 772_H
Figure 20.
DPAK footprint
(a)
6.7
1.
8 3
1.6
6.7
1.6
2.
3
2.
3
AM0 88 50v1 a.
All dimensions are in millimeters
Doc ID 022319 Rev 1 11/15
Packing mechanical data
5 Packing mechanical data
STD25NF10LA
D
D1
E
F
K0
P0
P1
P2
A0
B0
B1
R
T
W
Table 8.
Dim.
1.5
1.5
1.65
7.4
2.55
3.9
7.9
1.9
40
0.25
15.7
DPAK (TO-252) tape and reel mechanical data
Tape mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
N
T
D
G
A
B
C
Min.
1.5
12.8
20.2
16.4
50 1.85
7.6
2.75
4.1
8.1
2.1
0.35
16.3
Base qty.
Bulk qty.
Reel mm
Max.
330
13.2
18.4
22.4
2500
2500
12/15 Doc ID 022319 Rev 1
STD25NF10LA
Figure 21.
Tape for DPAK (TO-252)
T
Top cover t a pe
10 pitche s c u m u l a tive toler a nce on t a pe +/- 0.2 mm
P0 D P2
Packing mechanical data
K0
F
E
W
B1
B0
For m a chine ref. only incl u ding dr a ft a nd r a dii concentric a ro u nd B0
A0 P1
U s er direction of feed
D1
R
U s er direction of feed
Figure 22.
Reel for DPAK (TO-252)
REEL DIMEN S ION S
40mm min.
Acce ss hole
At s l ot loc a tion
B
D
C
A
Bending r a di us
AM0 88 52v1
T
N
F u ll r a di us
Doc ID 022319 Rev 1
T a pe s lot in core for t a pe s t a rt 25 mm min.
width
G me asu red a t h ub
AM0 88 51v2
13/15
Revision history
Table 9.
Date
Revision history
Revision
05-Oct-2011 1 First release.
Changes
STD25NF10LA
14/15 Doc ID 022319 Rev 1
STD25NF10LA
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Doc ID 022319 Rev 1 15/15
