ST2129
2-bit dual supply level translator without direction control pin
Features
■
■
■
■
■
■
■
■
42 MHz: 84 Mbps (max) data rate at
V
L
= 1.8 V, V
CC
= 3.3 V
Bidirectional level translation without direction control pin
Wide voltage range (V
CC
≥ V
L
):
– V
L
ranges from 1.65 to 3.6 V
– V
CC
ranges from 1.65 to 5.5 V
Power down mode feature - when V
CC is off, all I/Os are in high impedance
supply
Totem-pole driving
5.5 V tolerant enable pin
ESD performance on all pins : ±2 kv HBM
Small package and footprint:
QFN10 (1.8 x 1.4 mm)
Applications
■
■
Low voltage system level translation
Mobile phones and other mobile devices
Table 1.
Device summary
Order Code
ST2129QTR
QFN10
(1.8 x 1.4 mm)
Description
The ST2129 is a 2-bit dual supply level translator which provides the level shifting capability to allow data transfer in a multi-voltage system. Externally applied voltages, V
CC
and V
L
, set the logic levels on either side of the device. Its architecture allows bidirectional level translation without a control pin.
The ST2129 accepts V
V
CC
L
from 1.65 to 3.6 V and
from 1.65 to 5.5 V, making it ideal for data transfer between low-voltage ASICs/PLD and higher voltage systems. This device has a tri-state output mode which can be used to disable all
I/Os.
The ST2129 supports power-down mode when
V
CC
is grounded/floating or when the device is disabled via the OE pin.
Package
QFN10 (1.8 x 1.4 mm)
Packaging
Tape & reel (3000 parts per reel)
September 2009 Doc ID 15967 Rev 1 1/20 www.st.com
20
Pin settings
Figure 1.
Pin connection (top through view)
V
L
V
CC
10 9
1 I/O
VL1
I/O
VL2
2
8
7
OE 3
4 5
6
I/O
VCC1
I/O
VCC2
GND
NC NC
CS00011
Table 2.
Pin description
Pin number Symbol
6
7
4
5
1
2
3
8
9
10
I/O
VL1
I/O
VL2
OE
NC
NC
GND
I/O
VCC2
I/O
VCC1
V
CC
V
L
Name and function
Data input/output
Data input/output
Output enable
No connection
No connection
Ground
Data input/output
Data input/output
Supply voltage
Supply voltage
ST2129
2/20 Doc ID 15967 Rev 1
ST2129
Figure 2.
Logic block diagram
Logic diagram
2.1 Device block diagrams
Figure 3.
ST2129 block diagram
Doc ID 15967 Rev 1 3/20
Logic diagram
Figure 4.
Application block diagram
V
L
0.1
μ
F system controller
V
L
V
CC
I/O
VL1
I/O
VL2
OE
I/O
VCC1
I/O
VCC2
ST2129
0.1
μ
F
1 μ
F
V
CC
V
CC system controller
AM0070 8 V2
4/20 Doc ID 15967 Rev 1
ST2129 Supplementary notes
3.2
3.3
For proper operation, the driver from each side of the device must have the capability to source and sink a minimum of 1mA current. The device architecture requires the driver to source/sink a maximum current of (V
CC
/4) mA to/from the weak 4 k Ω output buffer.
Load driving capability
To support the architecture that allows level translation without direction pin, the one-shot transistor is turned on only during state transition at the output side. After the one-shot transistor is turned off, only the 4 k
Ω
resistor maintains the state. So, resistive load or pull-up resistor less than 50 k
Ω
is not recommended for a proper operation.
Power off feature
In some applications, where it might be required to turn off one of the power supplies powering up the level translator, the device is automatically disabled when V
CC
supply is turned off, even if the OE pin is set to HIGH (enabled). In this mode, all I/Os are in high impedance state.
Table 3.
Truth table
Enable
OE
H
(1)
H
(1)
L
(1) High level V
L
power supply referred.
(2) High level V
CC
power supply referred.
(3) Z = High impedance.
I/O
VCC
H
(2)
L
Z
(3)
Bidirectional Input/Output
I/O
VL
H
(1)
L
Z
(3)
Doc ID 15967 Rev 1 5/20
Maximum ratings ST2129
4.1
Stressing the device above the rating listed in
Table 4 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 4.
Symbol
V
L
V
CC
V
OE
V
I/OVL
V
I/OVCC
I
IK
I
I/OVL
I
I/OVCC
I
SCTOUT
P
D
T
STG
T
L
ESD
Absolute maximum ratings
Parameter
Supply voltage
Supply voltage
DC control input voltage
DC I/O
VL
input voltage (OE = GND or V
L
)
DC I/O
VCC
input voltage (OE = GND or V
L
)
DC input diode current
DC output current
DC output current
Short circuit duration, continuous
Power dissipation
(1)
Storage temperature
Lead temperature (10 seconds)
Electrostatic discharge protection (HBM)
Value
-0.3 to 4.6
-0.3 to 6.5
-0.3 to 6.5
-0.3 to V
L
+ 0.3
-0.3 to V
CC
+ 0.3
-20
±25
±258
40
500
-65 to 150
300
±2
Unit mA mA mA mA mW
°
C
°
C kV
V
V
V
V
V
Recommended operating conditions
Table 5.
Symbol
Recommended operating conditions
Parameter
V
L
V
CC
Supply voltage
Supply voltage
V
OE
Input voltage (OE output enable pin, V
L
power supply referred)
V
I/OVL
I/O
VL
voltage
V
I/OVCC
T
OP
I/O
VCC
voltage
Operating temperature dt/dV Input rise and fall time
Min.
1.65
1.65
0
0
0
-40
0
–
–
–
–
–
Typ.
–
–
Max.
3.6
5.5
3.6
V
L
V
CC
85
1
Unit
V
V
V
V
V
°
C ns/V
6/20 Doc ID 15967 Rev 1
ST2129 Electrical characteristics
Table 6.
Symbol Parameter
V
IHL
V
ILL
V
IHC
V
ILC
Over recommended operating conditions unless otherwise noted. All typical values are at
T
A
= 25 °C.
DC characteristics
High level input voltage (I/O
VL
)
Low level input voltage (I/O
VL
)
V
L
1.65
1.8
2.5
3.0
3.6
1.65
1.8
2.5
3.0
3.6
High level input voltage
(I/O
VCC
)
1.65 to
3.6
Low level input voltage
(I/O
VCC
)
1.65 to
3.6
V
CC
1.65 to
5.5
1.65 to
5.5
2.5
3.0
3.6
4.3
5.5
1.65
1.8
2.5
3.0
3.6
4.3
5.5
1.65
1.8
Test conditions
Value
Min
T
A
= 25
°
C
Typ Max
–
–
–
–
–
2.10
2.52
3.01
3.85
–
–
–
–
–
1.16
1.26
1.75
1.16
1.26
1.75
2.10
2.52
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0.75
0.90
1.08
1.29
1.65
–
–
–
–
0.50
0.54
0.75
0.90
1.08
–
–
–
–
–
–
–
–
0.50
0.54
-40 to 85
°
C Unit
V
V
V
V
Min
–
–
–
–
–
2.10
2.52
3.01
3.85
–
–
–
–
–
1.16
1.26
1.75
1.16
1.26
1.75
2.10
2.52
–
–
Max
0.75
0.90
1.08
1.29
1.65
–
–
–
–
0.50
0.54
0.75
0.90
1.08
–
–
–
–
–
–
–
–
0.50
0.54
Doc ID 15967 Rev 1 7/20
Electrical characteristics ST2129
Table 6.
DC characteristics (continued)
Symbol
V
V
IH-OE
IL-OE
Parameter
High level input voltage (OE)
Low level input voltage (OE)
V
L
1.65
1.8
2.5
3.0
3.6
1.65
1.8
2.5
3.0
3.6
V
CC
1.65 to
5.5
1.65 to
5.5
Test conditions
Value
Min
T
A
= 25
°
C
Typ Max
1.16
1.26
1.75
2.10
2.52
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0.50
0.54
–
–
–
0.75
0.90
1.08
V
V
V
OHC
V
OHL
OLL
OLC
High level output voltage
(I/O
VL
)
Low level output voltage
(I/O
VL
)
High level output voltage
(I/O
VCC
)
Low level output voltage
(I/O
VCC
)
1.65 to
3.6
1.65 to
5.5
IO = -60µA V
L
- 0.4
–
1.65 to
3.6
1.65 to
5.5
IO = +60µA
1.65 to
3.6
1.65 to
5.5
IO = -60µA
1.65 to
3.6
1.65 to
5.5
IO = +60µA
V
–
CC
0.4
–
-
–
–
–
–
0.4
–
0.4
V
L
- 0.4
V
–
CC
0.4
–
-
-40 to 85
°
C
Min
1.16
1.26
1.75
2.10
2.52
–
–
–
–
–
Max
–
–
0.50
0.54
–
–
–
0.75
0.90
1.08
–
0.4
–
0.4
Unit
V
V
V
V
V
V
8/20 Doc ID 15967 Rev 1
ST2129 Electrical characteristics
Table 7.
DC characteristics
Symbol Parameter V
L
V
CC
Test conditions
Value
Min
T
A
= 25
°
C
Typ Max
-40 to 85
°
C
Min Max
Unit
I
OE
Control input leakage current (OE)
I
IO_LKG
High impedance leakage current (I/O
VL
,
I/O
VCC
)
I
I
QVCC
I
OFF
QVL
Partial power down current
Quiescent supply current
V
CC
Quiescent supply current
V
L
1.65 to
3.6
1.65 to
3.6
1.65 to
3.6
1.65 to
3.6
1.65 to
3.6
1.65 to
3.6
I
Z-VCC
I
Z-VL
High
Impedance quiescent supply current
V
CC
High impedance quiescent supply current
V
L
1.65 to
3.6
1.65 to
3.6
1.65 to
3.6
1.65 to
5.5
V
I
= GND or
V
L
1.65 to
5.5
0
OE = GND
I/O
VL
= High
I/O
VCC
= Low
OE = GND
I/O
VL
= Low
I/O
VCC
= High
OE = V
L
or
GND
I/O
VL
= High
I/O
VCC
= Low
OE = V
L
or
GND
I/O
VL
= Low
I/O
VCC
= High
1.65 to
5.5
OE = V
L
I/O = Hi-Z
1.65 to
5.5
OE = V
L
I/O = Hi-Z
0
1.65 to
5.5
1.65 to
5.5
0
OE = GND
I/O = Hi-Z
OE = GND
I/O = Hi-Z
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0.1
0.1
0.1
0.1
0.1
3.5
0.1
0.1
0.1
0.1
0.1
–
–
–
–
–
–
–
–
–
–
–
1
1
1
1
1
4.5
1
1
1
1
1
µA
µA
µA
µA
µA
µA
µA
µA
Doc ID 15967 Rev 1 9/20
AC characteristics ST2129
Load C
L
= 15 pF; driver t r
= t f
≤ 2 ns over temperature range -40 °C to 85 °C.
Table 8.
Symbol
AC characteristics - test conditions: V
L
= 1.65 – 1.95 V
V
CC
= 1.65 –
1.95 V
Parameter
V
CC
= 2.3 –
2.7 V
V
CC
= 3.0 –
3.6 V
V
CC
= 4.5 –
5.5 V
Min Max Min Max Min Max Min Max
Unit t
RVCC t
FVCC t
RVL t
FVL
Rise time I/O
VCC
Fall time I/O
VCC
Rise time I/O
VL
Fall time I/O
VL t
I/OVL-VCC
Propagation delay time
I/O
VL-LH to I/O
VCC-LH
I/O
VL-HL to I/O
VCC-HL t
I/OVCC-VL
Propagation delay time
I/O
VCC-LH to I/O
VL-LH
I/O
VCC-HL to I/O
VL-HL
Output enable time t
PZL
t
PZH t
PLZ
t
PHZ
D
R
Output disable time
Data rate
(1) t t t t
PLH
PHL
PLH
PHL
–
–
–
–
–
–
–
–
–
–
41
5.0
1.5
2.8
1.5
6.6
4.1
4.9
4.6
27
145
–
–
–
–
–
–
–
–
–
–
–
66
3.2
1.4
2.7
1.4
5.8
3.8
4.4
4.2
27
145
–
–
–
–
–
–
–
–
–
–
–
84
2.4
1.3
2.6
1.4
5.0
3.6
4.1
4.0
27
145
–
–
–
–
–
–
–
–
–
–
–
86
1.4
1.2
2.6
1.3
4.4
3.4
4.4
3.6
27
145
– ns ns ns ns ns ns ns ns ns
Mbps
1.
Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O signal is at 50% duty-cycle and output I/O signal duty-cycle deviation is less than 50% ± 10%.
10/20 Doc ID 15967 Rev 1
ST2129 AC characteristics
Table 9.
Symbol
AC characteristics - test conditions: V
L
= 2.3 – 2.7 V
V
CC
= 2.3 – 2.7 V V
CC
= 3.0 – 3.6 V V
CC
= 4.5 – 5.5 V
Parameter
Min Max Min Max Min Max
Unit t t t t
RVCC
FVCC t t
RVL
FVL
I/OVL-VCC
I/OVCC-VL t
PZL
t
PZH t
PLZ
t
PHZ
D
R
Rise time I/O
VCC
Fall time I/O
VCC
Rise time I/O
VL
Fall time I/O
VL
Propagation delay time
I/O
VL-LH to I/O
VCC-
LH
I/O
VL-HL to I/O
VCC-
HL
Propagation delay time
I/O
VCC-LH to I/O
VL-
LH
I/O
VCC-HL to I/O
VL-
HL
Output enable time
Output disable time
Data rate
(1) t t t t
PLH
PHL
PLH
PHL
–
–
–
–
–
–
–
–
–
–
84
3.3
1.7
2.2
1.3
4.6
3.6
3.9
3.6
20
130
–
–
–
–
–
–
–
–
–
–
–
85
2.2
1.6
2.0
1.2
4.3
3.3
3.5
3.0
20
130
–
–
–
–
–
–
–
–
–
–
–
88
1.6
1.4
1.9
1.2
3.9
2.9
3.5
2.5
20
130
– ns ns ns ns ns ns ns ns
Mbps
1.
Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O signal is at 50% duty-cycle and output I/O signal duty-cycle deviation is less than 50% ± 10%.
ns
Table 10.
AC characteristics - test conditions: V
L
= 3.0 – 3.6 V
V
CC
= 3.0 – 3.6 V
Symbol Parameter
Min Max t t
RVCC
FVCC t t
RVL
FVL t
I/OVL-VCC t
I/OVCC-VL
Rise time I/O
VCC
Fall time I/O
VCC
Rise time I/O
VL
Fall time I/O
VL
Propagation delay time
I/O
VL-LH to I/O
VCC-LH
I/O
VL-HL to I/O
VCC-HL
Propagation delay time
I/O
VCC-LH to I/O
VL-LH
I/O
VCC-HL to I/O
VL-HL t
PLH t
PHL t
PLH t
PHL
–
–
–
–
–
–
–
–
2.6
4.0
2.6
1.8
1.3
1.6
1.1
4.1
V
CC
= 4.5 – 5.5 V
Min Max
–
–
–
–
–
1.7
1.2
1.5
1.1
4.1
–
–
–
2.3
4.0
2.4
Unit ns ns ns ns ns ns ns ns
Doc ID 15967 Rev 1 11/20
AC characteristics ST2129
Table 10.
AC characteristics - test conditions: V
L
= 3.0 – 3.6 V (continued)
V
CC
= 3.0 – 3.6 V V
CC
= 4.5 – 5.5 V
Symbol Parameter
Min Max Min Max
Unit t
PZL
t
PZH t
PLZ
t
PHZ
D
R
Output enable time
Output disable time
Data rate
(1)
–
–
86
15
110
–
–
–
89
15
110
– ns
Mbps
1.
Data rate is guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O signal is at 50% duty-cycle and output I/O signal duty-cycle deviation is less than 50% ± 10%.
12/20 Doc ID 15967 Rev 1
ST2129 Test circuit
Figure 5.
Test circuit
P u l s e gener a tor
VL VCC
D.U.T
C L
R1
V L
VCC
OPEN
GND
AM04077V1
Table 11.
Test circuit switches
Test C
L
15 pF t
PLH, t
PHL t r
, t f t
PZL, t
PLZ t
PZH, t
PHZ
15 pF
15 pF
15 pF
R
1
20 k Ω
20 k Ω
20 k Ω
20 k Ω
Switch
Open
Open
V
L or V
CC
GND
Table 12.
Waveform symbol value
Symbol
V
IH
V
IM
V
OM
V
X
V
Y
Driving I/O
VL
1.65V ≤ V
L
≤ 2.5 V
≤ V
CC
3.3V ≤ V
L
≤ V
CC
5.5 V
≤
Driving I/O
1.65V ≤ V
L
≤ V
CC
≤
2.5V
VCC
3.3V ≤ V
L
≤ V
CC
5.5V
≤
V
L
50% V
L
50% V
CC
V
OL
+ 0.15 V
V
OH
– 0.15 V
V
L
50% V
L
50% V
CC
V
OL
+ 0.3 V
V
OH
– 0.3 V
V
CC
50% V
CC
50% V
L
V
OL
+ 0.15 V
V
OH
– 0.15 V
V
CC
50% V
CC
50% V
L
V
OL
+ 0.3 V
V
OH
– 0.3 V
Doc ID 15967 Rev 1 13/20
Test circuit
Figure 6.
Waveform - propagation delay (f = 1 MHz, 50% duty cycle)
ST2129
Figure 7.
Waveform - output enable and disable time (f = 1 MHz, 50% duty cycle)
14/20 Doc ID 15967 Rev 1
ST2129
8 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Figure 8.
Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Doc ID 15967 Rev 1
7936408 Rev.D
15/20
Package mechanical data
Table 13.
Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Millimeters
Symbol
ST2129
A3 0.127 – – e 0.40 – –
Figure 9.
Footprint recommendation for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
16/20 Doc ID 15967 Rev 1
ST2129 Package mechanical data
Figure 10.
Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Figure 11.
Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Doc ID 15967 Rev 1
Back view
17/20
Package mechanical data
Figure 12.
Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
ST2129
18/20 Doc ID 15967 Rev 1
ST2129
Table 14.
Document revision history
Date Revision
07-Sep-2009 1 Initial release.
Changes
Revision history
Doc ID 15967 Rev 1 19/20
ST2129
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