STP80N70F4
N-channel 68 V, 8.2 m Ω typ., 85 A STripFET™ DeepGATE™
Power MOSFET in TO-220 package
Datasheet — production data
Features
Order code
STP80N70F4
V
DSS
68 V
R
DS(on) max
< 9.8 m Ω
■
■
■
■
N-channel enhancement mode
100% avalanched rated
Low gate charge
Very low on-resistance
I
D
85 A
Application
Switching applications
TO-220
1
2
3
Figure 1.
Internal schematic diagram
Description
This device is an N-channel Power MOSFET developed using ST’s STripFET™ DeepGATE™ technology. The device has a new gate structure and is specially designed to minimize on-state resistance to provide superior switching performance.
$
'
3
!-V
Table 1.
Device summary
Order code
STP80N70F4
Marking
80N70F4
Package
TO-220
Packaging
Tube
December 2012
This is information on a product in full production.
Doc ID 18377 Rev 2 1/12 www.st.com
12
3
4
5
1
2
Contents
Contents
STP80N70F4
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12 Doc ID 18377 Rev 2
STP80N70F4 Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT
Drain-source voltage
Gate-source voltage
Drain current (continuous) at T
Drain current (continuous) at T
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Derating factor
E
AS
(2)
T stg
T j
Single pulse avalanche energy
Storage temperature
Operating junction temperature
1.
Pulse width limited by safe operating area
2.
Starting T j
= 25 °C, I
D
= 35 A, V
DD
= 34 V
C
= 25 °C
C
= 100 °C
Table 3.
Symbol
Thermal data
Parameter
R thj-case
R thj-a
T l
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Maximum lead temperature for soldering purpose
Value
68
± 20
85
60
340
150
1
185
- 55 to 175
Unit
A
A
A
V
V
W
W/°C mJ
°C
Value
1
62.5
300
Unit
°C/W
°C/W
°C
Doc ID 18377 Rev 2 3/12
Electrical characteristics STP80N70F4
(T
CASE
= 25 °C unless otherwise specified)
Table 4.
Symbol
On/off states
Parameter
V
(BR)DSS
Drain-source
Breakdown voltage
V
R
I
I
DSS
GSS
GS(th)
DS(on)
Zero gate voltage
Drain current (V
GS
= 0)
Gate-body leakage current (V
DS
= 0)
Gate threshold voltage
Static drain-source on-resistance
Test conditions
I
D
= 250 µA, V
GS
= 0
V
DS
= 68 V
V
DS
= 68 V,T
C
=125 °C
V
GS
= ± 20 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 40 A
Min.
Typ.
Max.
Unit
68
2
8.2
4
9.8
V
1
100
µA
µA
±100 nA
V m Ω
Table 5.
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Dynamic
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0
V
DD
= 34 V, I
D
= 80A,
V
GS
= 10 V
(see Figure 14)
Min.
Typ.
Max.
Unit
-
5600
430 pF pF
250 pF
-
90
25
23
nC nC nC
Table 6.
Symbol t d(on) t r t d(off) t f
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
V
DD
= 34 V, I
D
= 40A
R
G
= 4.7 Ω V
GS
= 10 V
(see Figure 13)
Min.
Typ.
Max.
Unit
-
-
25
36
80
25
-
ns ns ns ns
4/12 Doc ID 18377 Rev 2
STP80N70F4 Electrical characteristics
Table 7.
Symbol
Source drain diode
Parameter Test conditions
I
SD
I
SDM
(1)
V
SD
(2) t rr
Q rr
I
RRM
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
1.
Pulse width limited by safe operating area.
2.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
I
SD
= 85 A, V
GS
= 0
I
SD
= 80 A,
V
DD
= 54.4 V di/dt = 100 A/µs,
T j
= 150 °C
(see Figure 15)
Min.
Typ.
Max Unit
-
-
-
85
340
1.5
A
A
V
-
55
130
4 ns nC
A
Doc ID 18377 Rev 2 5/12
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2.
Safe operating area
I
D
(A)
100 a tion in thi a
i s s a re
D
S
(on) a x R
Oper
Limited
10
AM1 3 029v1
Tj=175°C
Tc=25°C
S ingle p u l s e
Figure 3.
Thermal impedance
100 µs
1m s
10m s
1
STP80N70F4
0.1
0.1
1 10 V
D S
(V)
Figure 4.
Output characteristics
I
D
(A)
3 00
250
V
G S
=10V
AM1 3 0 3 0v1
Figure 5.
Transfer characteristics
I
D
(A)
V
D S
=10V
250
7V
200
AM1 3 0 3 1v1
200
6V
150
100
5V
50
0
0 1 2 3 4 5 6 7 8 9 V
D S
(V)
150
100
50
0
2 3 4 5 6 7 8 9 V
G S
(V)
Figure 6.
Normalized B
VDSS
vs temperature Figure 7.
Static drain-source on-resistance
AM1 3 0 3 2v1 AM1 3 0 33 v1
BV
D SS
(norm)
I
D
=250 µ A
R
D S (on)
(m
Ω
)
V
G S
=10V
1.10
9.5
1.05
9.0
1.00
8 .5
0.95
8 .0
0.90
0.
8 5
7.5
0.
8 0
-25 25 75 125 175 T
J
(°C)
7.0
0 10 20 3 0 40 50 60 70 8 0 I
D
(A)
6/12 Doc ID 18377 Rev 2
STP80N70F4 Electrical characteristics
Figure 8.
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
AM1 3 0 3 4v1
V
G S
(V)
12
V
DD
= 3 4V
I
D
= 8 0A
C (pF)
10
AM1 3 0 3 5v1
Ci ss
8
1000
6
4
2
0
0
Co ss
Cr ss
100
0 10 20 3 0 40 50 60 70 V
D S
(V) 20 40 60 8 0 100 Q g
(nC)
Figure 10.
Normalized gate threshold voltage vs temperature
AM1 3 0 3 6v1
V
G S (th)
(norm)
I
D
=250 µ A
Figure 11.
Normalized on-resistance vs temperature
AM1 3 0 3 7v1
R
D S (on)
(norm) V
G S
=10V
I
D
=40A
1.2
2.0
1.0
0.
8
1.5
1.0
0.5
0
-25 25 75 125 175 T
J
(°C)
0.6
0.4
-25 25 75 125 175 T
J
(°C)
Figure 12.
Source-drain diode forward characteristics
V
S D
(V)
1.0
T
J
=-55°C
AM1 3 0 38 v1
T
J
=25°C
0.9
0.
8
0.7
0.6
0.5
T
J
=175°C
0.4
0.
3
0 10 20 3 0 40 50 60 70 8 0 I
S D
(A)
Doc ID 18377 Rev 2 7/12
Test circuits
3 Test circuits
STP80N70F4
Figure 13.
Switching times test circuit for resistive load
Figure 14.
Gate charge test circuit
V
DD
12V
47k
Ω
100nF
1k Ω
V
G S
V
D
R
G
R
L
D.U.T.
2200
μ
F
3 .
3
μ
F
V
DD
V i
=20V=V
GMAX
2200
μ F
I
G
=CON S T
2.7k
Ω
100 Ω
D.U.T.
V
G
P
W
47k
Ω
P
W
1k
Ω
AM0146 8 v1 AM01469v1
Figure 15.
Test circuit for inductive load switching and diode recovery times
Figure 16.
Unclamped inductive load test circuit
25 Ω
G
A
D
D.U.T.
S
B
R
G
A
FA S T
DIODE
A
B
B
G
D
S
L=100 μ H
3 .
3
μ F
1000
μ F
V
DD
V i
V
D
I
D
L
D.U.T.
2200
μ F
3 .
3
μ F
V
DD
P w
AM01470v1
Figure 17.
Unclamped inductive waveform Figure 18.
Switching time waveform
V
D
V
(BR)D SS t on td on t r t off td off t f
AM01471v1
I
DM
90 %
90 %
10 %
I
D 0
10 % V
D S
V
DD
V
DD
90 %
V
G S
AM01472v1
0
10 %
AM0147 3 v1
8/12 Doc ID 18377 Rev 2
STP80N70F4
4 Package mechanical data
Package mechanical data c
D
D1
E e
A b b1 e1
F
H1
J1
L
L1
L20
L30
∅
P
Q
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
Table 8.
TO-220 type A mechanical data
Dim.
mm
Typ.
Min.
4.40
0.61
1.14
0.48
15.25
Max.
4.60
0.88
1.70
0.70
15.75
10
2.40
4.95
1.23
6.20
2.40
13
3.50
3.75
2.65
1.27
16.40
28.90
10.40
2.70
5.15
1.32
6.60
2.72
14
3.93
3.85
2.95
Doc ID 18377 Rev 2 9/12
Package mechanical data
Figure 19.
TO-220 type A drawing
STP80N70F4
00159 88 _typeA_Rev_ S
10/12 Doc ID 18377 Rev 2
STP80N70F4 Revision history
Table 9.
Date
12-Jan-2011
Document revision history
17-Dec-2012
Revision
1
2
Changes
First release.
Document status promoted from preliminary data to production data.
Section 2.1: Electrical characteristics (curves)
has been added.
Doc ID 18377 Rev 2 11/12
STP80N70F4
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12/12 Doc ID 18377 Rev 2
