STMicroelectronics High-voltage high and low side driver Datasheet
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L6388
HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
1 FEATURES
■ HIGH VOLTAGE RAIL UP TO 600 V
■ dV/dt IMMUNITY ± 50 V/nsec IN FULL
TEMPERATURE RANGE
■ DRIVER CURRENT CAPABILITY:400 mA
SOURCE,650 mA SINK
■ SWITCHING TIMES 70/40 nsec RISE/FALL
WITH 1nF LOAD
■ 3.3V, 5V, 15V CMOS/TTL INPUTS
COMPARATORS WITH HYSTERESYS AND
PULL DOWN
■ INTERNAL BOOTSTRAP DIODE
■ OUTPUTS IN PHASE WITH INPUTS
■ DEAD TIME AND INTERLOCKING FUNCTION
2 DESCRIPTION
The L6388 is an high-voltage device, manufactured with the BCD"OFF-LINE" technology.
Figure 2. Block Diagram
Figure 1. Package
SO8
Table 1. Order Codes
Part Number
L6388
L6388D
L6388D013TR
DIP8
Package
DIP8
SO8
SO8 in Tape & Reel
It has a Driver structure that enables to drive independent referenced N Channel Power MOS or IG-
BT. The Upper (Floating) Section is enabled to work with voltage Rail up to 600V.
The Logic Inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.
BOOTSTRAP DRIVER
8 Vboot
H.V.
Cboot
V
CC
3
UV UV
DETECTION DETECTION
HVG
R
DRIVER
LOGIC HVG
R
7
2 S
HIN
SHIFTER
OUT
Obsolete Product(s) - Obsolete Product(s)
LIN
1
SHOOT
THROUGH
PREVENTION
6
5 LVG
TO LOAD
LVG
DRIVER
4 GND
Rev. 2
1/11 May 2005
L6388
Table 2. Absolute Maximum Rating
Symbol Parameter
V out
V cc
V boot
V hvg
V lvg
Output Voltage
Supply Voltage
Floating Supply Voltage
High Side Gate Output Voltage
Low Side Gate Output Voltage
V i
Logic Input Voltage dV out
/dt Allowed Output Slew Rate
P tot
T j
T stg
Total Power Dissipation (T j
= 85°C)
Junction Temperature
Storage Temperature
Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900V (Human Body Model)
Figure 3. Pin Connection (Top view)
Value
-3 to V boot
- 18
- 0.3 to +18
- 1 to 618
- 1 to V boot
-0.3 to V cc
+0.3
-0.3 to V cc
+0.3
50
750
150
-50 to 150
LIN
HIN
V
CC
GND
3
4
1
2
D97IN517A
6
5
8
7
V boot
HVG
OUT
LVG
Table 3. Pin Description
Type
I
I
I
Function N.
1
2
3
4
5
Name
LIN
HIN
Vcc
GND
LVG (*)
Low Side Driver Logic Input
High Side Driver Logic Input
Low Voltage Power Supply
Ground
Low Side Driver Output O
6
7
OUT
HVG (*)
O
O
High Side Driver Floating Reference
High Side Driver Output
8 Vboot Bootstrap Supply Voltage Obsolete Product(s) - Obsolete Product(s) and the source of the external MOSFET normally used to hold the pin low.
Table 4. Thermal Data
Symbol Parameter
R th j-amb
Thermal Resistance Junction to Ambient
SO8
150
Minidip
100
Unit
°C/W
Unit
V
V
V
V
V
V
V/ns mW
°C
°C
2/11
L6388
Table 5. Recommended Operating Conditions
Symbol Pin
V out
6
V
BS
(*) f sw
8
Parameter
Output Voltage
Floating Supply Voltage
Switching Frequency
Test Condition
HVG,LVG load CL = 1nF
V cc
T j
3 Supply Voltage
Junction Temperature
Note 1: If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V
(*): V
BS
= Vboot - Vout
Min.
Note 1
Note 1
Typ.
-45
Max.
580
17
400
17
125
Unit
V
V kHz
V
°C
Table 6. Electrical Characteristics
(V cc
= 15V; T j
= 25°C)
Symbol Pin
AC OPERATION t on t off
Parameter
1 vs 5
2 vs 7
High/Low Side Driver Turn-On
Propagation Delay
High/Low Side Driver Turn-Off
Propagation Delay
Test Condition
V out
= 0V
V out
= 0V t r t f
DT
7,5 Rise Time
7,5 Fall Time
7,5 Dead Time
DC OPERATION
Low Supply Voltage Section
V ccth1
V ccth2
V cchys
I qccu
I qcc
R dson
C
L
= 1000pF
C
L
= 1000pF
3 V cc
UV Turn On Threshold
V cc
UV Turn Off Threshold
V cc
UV Hysteresis
Undervoltage Quiescent Supply
Current
Quiescent Current
V cc
≤
9V
Bootstrap Driver on Resistance
(**)
V cc
= 15V
V cc
Min.
220
9.1
7.9
0.9
Typ.
225
160
70
40
320
9.6
8.3
250
350
125
Max.
300
220
100
80
420
10.1
8.8
330
450
Unit ns ns
V
V ns ns ns
V
µ
A
µ
A
Ω
Bootstrapped Supply Voltage Section
Obsolete Product(s) - Obsolete Product(s)
V
BSth2
V
BShys
IQ
BS
V
BS
UV Turn Off Threshold
V
BS
UV Hysteresis
V
BS
Quiescent Current HVG ON
7.2
0.9
8.2
9.2
250
V
µ
A
µ
A ILK High Voltage Leakage Current V hvg
= V out
= V boot
= 600V 10
High/Low Side Driver
I so
I si
5,7 Source Short Circuit Current
Sink Short Circuit Current
V
IN
= V ih
(tp < 10
µ s)
V
IN
= V il
(tp < 10
µ s)
300
500
400
650 mA mA
3/11
L6388
Table 6. Electrical Characteristics (continued)
(V cc
= 15V; T j
= 25°C)
Symbol Pin
Logic Inputs
V il
V ih
I ih
I il
1, 2
Parameter
Low Level Logic Input Voltage
High Level Logic Input Voltage
High Level Logic Input Current
Low Level Logic Input Current
Test Condition
V
IN
= 15V
V
IN
= 0V
Min.
1.8
-1
(**) RDSON is tested in the following way: R
DSON
=
I
(
(
V
,
– V
CBOOT1
– (
(
–
--------------------------------------------------------------------------------------------------------------
1
V
CC
V
CCBOOT1
)
V
) – I
2
CC
V
CC
,
V
V
CBOOT2
)
CCBOOT2
) where I
1
is pin 8 current when V
CBOOT
= V
CBOOT1
, I2 when V
CBOOT
= V
CBOOT2
.
Figure 4. Dead Time Waveforms Definitions
Typ.
Max.
Unit
20
1.1
70
V
V
µ
A
µ
A
LIN
H IN
LVG
HVG
DT
DT
DT
Figure 5. Propagation Delay Waveform Definitions
Obsolete Product(s) - Obsolete Product(s)
4/11
L6388
3 INPUT LOGIC
Input logic is provided with an interlocking circuitry which avoids the two outputs (LVG, HVG) to be active at the same time when both the logic input pins (LIN, HIN) are at a high logic level. In addition, to prevent cross conduction of the external MOSFETs, after each output is turned-off the other output cannot be turned-on before a certain amount of time (DT) (see Figure 4).
Figure 6. Typical Rise and Fall Times vs. Load
Capacitance time
(nsec)
D99IN1054
250
Figure 7. Quiescent Current vs. Supply
Voltage
Iq
(
µ
A)
10 4
D99IN1055
200
150
100
50
Tr
Tf
0
0 1 2 3 4 5 C (nF)
For both high and low side buffers @25˚C Tamb
10 3
10 2
10
0 2 4 6 8 10 12 14 16 V
S
(V)
3.1 BOOTSTRAP DRIVER
A bootstrap circuitry is needed to supply the high voltage section. This function is normally accomplished by a high voltage fast recovery diode (fig. 8a). In the L6388 a patented integrated structure replaces the external diode. It is realized by a high voltage DMOS, driven synchronously with the low side driver (LVG), with in series a diode, as shown in fig. 8b
An internal charge pump (fig. 8b) provides the DMOS driving voltage .
The diode connected in series to the DMOS has been added to avoid undesirable turn on of it.
3.2 CBOOT selection and charging
To choose the proper C
BOOT
value the external MOS can be seen as an equivalent capacitor. This capacitor
C
EXT
is related to the MOS total gate charge :
C
EXT
=
Q gate gate
The ratio between the capacitors C
EXT
and C
BOOT
is proportional to the cyclical voltage loss .
Obsolete Product(s) - Obsolete Product(s)
CBOOT>>>CEXT Obsolete Product(s) - Obsolete Product(s) e.g.: if Q gate
is 30nC and V gate
is 10V, C
EXT
is 3nF. With C
BOOT
= 100nF the drop would be 300mV.
If HVG has to be supplied for a long time, the CBOOT selection has to take into account also the leakage losses.
e.g.: HVG steady state consumption is lower than 200
µ
C
EXT
A, so if HVG T
. This charge on a 1
µ
F capacitor means a voltage drop of 1V.
ON
is 5ms, CBOOT has to supply 1
µ
C to
The internal bootstrap driver gives great advantages: the external fast recovery diode can be avoided (it usually has great leakage current). This structure can work only if V
OUT
is close to GND (or lower) and in the meanwhile the LVG is on. The charging time (T charge
) of the C
BOOT
is the time in which both conditions are fulfilled and it
5/11
L6388 has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS RDSON (typical value: 125 Ohm). At low frequency this drop can be neglected. Anyway increasing the frequency it must be taken in to account.
The following equation is useful to compute the drop on the bootstrap DMOS:
V drop
= I ch arg e
R dson
→
V drop
=
Q
-------------------R
T ch arg e dson where Q gate
is the gate charge of the external power MOS, R dson
is the on resistance of the bootstrap DMOS, and T charge
is the charging time of the bootstrap capacitor.
For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap DMOS is about
1V, if the T charge
is 5
µ s. In fact:
V drop
=
30nC
5
µ s
⋅
125
Ω ∼
0.8V
V drop
has to be taken into account when the voltage drop on C
BOOT
is calculated: if this drop is too high, or the circuit topology doesn't allow a sufficient charging time, an external diode can be used.
Figure 8. Bootstrap Driver.
D
BOOT
V
S
V
BOOT
H.V.
HVG
C
BOOT
V
OUT
TO LOAD
LVG a
V
BOOT
V
S
H.V.
Obsolete Product(s) - Obsolete Product(s)
C
BOOT
Obsolete Product(s) - Obsolete Product(s)
OUT
TO LOAD
LVG b
6/11
Figure 9. V
BOOT
UV Turn On Threshold vs.
Temperature
13
12
11
10
9
8
7
Typ.
6
5
-45 -25 0
@ Vcc = 15V
25 50 75 100 125
Tj (˚C)
Figure 10. V
BOOT
UV Turn Off Threshold vs.
Temperature
14
13
12
11
10
9
8
Typ.
7
6
-45 -25 0
@ Vcc = 15V
25 50 75 100 125
L6388
Figure 12. V
CC
UV Turn Off Threshold vs.
Temperature
11
10
9
8
Typ.
7
6
-45 -25 0 25 50 75 100 125
Tj (˚C)
Figure 13. Output Source Current vs.
Temperature
1000
@ Vcc = 15V
800
600
400
Typ.
200
0
-45 -25 0 25 50 75 100 125
Tj (˚C)
Figure 11. V
CC
UV Turn On Threshold vs.
Temperature
Figure 14. Output Sink Current vs.
Temperature
13
1000
12
800 Obsolete Product(s) - Obsolete Product(s)
11
600
@ Vcc = 15V
Obsolete Product(s) - Obsolete Product(s)
Typ.
9
400
Typ.
200
8
7
-45 -25 0 25 50 75 100 125
Tj (˚C)
0
-45 -25 0 25 50 75 100 125
Tj (˚C)
7/11
L6388
Figure 15. DIP8 Mechanical Data & Package Dimensions
A a1
B
DIM.
mm inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
3.32
0.131
0.51
1.15
1.65
0.020
0.045
0.065
e e3 e4
F
I
L
Z
D
E b 0.356
b1 0.204
7.95
3.18
2.54
7.62
7.62
0.55
0.014
0.304
0.008
10.92
9.75
0.313
6.6
5.08
3.81
1.52
0.125
0.100
0.300
0.300
0.022
0.012
0.430
0.384
0.260
0.200
0.150
0.060
OUTLINE AND
MECHANICAL DATA
DIP-8
Obsolete Product(s) - Obsolete Product(s)
8/11
Figure 16. SO8 Mechanical Data & Package Dimensions
DIM.
A
A1
A2
B
C
D
(1)
E mm inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
1.35
0.10
1.10
0.33
0.19
4.80
1.75
0.25
1.65
0.51
0.25
5.00
0.053
0.004
0.043
0.013
0.007
0.189
0.069
0.010
0.065
0.020
0.010
0.197
3.80
4.00
0.15
0.157
e
H
1.27
0.050
5.80
0.25
6.20
0.228
0.50
0.010
0.244
0.020
h
L 0.40
1.27
0.016
0˚ (min.), 8˚ (max.)
0.050
k ddd 0.10
0.004
Note: (1) Dimensions D does not include mold flash, protrusions or gate burrs.
Mold flash, potrusions or gate burrs shall not exceed
0.15mm (.006inch) in total (both side).
OUTLINE AND
MECHANICAL DATA
SO-8
L6388
Obsolete Product(s) - Obsolete Product(s)
0016023 C
9/11
L6388
Table 7. Revision History
Date
January 2005
May 2005
Revision
1
2
Description of Changes
First Issue
Changed from Preliminary Data to Final
Obsolete Product(s) - Obsolete Product(s)
10/11
L6388 by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not Obsolete Product(s) - Obsolete Product(s)
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
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11/11
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