STS3DPF60L
DUAL P-CHANNEL 60V - 0.10
Ω
- 3A SO-8
STripFET™ MOSFET
Table 1: General Features
TYPE V
DSS
R
DS(on)
■
■
STS3DPF60L 60 V < 0.12
Ω
TYPICAL R
DS
(on) = 0.10
Ω
@ 10V
STANDARD OUTLINE FOR EASY
■
AUTOMATED SURFACE MOUNT
ASSEMBLYY
LOW THRESHOLD DRIVE
I
D
3 A
DESCRIPTION
This MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
Figure 1: Package
SO-8
Figure 2: Internal Schematic Diagram
APPLICATIONS
■
DC-DC CONVERTERS
Table 2: Order Codes
PART NUMBER MARKING
S3DPF60L
PACKAGE
SO-8
PACKAGING
TAPE & REEL
September 2004
Rev. 1
1/9
STS3DPF60L
Table 3: Absolute Maximum ratings
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 k
Ω
)
Gate- source Voltage
Drain Current (continuous) at T
C
= 25°C
Drain Current (continuous) at T
C
= 100°C
Drain Current (pulsed) I
DM
(
•)
P tot
T stg
Total Dissipation at T
Storage Temperature
C
= 25°C
T j
Operating Junction Temperature
(
•)
Pulse width limited by safe operating area.
Value
60
60
± 16
3
1.9
12
2
-55 to 150
Table 4: Thermal Data
Rthj-amb (*)Thermal Resistance Junction-ambient
(*)
When Mounted on 1 inch
2
FR-4 board, 2 oz of Cu t
≤
10 s
62.5
ELECTRICAL CHARACTERISTICS (T
CASE
=25°C UNLESS OTHERWISE SPECIFIED)
Table 5: On/Off
Symbol Parameter Test Conditions Min.
Typ.
Max.
V
(BR)DSS
I
D
= 250 µA, V
GS
= 0 60
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
Gate Threshold Voltage
Static Drain-source On
Resistance
V
DS
= Max Rating
V
DS
= Max Rating ,T
C
= 125°C
V
GS
= ± 16 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 1.5 A
V
GS
= 4.5 V, I
D
= 1.5 A
1.5
0.10
0.130
1
10
±100
0.12
0.160
°C/W
Unit
V
µA
µA nA
V
Ω
Ω
Unit
V
V
A
W
V
A
A
°C
2/9
STS3DPF60L
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 6: Dynamic
Symbol Parameter
Forward Transconductance g fs
(*)
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance t d(on) t r t d(off) t f
Q g
Q gs
Q gd
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V
DS
= 10 V, I
D
= 3 A
V
DS
= 25V f = 1 MHz V
GS
= 0
V
DD
= 30 V , I
D
= 1.5 A
R
G
= 4.7
Ω
, V
GS
= 4.5 V
(see Figure 16)
V
DD
= 48V, I
D
= 3A V
GS
=4.5V
(see Figure 19)
Table 7: Source Drain Diode
Symbol Parameter
I
I
SD
SDM
(•)
V
SD
(*)
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage t rr
Q rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
(*)
Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(•)
Pulse width limited by safe operating area.
Test Conditions
I
SD
= 3 A, V
GS
= 0
I
SD
= 3 A, di/dt = 100A/µs
V
DD
= 30 V, T j
= 150°C
(see Figure 17)
Min.
Typ.
7.2
630
121
49
124
54
39
14.5
11.6
4.5
4.7
Max.
15.7
ns ns ns ns nC nC nC
Unit
S pF pF pF
Min.
Typ.
44
68.2
3.1
Max.
3
12
1.2
Unit
A
A
V ns nC
A
3/9
STS3DPF60L
Figure 3: Safe Operating Area Figure 6: Thermal Impedance
Figure 4: Output Characteristics Figure 7: Transfer Characteristics
Figure 5: Transconductance Figure 8: Static Drain-source On Resistance
4/9
Figure 9: Gate Charge vs Gate-source Voltage
STS3DPF60L
Figure 12: Capacitance Variations
Figure 10: Normalized Gate Thereshold Voltage vs Temperature
Figure 13: Normalized On Resistance vs Temperature
Figure 11: Dource-Drain Diode Forward Characteristics
Figure 14: Normalized Breakdown Voltage vs
Temperature
5/9
STS3DPF60L
Figure 15: Unclamped Inductive Load Test Circuit
Figure 18: Unclamped Inductive Wafeform
Figure 16: Switching Times Test Circuit For
Resistive Load
Figure 19: Gate Charge Test Circuit
Figure 17: Test Circuit For Inductive Load
Switching and Diode Recovery Times
6/9
DIM.
e e3
F
L
C c1
D
E
M
S
A a1 a2 a3 b b1
MIN.
0.1
0.65
0.35
0.19
0.25
4.8
5.8
3.8
0.4
STS3DPF60L
SO-8 MECHANICAL DATA
mm.
TYP MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
5.0
6.2
MIN.
0.003
0.025
0.013
0.007
0.010
45 (typ.)
0.188
0.228
1.27
3.81
4.0
1.27
0.6
8 (max.)
0.14
0.015
inch
TYP.
0.050
0.150
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
0.196
0.244
0.157
0.050
0.023
7/9
STS3DPF60L
Table 8: Revision History
Date
16-Sep-2004
Revision
1 New release.
Description of Changes
8/9
STS3DPF60L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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