STW65N65DM2AG
Automotive-grade Nchannel 650 V, 0.042 Ω typ., 60 A
Power MOSFET MDmesh™ DM2 in a TO-247 package
Datasheet - production data
TO-247
1
2
3
Figure 1: Internal schematic diagram
Order code
STW65N65DM2AG
Features
Order code V
DS
R
DS(on) max.
I
D
P
TOT
STW65N65DM2AG 650 V
0.05 Ω
60 A 446 W
•
Designed for automotive applications and
AEC-Q101 qualified
•
Fast-recovery body diode
•
Extremely low gate charge and input capacitance
•
Low on-resistance
•
100% avalanche tested
•
Extremely high dv/dt ruggedness
•
Zener-protected
Applications
•
Switching applications
Description
This high voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fast recovery diode series. It offers very low recovery charge (Q rr
) and time (t rr
) combined with low R
DS(on)
, rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and
ZVS phase-shift converters.
Table 1: Device summary
Marking
65N65DM2
Package
TO-247
Packing
Tube
August 2015 DocID028164 Rev 1
This is information on a product in full production.
1/12 www.st.com
Contents
Contents
STW65N65DM2AG
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1
TO-247 package information ............................................................. 9
5 Revision history ............................................................................ 11
2/12 DocID028164 Rev 1
STW65N65DM2AG
1 Electrical ratings
Symbol
V
GS
I
D
I
DM
(1)
P
TOT
dv/dt
(2) dv/dt
(3)
T stg
T j
Table 2: Absolute maximum ratings
Parameter
Gate-source voltage
Drain current (continuous) at T case
= 25 °C
Drain current (continuous) at T case
= 100 °C
Drain current (pulsed)
Total dissipation at T case
= 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Storage temperature
Operating junction temperature
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
I
SD
≤ 60 A, di/dt=800 A/μs; V
DS
peak < V
(BR)DSS
, V
DD
= 80% V
(BR)DSS
.
(3)
V
DS
≤ 520 V.
Symbol
Table 3: Thermal data
Parameter
R thj-case
R thj-amb
Thermal resistance junction-case
Thermal resistance junction-ambient
Symbol
I
AR
E
AS
(1)
Table 4: Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
Single pulse avalanche energy
Notes:
(1)
starting T j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V.
Electrical ratings
Value
±25
60
38
240
446
50
50
-55 to 150
Unit
V
A
A
W
V/ns
°C
Value
0.28
50
Unit
°C/W
Value
8
1100
Unit
A mJ
DocID028164 Rev 1 3/12
Electrical characteristics
2 Electrical characteristics
(T case
= 25 °C unless otherwise specified)
Symbol Parameter
Table 5: Static
Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 1 mA
I
DSS
Zero gate voltage drain current
V
GS
= 0 V, V
DS
= 650 V
V
GS
= 0 V, V
DS
= 650 V,
T case
= 125 °C
I
GSS
Gate-body leakage current
V
DS
= 0 V, V
GS
= ±25 V
V
GS(th)
Gate threshold voltage V
DS
= V
GS
, I
D
= 250 µA
R
DS(on)
Static drain-source onresistance
V
GS
= 10 V, I
D
= 30 A
Symbol Parameter
Table 6: Dynamic
Test conditions
C iss
C oss
C rss
C
oss eq.
(1)
R
G
Q g
Q gs
Q gd
Input capacitance
Output capacitance
Reverse transfer capacitance
Equivalent output capacitance
V
V
V
DS
GS
DS
= 100 V, f = 1 MHz,
= 0 V
= 0 to 520 V, V
GS
= 0 V
Intrinsic gate resistance f = 1 MHz, I
D
= 0 A
Total gate charge
Gate-source charge
Gate-drain charge
V
DD
= 520 V, I
D
= 60 A,
V
GS
= 10 V (see Figure 15:
"Gate charge test circuit" )
STW65N65DM2AG
Min. Typ. Max. Unit
650 V
10
µA
100
±5 µA
4 5 V
0.042 0.05
Ω
3
Min. Typ. Max. Unit
- 5500
- 210
-
- pF
- 3 -
-
-
-
-
-
456
3.3
120
27
58
-
-
-
-
- pF
Ω nC
Notes:
(1)
C oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C oss
when V
DS increases from 0 to 80% V
DSS
.
Symbol Parameter
Table 7: Switching times
Test conditions Min. Typ. Max. Unit t d(on) t r t d(off) t f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 325 V, I
D
= 30 A
R
G
= 4.7
Ω, V
GS
= 10 V (see
Figure 14: "Switching times test circuit for resistive load" and
Figure 19: "Switching time waveform" )
- 33
- 13.5
- 114
- 11.5
-
-
-
- ns
4/12 DocID028164 Rev 1
STW65N65DM2AG
Symbol Parameter
I
SD
Source-drain current
I
SDM
(1)
Source-drain current
(pulsed)
V
SD
(2)
Forward on voltage t rr
I
Q rr
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current t rr
I
Q rr
RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 8: Source-drain diode
Test conditions
I
I
V
GS
SD
V
DD
= 0 V, I
SD
= 60 A
circuit for inductive load switching and diode recovery times"
SD
= 60 A, di/dt = 100 A/µs,
= 60 V (see Figure 16: "Test
)
= 60 A, di/dt = 100 A/µs,
V
DD
= 60 V, T j
= 150 °C (see
Figure 16: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
- 60 A
- 240 A
-
- 154
1.6 V ns
- 0.94 µC
- 12.2
- 288
- 3.65
- 25.4
A ns
µC
A
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DocID028164 Rev 1 5/12
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STW65N65DM2AG
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
6/12 DocID028164 Rev 1
STW65N65DM2AG
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage vs temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Normalized V(BR)DSS vs temperature
Figure 12: Output capacitance stored energy
Figure 13: Source- drain diode forward characteristics
DocID028164 Rev 1 7/12
Test circuits
3 Test circuits
Figure 14: Switching times test circuit for resistive load
STW65N65DM2AG
Figure 15: Gate charge test circuit
Figure 16: Test circuit for inductive load switching and diode recovery times
Figure 17: Unclamped inductive load test circuit
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
8/12 DocID028164 Rev 1
STW65N65DM2AG
4
4.1
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK
®
is an ST trademark.
TO-247 package information
Figure 20: TO-247 package outline
DocID028164 Rev 1
0075325_H
9/12
Package information
Dim. e
L
L1
L2
ØP
ØR
S b2 c
D
E
A
A1 b b1
Table 9: TO-247 package mechanical data mm.
Min. Typ.
4.85
2.20
1.0
2.0
3.0
0.40
19.85
15.45
5.30
14.20
3.70
3.55
4.50
5.30
5.45
18.50
5.50
STW65N65DM2AG
Max.
5.15
2.60
1.40
2.40
3.40
0.80
20.15
15.75
5.60
14.80
4.30
3.65
5.50
5.70
10/12 DocID028164 Rev 1
STW65N65DM2AG
5
Revision history
Revision history
Date
04-Aug-2015
Table 10: Document revision history
Revision
1
Changes
Initial release.
DocID028164 Rev 1 11/12
STW65N65DM2AG
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