STD20NF10T4
Nchannel 100 V, 0.038 Ω typ., 25 A STripFET™ II Power
MOSFET in a DPAK package
Datasheet - production data
Figure 1: Internal schematic diagram
G(1)
D(2, TAB)
S(3)
AM01475v1_Tab
Features
Order code V
DS
R
DS(on)
max.
STD20NF10T4 100 V 0.045 Ω
Exceptional dv/dt capability
Application oriented characterization
I
D
25 A
Applications
Switching applications
Description
This Power MOSFET series realized with
STMicroelectronics unique STripFET™ process is specifically designed to minimize input capacitance and gate charge. It is therefore ideal as a primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and
Computer applications. It is also suitable for any application with low gate charge drive requirements.
Order code
Table 1: Device summary
Marking Package Packing
STD20NF10T4 D20NF10 DPAK
Tape and reel
April 2016 DocID029179 Rev 1
This is information on a product in full production.
1/17 www.st.com
Contents
Contents
STD20NF10T4
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1
4.2
4.3
DPAK (TO-252) type A package information..................................... 9
DPAK (TO-252) type C package information .................................. 11
DPAK (TO-252) packing information ............................................... 14
5 Revision history ............................................................................ 16
2/17 DocID029179 Rev 1
STD20NF10T4
1 Electrical ratings
Symbol
Table 2: Absolute maximum ratings
Parameter
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(1)
P
TOT
E
AS
(2) dv/dt (3)
T j
T stg
Drain-source voltage
Drain-gate voltage (R
GS
= 20 kΩ)
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Single pulse avalanche energy
Peak diode recovery voltage slope
Operating junction temperature range
Storage temperature range
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Starting T
J
= 25 °C, I
D
= 10 A, V
DD
= 27 V.
(3)
I
SD
≤ 25 A, di/dt ≤ 300 A/µs; V
DD
= V
(BR)DSS
, T
J
≤ T
JMAX.
Symbol
Table 3: Thermal data
Parameter
R thj-case
R
thj-pcb
(1)
Thermal resistance junction-case
Thermal resistance junction-pcb
Notes:
(1)
When mounted on 1 inch² FR-4, 2 Oz copper board.
Electrical ratings
Value
100
100
±20
25
21
100
85
300
20
- 55 to 175
Unit
V
V
V
A
A
A
W mJ
V/ns
°C
Value
1.76
50
Unit
°C/W
°C/W
DocID029179 Rev 1 3/17
Electrical characteristics
2 Electrical characteristics
T
C
= 25 ° C unless otherwise specified
Symbol Parameter
Table 4: On/off-state
Test conditions
V
(BR)DSS
Drain-source breakdown voltage
V
GS
= 0 V, I
D
= 250 µA
I
DSS
Zero-gate voltage drain current
I
GSS
Gate body leakage current
V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source onresistance
V
GS
= 0 V, V
DS
= 100 V
V
GS
= 0 V, V
DS
= 100 V
T
C
= 125 °C (1)
V
DS
= 0 V, V
GS
= ± 20 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 15 A
STD20NF10T4
Min. Typ. Max. Unit
100 V
1 µA
10 µA
3
± 100 nA
4 V
0.038 0.045 Ω
2
Notes:
(1)
Defined by design, not subject to production test.
Symbol Parameter
Table 5: Dynamic
Test conditions g
fs
(1)
C iss
C oss
C rss
Q g
Q gs
Q gd
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
V
DS
= 15 V, I
D
= 15 A
V
DS
= 25 V, f = 1 MHz, V
GS
= 0 V
V
DD
= 80 V, I
D
= 30 A
V
GS
= 10 V
R
G
= 4.7 Ω
See Figure 15: "Test circuit for gate charge behavior"
Min. Typ. Max. Unit
-
-
-
-
-
-
10
1200
180
80
40
8
15
-
-
-
-
55
-
-
S pF pF pF nC nC nC
Notes:
(1) Pulsed: pulse duration = 300 μs, duty cycle 1.5%.
Symbol Parameter
Table 6: Switching times
Test conditions t d(on) t r t d(off) t f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 50 V, I
D
= 15 A, R
G
= 4.7 Ω,
V
GS
= 10 V
See Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform"
Min. Typ. Max. Unit
-
-
-
-
15
40
45
10
-
-
-
- ns ns ns ns
4/17 DocID029179 Rev 1
STD20NF10T4
Symbol
I
I t
SD
SDM
V
I
SD
Q rr rr
RRM
(1)
(2)
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 7: Source-drain diode
Test conditions
I
SD
= 20 A, V
GS
= 0 V
I
SD
= 30 A, di/dt = 100 A/µs,
V
DD
= 55 V
T j
= 150 °C
See Figure 16: "Test circuit for inductive load switching and diode recovery times"
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
Electrical characteristics
Min. Typ. Max. Unit
-
-
-
-
-
-
30
120
110
1.3
390
7.5
A
A
V ns nC
A
DocID029179 Rev 1 5/17
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STD20NF10T4
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Transconductance
Figure 7: Static drain-source on-resistance
6/17 DocID029179 Rev 1
STD20NF10T4
Figure 8: Gate charge vs. gate-source voltage
Electrical characteristics
Figure 9: Capacitance variations
Figure 10: Normalized gate threshold voltage vs. temperature
Figure 11: Normalized on-resistance vs. temperature
Figure 12: Source-drain diode forward characteristics
Figure 13: Normalized breakdown voltage vs. temperature
DocID029179 Rev 1 7/17
Test circuits
3 Test circuits
Figure 14: Test circuit for resistive load switching times
STD20NF10T4
Figure 15: Test circuit for gate charge behavior
8/17
Figure 16: Test circuit for inductive load switching and diode recovery times
Figure 17: Unclamped inductive load test circuit
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
DocID029179 Rev 1
STD20NF10T4
4
4.1
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
DPAK (TO-252) type A package information
Figure 20: DPAK (TO-252) type A package outline
DocID029179 Rev 1
0068772_A_21
9/17
Package information
Dim.
D1
E
E1 e e1
H
L
(L1)
L2
L4
R
V2 b4 c c2
D
A
A1
A2 b
STD20NF10T4
Table 8: DPAK (TO-252) type A mechanical data mm
Min. Typ.
4.95
6.40
4.60
2.16
4.40
9.35
1.00
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
2.60
0.65
0.60
4.70
2.28
0.20
0°
2.80
0.80
5.10
Max.
5.25
6.60
4.80
2.40
4.60
10.10
1.50
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
3.00
0.95
1.00
8°
10/17 DocID029179 Rev 1
STD20NF10T4
4.2 DPAK (TO-252) type C package information
Figure 21: DPAK (TO-252) type C package outline
Package information
DocID029179 Rev 1
0068772_C_21
11/17
Package information
Dim.
D1
E
E1 e
H
L
L1
L2
L3
L4
L6
θ1
θ2
V2 b4 c c2
D
A
A1
A2 b
Table 9: DPAK (TO-252) type C mechanical data mm
Min. Typ.
5.25
6.50
4.70
2.186
9.80
1.40
2.20
0.90
0.00
0.72
5.13
0.47
0.47
6.00
2.30
1.01
5.33
6.10
6.60
2.286
10.10
1.50
2.90 REF
0.90
0.60
5°
5°
0°
0.51 BSC
0.80
1.80 BSC
7°
7°
STD20NF10T4
1.25
1.00
9°
9°
8°
Max.
2.38
1.10
0.10
0.85
5.46
0.60
0.60
6.20
6.70
2.386
10.40
1.70
12/17 DocID029179 Rev 1
STD20NF10T4 Package information
Figure 22: DPAK (TO-252) recommended footprint (dimensions are in mm)
FP_0068772_21
DocID029179 Rev 1 13/17
Package information
4.3 DPAK (TO-252) packing information
Figure 23: DPAK (TO-252) tape outline
STD20NF10T4
14/17 DocID029179 Rev 1
STD20NF10T4
Figure 24: DPAK (TO-252) reel outline
Package information
Dim.
F
K0
P0
P1
P2
R
T
W
A0
B0
B1
D
D1
E
7.9
1.9
40
0.25
15.7
1.5
1.5
1.65
7.4
2.55
3.9
Table 10: DPAK (TO-252) tape and reel mechanical data
Tape Reel mm
Dim.
Min.
6.8
10.4
Max.
7
10.6
12.1
1.6
1.85
7.6
2.75
4.1
8.1
2.1
A
B
C
D
G
N
T
Base qty.
Bulk qty.
Min.
1.5
12.8
20.2
16.4
50
0.35
16.3 mm
Max.
330
13.2
18.4
22.4
2500
2500
DocID029179 Rev 1 15/17
Revision history
5 Revision history
Date
Table 11: Document revision history
Revision Changes
06-Apr-2016 1 First release.
STD20NF10T4
16/17 DocID029179 Rev 1
STD20NF10T4
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics
– All rights reserved
DocID029179 Rev 1 17/17
