STL105N4LF7AG
Automotive-grade Nchannel 40 V, 3.0 mΩ typ., 105 A
STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package
Datasheet - production data
Features
Order code V
DS
R
DS(on)
max. I
D
STL105N4LF7AG 40 V 4.5 mΩ 105 A
AEC-Q101 qualified
Among the lowest R
DS(on)
on the market
Excellent FoM (figure of merit)
Low C rss
/C iss
ratio for EMI immunity
High avalanche ruggedness
Wettable flank package
Figure 1: Internal schematic diagram
Applications
Switching applications
Description
This N-channel Power MOSFET utilizes
STripFET™ F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
Order code
STL105N4LF7AG
Table 1: Device summary
Marking Package
105N4LF7 PowerFLAT TM 5x6
Packing
Tape and reel
January 2018 DocID029251 Rev 4
This is information on a product in full production.
1/15 www.st.com
Contents
Contents
STL105N4LF7AG
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1
Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1
4.2
PowerFLAT 5x6 WF type C package information ............................. 9
Packing information ......................................................................... 12
5 Revision history ............................................................................ 14
2/15 DocID029251 Rev 4
STL105N4LF7AG
1 Electrical ratings
Symbol
V
DS
V
GS
I
D
I
D
I
DM
(1)
P
TOT
T j
T stg
Table 2: Absolute maximum ratings
Parameter
Drain-source voltage
Gate-source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Operating junction temperature range
Storage temperature range
Notes:
(1)
Pulse width limited by safe operating area.
Symbol
Table 3: Thermal data
Parameter
R thj-case
Thermal resistance junction-case
R
thj-pcb
(1)
Thermal resistance junction-pcb
Notes:
(1)
When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s.
Electrical ratings
Value
40
± 20
105
74
420
94
-55 to 175
Unit
V
V
A
A
A
W
°C
Value
1.6
32
Unit
°C/W
°C/W
DocID029251 Rev 4 3/15
Electrical characteristics
2 Electrical characteristics
(T
C
= 25 °C unless otherwise specified)
Symbol Parameter
Table 4: On/Off states
Test conditions
V
(BR)DSS
I
DSS
Drain-source breakdown voltage
Zero gate voltage drain current
I
GSS
Gate-body leakage current
V
GS(th)
Gate threshold voltage
R
DS(on)
Static drain-source on-resistance
I
D
= 1 mA, V
GS
= 0 V
V
GS
= 0 V
V
DS
= 40 V
V
GS
= ± 20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= 10 V, I
D
= 11.5 A
V
GS
= 4.5 V, I
D
= 11.5 A
Symbol Parameter
Table 5: Dynamic
Test conditions
C iss
C oss
C rss
Q g
Q gs
Q gd t f
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Symbol Parameter t d(on)
Turn-on delay time t r
Rise time t d(off)
Turn-off delay time
Fall time
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0 V
V
DD
= 20 V, I
D
= 23 A,
V
GS
= 0 to 10 V
(see Figure 14: "Test circuit for gate charge behavior" )
Table 6: Switching times
Test conditions
V
DD
= 32 V, I
D
= 11.5 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see Figure 13: "Test circuit for resistive load switching times" and Figure 18:
"Switching time waveform" )
STL105N4LF7AG
Min. Typ. Max. Unit
40
1.5
V
10 µA
100 nA
2.5 V
3.0 4.5 mΩ
4.0 8.0 mΩ
Min. Typ. Max. Unit
-
-
1500
400
-
- pF pF
- 50 - pF
-
-
-
23.3
5.5
3.8
-
-
- nC nC nC
Min. Typ. Max. Unit
-
-
-
10
6.5
43
-
-
- ns ns ns
- 15 - ns
4/15 DocID029251 Rev 4
STL105N4LF7AG
Symbol
I
SD
Source-drain current
I
SDM
(1)
Source-drain current
(pulsed)
V
SD
(2)
Source-drain current t rr
Q rr
Reverse recovery time
Reverse recovery charge
I
RRM
Parameter
Table 7: Source-drain diode
Test conditions
Reverse recovery current
I
I
SD
SD
= 23 A, V
GS
= 0 V
= 23 A, di/dt = 100 A/µs,
V
DD
= 32 V
(see Figure 15: "Test circuit for inductive load switching and diode recovery times" )
Electrical characteristics
Min. Typ. Max. Unit
- 105 A
- 420 A
-
-
-
32
27
1.3 V ns nC
- 1.7 A
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
DocID029251 Rev 4 5/15
Electrical characteristics
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area
STL105N4LF7AG
Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance
6/15 DocID029251 Rev 4
STL105N4LF7AG
Figure 8: Capacitance variations
Electrical characteristics
Figure 9: Normalized gate threshold voltage vs temperature
Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V
(BR)DSS
vs temperature
Figure 12: Source-drain diode forward characteristics
DocID029251 Rev 4 7/15
Test circuits
3 Test circuits
Figure 13: Test circuit for resistive load switching times
STL105N4LF7AG
Figure 14: Test circuit for gate charge behavior
Figure 15: Test circuit for inductive load switching and diode recovery times
Figure 16: Unclamped inductive load test circuit
Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform
8/15 DocID029251 Rev 4
STL105N4LF7AG
4
4.1
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
.
ECOPACK ® is an ST trademark.
PowerFLAT 5x6 WF type C package information
Figure 19
: PowerFLAT™ 5x6 WF type C package outline
DocID029251 Rev 4
8231817_WF_typeC_r15
9/15
Package information
Dim.
D4
D5
D6 e
E
E2
E3
C
D
D2
D3
A
A1
A2 b
E4
E5
E6
E7
E9
E10
K
L
L1
θ
Table 8: PowerFLAT™ 5x6 WF type C mechanical data
STL105N4LF7AG mm
Min. Typ. Max.
0.80
0.02
0.25
1.00
0.05
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
6.00
5.20
4.20
5.00
0.40
0.30
1.27
6.40
0.50
6.10
5.40
4.45
4.35
5.10
0.55
0.45
6.20
3.50
2.35
0.40
0.08
0.20
0.85
4.00
3.55
1.05
0.90
0.175
0°
0.325
1.00
4.20
3.70
1.00
0.275
6.60
3.70
2.55
0.60
0.28
0.45
1.15
4.40
3.85
1.35
1.10
0.375
12°
10/15 DocID029251 Rev 4
STL105N4LF7AG Package information
Figure 20
: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)
8231817_FOOTPRINT_rev15
DocID029251 Rev 4 11/15
Package information
4.2 Packing information
STL105N4LF7AG
Figure 21:
PowerFLAT™ 5x6 WF tape (dimensions are in mm)
Figure 22
: PowerFLAT™ 5x6 package orientation in carrier tape
12/15 DocID029251 Rev 4
STL105N4LF7AG Package information
Figure 23
: PowerFLAT™ 5x6 reel (dimensions are in mm)
DocID029251 Rev 4 13/15
Revision history
5
STL105N4LF7AG
Revision history
Date Revision
Table 9: Document revision history
Changes
02-May-2016
13-Sep-2016
18-Dec-2017
18-Jan-2018
1
2
3
4
First release.
Updated Section 5: "Electrical characteristics".
Datasheet promoted from preliminary data to production data.
Modified Table 4: "On/Off states" , Table 5: "Dynamic" , Table 6:
"Switching times" and Table 7: "Source-drain diode" .
Minor text changes.
Updated Figure 2: "Safe operating area" and Figure 3: "Thermal impedance" .
14/15 DocID029251 Rev 4
STL105N4LF7AG
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DocID029251 Rev 4 15/15
