STL64DN4F7AG
Datasheet
Automotive-grade dual N-channel, 40 V, 7.0 mΩ typ., 40 A, STripFET™ F7
Power MOSFET in a PowerFLAT™ 5x6 double island package
Features
Order code
STL64DN4F7AG
V
DS
40 V
R
DS(on)
max.
8.5 mΩ
I
D
40 A
Drain on rear side
1 S2
2 G2
3 S1
4 G1
D2
D1
8
7
6
5
NG14G22D1D2RSS13S21
Product status link
STL64DN4F7AG
Product summary
Order code STL64DN4F7AG
Marking
Package
Packing
64DN4F7
PowerFLAT™ 5x6 double island
Tape and reel
• AEC-Q101 qualified
• Among the lowest R
DS(on)
on the market
• Excellent FoM (figure of merit)
• Low C rss
/C iss
ratio for EMI immunity
• High avalanche ruggedness
• Wettable flank package
Applications
• Switching applications
Description
This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
DS12592 - Rev 3 - June 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
1
STL64DN4F7AG
Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
V
DS
V
GS
Drain-source voltage
Gate-source voltage
Parameter
I
D
(1)
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed at 10 μs) I
DM
(2)
P
TOT
T j
T stg
Total dissipation at T
C
= 25 °C
Operating junction temperature range
Storage temperature range
1. Drain current is limited by package, the current capability of the silicon is 64 A at 25 °C.
2. Pulse width limited by safe operating area
Table 2. Thermal data
Symbol
R thj-pcb
(1)
R thj-case
Thermal resistance junction-pcb
Thermal resistance junction-case
Parameter
1. When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s.
Value
40
±20
40
40
240
57
-55 to 175
Unit
V
V
A
A
A
W
°C
Value
32
2.6
Unit
°C/W
°C/W
DS12592 - Rev 3 page 2/16
2
DS12592 - Rev 3
STL64DN4F7AG
Electrical characteristics
Electrical characteristics
(T
C
= 25 °C unless otherwise specified).
Symbol
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Table 3. On-/off-states
Parameter Test conditions
Drain-source breakdown voltage V
GS
= 0 V, I
D
= 1 mA
Zero gate voltage drain current V
GS
= 0 V, V
DS
= 40 V
Gate-body leakage current
Gate threshold voltage
V
GS
= 20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 μA
Static drain-source on-resistance V
GS
= 10 V, I
D
= 20 A
Min.
40
2
Typ.
Max.
7.0
1
100
4
8.5
Unit
V
µA nA
V mΩ
Symbol
C iss
C oss
C rss
Q g
Q gs
Q gd
Parameter
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Table 4. Dynamic
V
DS
Test conditions
= 25 V, f = 1 MHz, V
GS
= 0 V
V
DD
= 20 V, I
D
= 40 A,
V
GS
= 0 to 10 V
(see
Figure 13. Test circuit for gate charge behavior
)
Min.
-
-
-
-
-
-
Typ.
637
240
26
9.8
3.8
3.1
Max.
-
-
-
-
-
-
Unit pF pF pF nC nC nC
Symbol t d(on) t r t d(off) t f
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 5. Switching times
Test conditions
V
DD
= 20 V, I
D
= 20 A,
R
G
= 4.7 Ω, V
GS
= 10 V
(see
Figure 12. Test circuit for resistive load switching times and
Figure 17. Switching time waveform
)
Min.
-
-
-
-
Typ.
18.8
102.6
21.4
13.3
Max.
-
-
-
-
Unit ns ns ns ns
Symbol
V
SD
(1)
t rr
Q rr
I
RRM
Parameter
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Table 6. Source-drain diode
Test conditions
I
SD
= 40 A, V
GS
= 0 V
I
D
= 40 A, di/dt = 100 A/µs
V
DD
= 32 V
(see
Figure 14. Test circuit for inductive load switching and diode recovery times
)
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Min.
-
-
-
-
Typ.
Max.
1.3
27.5
17.3
Unit
V ns nC
1.4
A page 3/16
STL64DN4F7AG
Electrical characteristics (curves)
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
I
D
(A)
GADG070620181129SOA
Operation in this area is limited by R
DS(on)
10 2 t p
= 10µs
10 1 t p
= 100µs
10 0
10 -1
10 -1
T j
T c
≤ 175 °C
= 25 °C single pulse
10 0 10 1 t p
= 1ms t p
= 10ms
V
DS
(V)
I
D
(A)
100
Figure 3. Output characteristics
GADG220520181214OCH
V
GS
= 10 V
V
GS
= 9 V V
GS
= 8 V
80
V
GS
= 7 V
60
V
GS
= 6 V
40
20
0
0 1 2 3 4
V
GS
= 5 V
5 V
DS
(V)
Figure 2. Thermal impedance
K
δ = 0.5
GADG220520181213ZTH
10 -1
δ = 0.2
δ = 0.1
δ = 0.05
δ = 0.02
δ = 0.01
Single pulse
10 -2
10 -5 10 -4 10 -3 10 -2 10 -1 t p
(s)
I
D
(A)
100
Figure 4. Transfer characteristics
GADG220520181214TCH
T
J
= -55 °C
80
60
40
V
DS
= 5 V
T
J
= 25 °C
20
0
3 4 5 6 7
T
J
= 175 °C
8 V
GS
(V)
DS12592 - Rev 3 page 4/16
4
2
0
0
8
6
Figure 5. Gate charge vs gate-source voltage
V
GS
(V)
12
GADG220520181214QVG
10
V
GS
= 20 V
I
D
= 40 A
2 4 6 8 10 Q g
(nC)
C
(pF)
Figure 7. Capacitance variations
GADG220520181215CVR f = 1MHz
10 3
C
ISS
C
OSS
10 2
10 1
0 10 20 30 40
C
RSS
V
DS
(V)
Figure 9. Normalized V
(BR)DSS
vs temperature
V
(BR)DSS
(norm.)
GADG220520181216BDV
1.08
I
D
= 1 mA
1.04
1.00
0.96
0.92
-75 -25 25 75 125 175 T j
(°C)
STL64DN4F7AG
Electrical characteristics (curves)
Figure 6. Static drain-source on-resistance
R
DS(on)
(mΩ)
8.5
GADG220520181214RID
8.0
7.5
7.0
6.5
6.0
V
GS
= 10 V
5.5
5.0
5 10 15 20 25 30 35 40 I
D
(A)
Figure 8. Normalized on-resistance vs temperature
R
DS(on)
(norm.)
GADG220520181215RON
2.0
V
GS
= 10 V
I
D
=20 A
1.5
1.0
0.5
0.0
-75 -25 25 75 125 175 T j
(°C)
Figure 10. Normalized gate-threshold voltage vs temperature
V
GS(th)
(norm.)
1.1
GADG220520181216VTH
I
D
= 250 µA 1.0
0.9
0.8
0.7
0.6
0.5
-75 -25 25 75 125 175 T j
(°C)
DS12592 - Rev 3 page 5/16
Figure 11. Source-drain diode forward characteristics
V
SD
(V)
GADG220520181216SDF
1.0
T
J
= -50 °C
0.9
T
J
= 25 °C
0.8
0.7
T
J
= 150 °C
0.6
0.5
5 10 15 20 25 30 35 40 I
SD
(A)
STL64DN4F7AG
Electrical characteristics (curves)
DS12592 - Rev 3 page 6/16
STL64DN4F7AG
Test circuits
3
Test circuits
Figure 12. Test circuit for resistive load switching times
V
GS pulse width
V
D
R
G
R
L
+
2200
μF
3.3
μF
D.U.T.
V
DD
AM01468v1
Figure 14. Test circuit for inductive load switching and diode recovery times
Figure 13. Test circuit for gate charge behavior
V
GS pulse width
2200
μF
+
1 kΩ
12 V
I
G
= CONST
2.7 kΩ
47 kΩ
47 kΩ
100 nF
100 Ω
V
DD
1 kΩ
D.U.T.
V
G
AM01469v1
Figure 15. Unclamped inductive load test circuit
G
25 Ω
D
A
D.U.T.
S
B
+
_
R
G
A A fast diode
B
B
G
100 µH
D
D.U.T.
S
3.3
µF +
1000
µF
V
DD
AM01470v1
Figure 16. Unclamped inductive waveform
V
(BR)DSS
V
D
I DM
I D
V
DD V DD
AM01472v1
V i pulse width
V
D
L
I
D
+
2200
µF
3.3
µF V
DD
D.U.T.
AM01471v1
Figure 17. Switching time waveform
0 t d(on) t on t r
90%
10%
V
GS
V
DS
90% t d(off) t off t f
90%
10%
0 10%
AM01473v1
DS12592 - Rev 3 page 7/16
4
STL64DN4F7AG
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK ® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com
. ECOPACK ® is an ST trademark.
DS12592 - Rev 3 page 8/16
4.1
STL64DN4F7AG
PowerFLAT™ 5x6 double island WF type C package information
PowerFLAT™ 5x6 double island WF type C package information
Figure 18. PowerFLAT™ 5x6 double island WF type C package outline
DS12592 - Rev 3
8256945_DI_WF_typeC_r18 page 9/16
DS12592 - Rev 3
STL64DN4F7AG
PowerFLAT™ 5x6 double island WF type C package information
Dim.
E6
E7
E8
E9
E10
K
L
L1
ϴ
E
E2
E3
E4
E5
D2
D3
D4
D5
D6
D7 e
A
A1
A2 b
C
D
Table 7. PowerFLAT™ 5x6 double island WF type C mechanical data mm
Typ.
Min.
0.80
0.02
0.25
0.30
5.80
5.00
4.15
4.05
4.80
0.25
0.15
1.68
6.00
5.20
4.20
5.00
0.40
0.30
1.27
6.40
0.20
0.85
0.55
4.00
3.55
6.20
3.50
2.35
0.40
0.08
1.05
0.90
0.175
0°
0.325
1.00
4.20
3.70
1.00
0.275
Max.
1.00
0.05
0.45
1.15
0.75
4.40
3.85
6.60
3.70
2.55
0.60
0.28
1.35
1.10
0.375
12°
0.50
6.10
5.40
4.45
4.35
5.10
0.55
0.45
1.98
page 10/16
DS12592 - Rev 3
STL64DN4F7AG
PowerFLAT™ 5x6 double island WF type C package information
Figure 19. PowerFLAT™ 5x6 double island recommended footprint (dimensions are in mm)
8256945_FP_std_R18 page 11/16
4.2
STL64DN4F7AG
PowerFLAT™ 5x6 WF packing information
PowerFLAT™ 5x6 WF packing information
T
0.30 0.05
Figure 20. PowerFLAT™ 5x6 WF tape (dimensions are in mm)
Do
+ 0.1
1.50
0.0
P2
2.0
0.05(I)
Y
Po
4.0 0.1(II)
D1
1.50 MIN
E1
1.75 0.1
R0.30
MAX
Ko (1.20±0.1)
SECTION Y-Y
P1(8.00±0.1)
Y
Ao(6.70±0.1)
(I)
(II)
(III)
Measured from centreline of sprocket hole to centreline of pocket.
Cumulative tolerance of 10 sprocket holes is ± 0.20 .
Measured from centreline of sprocket hole to centreline of pocket.
Base and bulk qua ntity 3000 pcs
8234350_TapeWF_rev_C
Pin 1 identification
Figure 21. PowerFLAT™ 5x6 package orientation in carrier tape
DS12592 - Rev 3 page 12/16
STL64DN4F7AG
PowerFLAT™ 5x6 WF packing information
PART NO.
Figure 22. PowerFLAT™ 5x6 reel (dimensions are in mm)
R0.60
W3
11.9/15.4
1.90
2.50
W2
18.4 (max)
R25.00
∅ 4.00
ØN
178(±2.0)
∅ 2.50
77 ESD LOGO
W1
12.4 (+2/-0)
06
PS
128
ØA
Ø21.2
R1.10
∅ 13.00
CORE DETAIL
All dimensions are in millimeters
A
330 (+0/-4.0)
8234350_Reel_rev_C
DS12592 - Rev 3 page 13/16
STL64DN4F7AG
Revision history
Date
28-May-2018
07-Jun-2018
08-Jun-2018
2
3
Table 8. Document revision history
Version
1
Changes
Initial release
Updated title and features in cover page.
Updated Figure 1. Safe operating area
.
Updated Section 4.1 PowerFLAT™ 5x6 double island WF type C package information
.
DS12592 - Rev 3 page 14/16
STL64DN4F7AG
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1
PowerFLAT™ 5x6 double island WF type C package information . . . . . . . . . . . . . . . . . . . . . . 8
4.2
PowerFLAT™ 5x6 WF packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
DS12592 - Rev 3 page 15/16
STL64DN4F7AG
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© 2018 STMicroelectronics – All rights reserved
DS12592 - Rev 3 page 16/16
