BALFLB-WL-09D3
Datasheet
50 Ω nominal input / conjugate match balun to QFN-2L STM32WL in high power mode, 470-510 MHz with integrated harmonic filter
Product status
BALFLB-WL-09D3
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Features
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QFN STM32WL sub-GHz wireless microcontrollers impedance matched balun and Tx harmonics filter
Optimized for QFN STM32WL sub-GHz wireless microcontrollers in high power mode and dedicated to 2-layers PCB
50 Ω nominal input / conjugate matched balun to QFN STM32WL
50 Ω nominal impedance on antenna side Tx and Rx
Deep Tx rejection harmonic filter
Low insertion loss
Small footprint
Low profile ≤ 630 μm after reflow
High RF performance
RF BOM and area reduction
ECOPACK2 compliant component
Applications
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STM32WL sub-GHz wireless microcontrollers
LPWAN-compliant radio solution, enabling the following modulations: LoRa®,
(G)FSK, (G)MSK, and BPSK
Description
STMicroelectronics BALFLB-WL-09D3 is an ultra-miniature balun. This device integrates a matching network, balun, and harmonics filter. Matching impedance has been customized for the STM32WL sub-GHz wireless microcontrollers.
It is using STMicroelectronics IPD technology on a nonconductive glass substrate, which optimizes RF performances.
DS14106 - Rev 1 - October 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
1
BALFLB-WL-09D3
Characteristics
Characteristics
Table 1. Absolute maximum ratings (T amb
= 25 °C)
Symbol Parameter
V
P
IN
ESD
Input power RF
IN
ESD ratings human body model (JESD22-A114), all I/O one at a time while others connected to
GND
ESD ratings machine model, all I/O
T
OP
Operating temperature
Value
17
Unit dBm
2000
V
200
-40 to +105 °C
Symbol
Z
RX
Z
TX
Z
RX-ANT
Z
TX-ANT
Table 2. Impedances (T amb
= 25 °C)
Parameter
Nominal differential Rx balun impedance
Nominal Tx filter impedance
Nominal Rx balun antenna impedance
Nominal Tx filter antenna impedance
Min.
-
-
-
-
Value
Typ.
Matched to STM32WL
Matched to STM32WL
50
50
Max.
-
-
-
-
Unit
Ω
Symbol f
IL
RX
IL
TX
RL
RX-ANT
RL
TX-ANT ɸ imb
A imb
Att
TX
Table 3. Electrical characteristics and RF performances (T amb
= 25 °C)
Parameter Test condition
Frequency range
Rx balun insertion loss differential mode |S
DS
| without mismatch loss
HP Tx filter insertion loss |S
21
| without mismatch loss
Rx balun input return loss differential mode |S
DD
| on antenna
Tx filter output return loss |S
11
| on antenna
RX balun phase imbalance
RX balun amplitude imbalance
Tx filter harmonic rejection levels |S
21
|
Attenuation at 2fo
Attenuation at 3fo
Attenuation at 4fo
Attenuation at 5fo
Attenuation at 6fo
Attenuation at 7fo
Attenuation at 8fo
Attenuation at 9fo
Attenuation at 10fo
52
44
36
31
27
48
53
45
46
-1.1
48
37
31
25
22
44
47
42
44
Value
Min.
Typ.
Max.
Unit
470 490 510 MHz
1.90
2.15
dB
1.65
2.00
dB
14
16
-2.8
18
18
2.8
1.1
dB dB
° dB dB
DS14106 - Rev 1 page 2/13
BALFLB-WL-09D3
RF measurements (Rx balun)
1.1
RF measurements (Rx balun)
Figure 1. Insertion loss (dB)
IL_RX
-1.9
-2.0
-2.1
-2.2
-2.3
-2.4
-2.5
-1.5
-1.6
-1.7
-1.8
470 475 480 485 490 495 500 f(MHz)
505 510
Figure 3. Amplitude imbalance (dB)
1.50
1.25
1.00
0.75
0.50
0.25
0.00
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
470
AMP_IMB
475 480 485 490 495 500 f(MHz)
505 510
Figure 2. Return loss on antenna (dB)
-10
-15
-20
-25
-30
0
-5
-35
-40
470
RL_RX_ANT
475 480 485 490 495 500 f(MHz)
505 510
Figure 4. Phase imbalance (°)
PHA_IMB
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
470 475 480 485 490 495 500 f(MHz)
505 510
DS14106 - Rev 1 page 3/13
BALFLB-WL-09D3
RF measurements (Tx filter)
1.2
RF measurements (Tx filter)
Figure 5. Transmission wide band with harmonics attenuation (dB)
IL_TX
0
-10
-20
-30
-40
-50
-60
-70
-80
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
f(GHz)
4.5
5.0
Figure 6. Insertion loss (dB)
IL_TX
-1.4
-1.5
-1.6
-1.7
-1.8
-1.9
-2.0
-1.0
-1.1
-1.2
-1.3
470 475 480 485 490 495 500 f(MHz)
505 510
Figure 7. Return loss on antenna (dB)
0
RL_TX_ANT
-5
-10
-15
-20
-25
-30
-35
-40
470 475 480 485 490 495 500 f(MHz)
505 510
DS14106 - Rev 1 page 4/13
2
2.1
BALFLB-WL-09D3
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com
. ECOPACK is an ST trademark.
CSPG 8 bumps package information
Figure 8. CSPG 8 bumps package outline (bottom view - bumps up) (in µm)
DS14106 - Rev 1
Parameter
A
A1
A2 b
D
D1
D2
D3
D4
E
E1
E2
E3 fD1 fD2 fE1 fE2
Table 4. CSPG 8 bumps dimensions (in µm)
Min.
580
180
380
230
2080
1780
500
210
630
1830
690
Typ.
630
205
400
255
2130
340
85
605
225
225
225
225
Max.
680
230
420
280
2150
1880 page 5/13
2.2
CSPG 8 bumps packing information
Figure 9. Marking
BALFLB-WL-09D3
CSPG 8 bumps packing information
Figure 10. Top view
Pad ref.
A1
A2
A3
B1
B2
C1
C2
C3
Table 5. Pads description top view (pads down)
Pad name
RFO_in
RFI_N_out
RFI_P_out
GND2
GND3
RFO_out
GND1
RFI_in
Description
Tx filter input
Differential-N Rx balun output
Differential-P Rx balun output
Ground #2
Ground #3
Tx filter output
Ground #1
Single ended Rx balun input
DS14106 - Rev 1 page 6/13
Figure 11. Tape and reel outline
BALFLB-WL-09D3
CSPG 8 bumps packing information
Note:
Ref
E1
F
K0
P0
P1
P2
W
A0
B0
Ø D0
Ø D1
0.70
3.90
3.90
1.95
7.90
Min
1.89
2.19
1.40
0.95
1.65
3.45
Table 6. Tape and reel mechanical data
Dimensions
Millimeters
0.75
4.00
4.00
2.00
8.00
Typ
1.94
2.24
1.50
1.00
1.75
3.50
More packing information is available in the application note:
• AN2348 Flip-Chip: “Package description and recommendations for use”
0.80
4.10
4.10
2.05
8.30
Max
1.99
2.29
1.60
1.05
1.85
3.55
DS14106 - Rev 1 page 7/13
3
3.1
BALFLB-WL-09D3
PCB assembly recommendations
PCB assembly recommendations
Land pattern
Figure 12. QFN-2L PCB recommended land pattern
Layout example using STM32WL in QFN package / 2 layers PCB for high power mode
Figure 13. QFN-2L PCB stack-up recommendations
DS14106 - Rev 1 page 8/13
BALFLB-WL-09D3
Stencil opening design
3.2
Stencil opening design
Figure 14. Footprint - 3 mils stencil -non solder mask defined
Copper pad diameter:
220 µm recommended
180 µm minimum
260 µm maximum
Figure 15. Footprint - 3 mils stencil - solder mask defined
Solder mask opening:
220 µm recommended
180 µm minimum
260 µm maximum
Solder mask opening:
320 µm recommended
300 µm minimum
340 µm maximum
Copper pad diameter:
320 µm recommended
300 µm minimum
3.3
3.4
3.5
Solder stencil opening:
220 µm recommended
Solder stencil opening:
220 µm recommended
Solder paste
1.
2.
3.
4.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
“No clean” solder paste is recommended.
Offers a high tack force to resist component movement during high speed.
Use solder paste with fine particles: powder particle size 20-38 µm.
Placement
1.
2.
3.
4.
5.
6.
Manual positioning is not recommended.
It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
Standard tolerance of ±0.05 mm is recommended.
1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages.
To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools.
PCB design preference
1.
2.
To control the solder paste amount, the closed via is recommended instead of open vias.
The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
DS14106 - Rev 1 page 9/13
3.6
BALFLB-WL-09D3
Reflow profile
Reflow profile
Figure 16. ST ECOPACK ® recommended soldering reflow profile for PCB mounting
250
200
Temperature (°C)
2 - 3 °C/s
240-245 °C
60 sec
(90 max)
-2 °C/s
150
100
50
-3 °C/s
-6 °C/s
0 30
0.9 °C/s
60 90 120 150
Time (s)
180 210 240 270 300
Note:
Note:
Minimize air convection currents in the reflow oven to avoid component movement.
More information is available in the application note:
• AN2348 Flip-Chip: “Package description and recommendations for use”
DS14106 - Rev 1 page 10/13
4
Ordering information
Order code
BALFLB-WL-09D3
Marking
W9
Table 7. Ordering information
Package
CSPG
Weight
3.9 mg
Base qty.
5000
BALFLB-WL-09D3
Ordering information
Delivery mode
Tape and reel
DS14106 - Rev 1 page 11/13
Revision history
Date
14-Oct-2022
Revision
1
Table 8. Document revision history
Changes
Initial release.
BALFLB-WL-09D3
DS14106 - Rev 1 page 12/13
BALFLB-WL-09D3
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© 2022 STMicroelectronics – All rights reserved
DS14106 - Rev 1 page 13/13
