- Computers & electronics
- Computer components
- System components
- Internal hard drives
- HGST
- IC25N030ATMR04
- Data Sheet
7.9.3 Host Terminating Read DMA. Hitachi IC25N080ATMR04, IC25N040ATMR04-0 - Travelstar 40GB Laptop Hard Drive 9.5mm 2.5 Inch Notebook HDD, IC25N080ATMR04-0 - 3E034 - Dell 80GB Laptop Hard Drive, Travelstar 80GN, IC25N020ATMR04, 08K0910, IC25N040ATMR04, IC25N060ATMR04, IC25N030ATMR04
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7.9.3 Host Terminating Read DMA
DMARQ tLI tMLI
DMACKtRP tACK
STOP tACK
HDMARDY-
DSTROBE
DD(15:0) tRFS tLI tIORDYZ xxx RD Data tAZ xxxxxxxxxxxxxxxxxx xxx tCS tCH
CRC xxxxxxxxxxx tZAH
Device drives DD Host drives DD
Table 30: Ultra DMA cycle timings (Host Terminating Read)
PARAMETER
DESCRIPTION
MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns)
MIN
(ns)
MAX
(ns) tRFS HDMARDY- to final DSTROBE time
Ready to pause time tRP tLI tAZ tZAH
Limited interlock time
Maximum time allowed for output drivers to release
Minimum delay time required for output
Interlock time with minimum tMLI tCS tCH
CRC word setup time at device
CRC word hold time at device tACK Hold time for DMACKtIORDYZ Maximum time before releasing
IORDY
–
160 –
0 150
–
20
20
15
5
20
–
75
10
–
20
–
–
–
–
–
125 – 100 –
0 150 0 150
100
0
–
100
100
0
–
100
85
0
–
20
20
10
5
20
–
70
10
–
–
–
–
–
20
–
–
20
20
7
5
20
–
60
10
–
–
–
–
–
20
–
–
20
20
7
5
20
–
60
10
–
–
–
–
–
20
–
–
20
20
5
5
20
–
60
10
–
–
–
–
–
20
–
–
20
20
4
4.6
20
–
50
–
75
10
–
20
–
–
–
–
Travelstar 80GN Hard Disk Drive Specification
49
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Key Features
- 60 GB 2.5" 4200 RPM Ultra-ATA/100
- HDD
- Storage drive buffer size: 8 MB
- 99 g
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Table of contents
- 15 1.0 General
- 15 1.1 Introduction
- 15 1.2 References
- 15 1.3 Abbreviations
- 17 1.4 Caution
- 18 1.5 Drive handling precautions
- 19 2.0 Outline of the drive
- 23 3.0 Fixed-disk subsystem description
- 23 3.1 Control electronics
- 23 3.2 Head disk assembly data
- 25 4.0 Drive characteristics
- 25 4.1 Formatted capacity
- 25 4.2 Data sheet
- 26 4.3 Cylinder allocation
- 27 4.4 Performance characteristics
- 27 4.4.1 Command overhead
- 27 4.4.2 Mechanical positioning
- 29 4.4.3 Operating modes
- 31 5.0 Data integrity
- 31 5.1 Data loss at power off
- 31 5.2 Write Cache
- 31 5.3 Equipment status
- 32 5.4 WRITE safety
- 32 5.5 Data buffer test
- 32 5.6 Error recovery
- 32 5.7 Automatic reallocation
- 32 5.7.1 Nonrecovered write errors
- 32 5.7.2 Nonrecoverable read error
- 32 5.7.3 Recovered read errors
- 33 5.8 ECC
- 35 6.0 Specification
- 35 6.1 Environment
- 35 6.1.1 Temperature and humidity
- 36 6.1.2 Radiation noise
- 37 6.1.3 Conductive noise
- 37 6.1.4 Magnetic fields
- 37 6.2 DC power requirements
- 38 6.2.1 Power consumption efficiency
- 38 6.3 Reliability
- 38 6.3.1 Data Reliability
- 38 6.3.2 Failure prediction (S.M.A.R.T.)
- 38 6.3.3 Cable noise interference
- 39 6.3.4 Service life and usage condition
- 39 6.3.5 Preventive maintenance
- 39 6.3.6 Load/unload
- 41 6.4 Mechanical specifications
- 41 6.4.1 Physical dimensions and weight
- 42 6.4.2 Mounting hole locations
- 42 6.4.3 Connector and jumper description
- 43 6.4.4 Mounting orientation
- 43 6.4.5 Load/unload mechanism
- 43 6.5 Vibration and shock
- 43 6.5.1 Operating vibration
- 44 6.5.2 Nonoperating vibration
- 44 6.5.3 Operating shock
- 45 6.5.4 Nonoperating shock
- 45 6.6 Acoustics
- 45 6.6.1 Sound power levels
- 46 6.6.2 Discrete tone penalty
- 46 6.7 Identification labels
- 46 6.8 Electromagnetic compatibility
- 46 6.8.1 CE mark
- 46 6.8.2 C-TICK mark
- 46 6.8.3 BSMI mark
- 47 6.8.4 MIC mark
- 47 6.9 Safety
- 47 6.9.1 UL and CSA approval
- 47 6.9.2 IEC compliance
- 47 6.9.3 German safety mark
- 47 6.9.4 Flammability
- 47 6.9.5 Secondary circuit protection
- 47 6.10 Packaging
- 49 7.0 Electrical interface specification
- 49 7.1 Cabling
- 49 7.2 Interface connector
- 50 7.3 Signal definitions
- 51 7.4 Signal descriptions
- 54 7.5 Interface logic signal levels
- 54 7.6 Reset timings
- 55 7.7 PIO timings
- 56 7.8 Multi word DMA timings
- 57 7.9 Ultra DMA timings
- 57 7.9.1 Initiating Read DMA
- 58 7.9.2 Host Pausing Read DMA
- 59 7.9.3 Host Terminating Read DMA
- 60 7.9.4 Device Terminating Read DMA
- 61 7.9.5 Initiating Write DMA
- 62 7.9.6 Device Pausing Write DMA
- 63 7.9.7 Device Terminating Write DMA
- 64 7.9.8 Host Terminating Write DMA
- 65 7.10 Drive address setting
- 66 7.11 Addressing of HDD registers
- 69 8.0 General
- 69 8.1 Introduction
- 69 8.2 Terminology
- 71 9.0 Deviations from standard
- 73 10.0 Register
- 74 10.1 Alternate Status Register
- 74 10.2 Command Register
- 74 10.3 Data Register
- 75 10.4 Device Control Register
- 75 10.5 Drive Address Register
- 76 10.6 Device/Head Register
- 76 10.7 Error Register
- 77 10.8 Features Register
- 77 10.9 LBA High Register
- 77 10.10 LBA Mid Register
- 77 10.11 Sector Count Register
- 77 10.12 Status Register
- 79 11.0 General
- 79 11.1 Reset response
- 80 11.2 Register initialization
- 81 11.3 Diagnostic and Reset considerations
- 82 11.4 Power-off considerations
- 82 11.4.1 Load/Unload
- 82 11.4.2 Emergency unload
- 82 11.4.3 Required power-off sequence
- 83 11.5 Sector Addressing Mode
- 83 11.5.1 Logical CHS addressing mode
- 83 11.5.2 LBA addressing mode
- 84 11.6 Power management features
- 84 11.6.1 Power mode
- 84 11.6.2 Power management commands
- 84 11.6.3 Standby/Sleep command completion time
- 85 11.6.4 Standby timer
- 85 11.6.5 Status
- 85 11.6.6 Interface capability for power modes
- 85 11.6.7 Initial Power Mode at Power On
- 85 11.7 Advanced Power Management (ABLE-3) feature
- 86 11.7.1 Performance Idle Mode
- 86 11.7.2 Active Idle Mode
- 86 11.7.3 Low Power Idle Mode
- 86 11.7.4 Transition time
- 87 11.8 S.M.A.R.T. Function
- 87 11.8.1 Attributes
- 87 11.8.2 Attribute values
- 87 11.8.3 Attribute thresholds
- 87 11.8.4 Threshold exceeded condition
- 87 11.8.5 S.M.A.R.T. commands
- 88 11.8.6 S.M.A.R.T. operation with power management modes
- 88 11.9 Security Mode Feature Set
- 88 11.9.1 Security mode
- 88 11.9.2 Security level
- 89 11.9.3 Password
- 89 11.9.4 Master Password Revision Code
- 92 11.9.5 Command table
- 93 11.10 Protected Area Function
- 93 11.10.1 Example for operation (In LBA Mode)
- 94 11.10.2 Set Max security extension commands
- 95 11.11 Address Offset Feature (vendor specific)
- 95 11.11.1 Enable/Disable Address Offset Mode
- 96 11.11.2 Identify Device Data
- 96 11.11.3 Exceptions in Address Offset Mode
- 97 11.12 Seek Overlap
- 97 11.13 Write Cache function
- 98 11.14 Reassign Function
- 98 11.14.1 Auto Reassign Function
- 99 11.15 48-bit Address Feature Set
- 101 12.0 Command protocol
- 101 12.1 Data In commands
- 102 12.2 Data Out Commands
- 103 12.3 Non-data commands
- 105 12.4 DMA Data Transfer commands
- 107 13.0 Command descriptions
- 111 13.1 Check Power Mode (E5h/98h)
- 112 13.2 Device Configuration Overlay (B1h)
- 112 13.2.1 DEVICE CONFIGURATION RESTORE (subcommand C0h)
- 112 13.2.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h)
- 113 13.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h)
- 113 13.2.4 DEVICE CONFIGURATION SET (subcommand C3h)
- 115 13.3 Execute Device Diagnostic (90h)
- 116 13.4 Flush Cache (E7h)
- 117 13.5 Flush Cache EXT (EAh)
- 118 13.6 Format Track (50h: vendor specific)
- 119 13.7 Format Unit (F7h: vendor specific)
- 120 13.8 Identify Device (ECh)
- 129 13.9 Idle (E3h/97h)
- 130 13.10 Idle Immediate (E1h/95h)
- 132 13.11 Initialize Device Parameters (91h)
- 133 13.12 Read Buffer (E4h)
- 134 13.13 Read DMA (C8h/C9h)
- 136 13.14 Read DMA EXT (25h)
- 138 13.15 Read Long (22h/23h)
- 140 13.16 Read Multiple (C4h)
- 142 13.17 Read Multiple EXT (29h)
- 143 13.18 Read Native Max ADDRESS (F8h)
- 144 13.19 Read Native Max ADDRESS EXT (27h)
- 145 13.20 Read Sectors (20h/21h)
- 146 13.21 Read Sector(s) EXT (24h)
- 148 13.22 Read Verify Sectors (40h/41h)
- 150 13.23 Ready Verify Sector(s) EXT (42h)
- 152 13.24 Recalibrate (1xh)
- 153 13.25 Security Disable Password (F6h)
- 154 13.26 Security Disable Password (F6h)
- 155 13.27 Security Erase Unit (F4h)
- 157 13.28 Security Freeze Lock (F5h)
- 158 13.29 Security Set Password (F1h)
- 160 13.30 Security Unlock (F2h)
- 161 13.31 Seek (7xh)
- 162 13.32 Sense Condition (F0h: vendor specific)
- 163 13.33 Set Features (EFh)
- 165 13.34 Set Max ADDRESS (F9h)
- 167 13.35 Set Max ADDRESS EXT (37h)
- 169 13.36 Set Multiple (C9h)
- 170 13.37 Sleep (E6h/99h)
- 171 13.38 S.M.A.R.T. Function Set (B0h)
- 172 13.38.1 S.M.A.R.T. Function Subcommands
- 176 13.38.2 Device Attribute Data Structure
- 181 13.38.3 Device Attribute Thresholds data structure
- 182 13.38.4 S.M.A.R.T. error log sector
- 184 13.38.5 Self-test log data structure
- 185 13.38.6 Error reporting
- 186 13.39 Standby (E2h/96h)
- 187 13.40 Standby Immediate (E0h/94h)
- 188 13.41 Write Buffer (E8h)
- 189 13.42 Write DMA (CAh/CBh)
- 191 13.43 Write DMA EXT (35h)
- 193 13.44 Write Long (32h/33h)
- 195 13.45 Write Multiple (C5h)
- 196 13.46 Write Multiple EXT (39h)
- 198 13.47 Write Sectors (30h/31h)
- 200 13.48 Write Sectors(s) EXT (34h)
- 201 13.49 Write Verify (3Ch: vendor specific)
- 203 14.0 Time-out values
- 205 15.0 Appendix
- 205 15.1 Commands Support Coverage