Extended Stop Grant State. Intel AT80571RG0601ML, AT80571RG0561ML

Features

6.2.3.2

6.2.4

6.2.4.1

6.2.4.2

6.2.5

Extended Stop Grant State

Extended Stop Grant is a low power state entered when the STPCLK# signal is asserted and Extended Stop Grant has been enabled using the BIOS.

The processor will automatically transition to a lower frequency and voltage operating point before entering the Extended Stop Grant state. When entering the low power state, the processor will first switch to the lower bus ratio and then transition to the lower VID.

The processor exits the Extended Stop Grant state when a break event occurs. When the processor exits the Extended Stop Grant state, it will resume operation at the lower frequency, transition the VID to the original value, and then change the bus ratio back to the original value.

Extended HALT Snoop State, HALT Snoop State, Extended

Stop Grant Snoop State, and Stop Grant Snoop State

The Extended HALT Snoop State is used in conjunction with the Extended HALT state. If

Extended HALT state is not enabled in the BIOS, the default Snoop State entered will be the HALT Snoop State. Refer to the sections below for details on HALT Snoop State,

Stop Grant Snoop State, Extended HALT Snoop State, Extended Stop Grant Snoop

State.

HALT Snoop State, Stop Grant Snoop State

The processor will respond to snoop transactions on the FSB while in Stop-Grant state or in HALT powerdown state. During a snoop transaction, the processor enters the HALT

Snoop State:Stop Grant Snoop state. The processor will stay in this state until the snoop on the FSB has been serviced (whether by the processor or another agent on the

FSB). After the snoop is serviced, the processor will return to the Stop Grant state or

HALT powerdown state, as appropriate.

Extended HALT Snoop State, Extended Stop Grant Snoop State

The processor will remain in the lower bus ratio and VID operating point of the

Extended HALT state or Extended Stop Grant state.

While in the Extended HALT Snoop State or Extended Stop Grant Snoop State, snoops are handled the same way as in the HALT Snoop State or Stop Grant Snoop State. After the snoop is serviced the processor will return to the Extended HALT state or Extended

Stop Grant state.

Sleep State

The Sleep state is a low power state in which the processor maintains its context, maintains the phase-locked loop (PLL), and stops all internal clocks. The Sleep state is entered through assertion of the SLP# signal while in the Extended Stop Grant or Stop

Grant state. The SLP# pin should only be asserted when the processor is in the

Extended Stop Grant or Stop Grant state. SLP# assertions while the processor is not in these states is out of specification and may result in unapproved operation.

In the Sleep state, the processor is incapable of responding to snoop transactions or latching interrupt signals. No transitions or assertions of signals (with the exception of

SLP#, DPSLP# or RESET#) are allowed on the FSB while the processor is in Sleep state. Snoop events that occur while in Sleep state or during a transition into or out of

Sleep state will cause unpredictable behavior. Any transition on an input signal before the processor has returned to the Stop-Grant state will result in unpredictable

88 Datasheet