Troubleshooting. MICROCHIP FlashPro4
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Loopback Test
Troubleshooting
Loopback Test
The console software supports all JTAG functions and a diagnostic loopback test. Note that loopback is not supported on all boards.
To perform the diagnostic test
1. Connect the loopback test board to the FlashPro.
2. Connect the FlashPro to the parallel/USB port of the PC.
3. Power-on the FlashPro.
4. From the Start menu, choose Programs > Microsemi FlashPro > Diagnotics. This opens the diagnostics console program.
5. Connect to the FlashPro by entering openport lpt1 or openport usb. The parallel port number depends on the port used to connect the FlashPro.
6. Enter test. The unit runs into self-test mode. Do not interrupt the unit during self-test mode.
Note: To see a complete list of all functions, enter help. To get a more detail description of each function, enter help <command>.
Exit Codes (SmartFusion2, IGLOO2, and RTG4)
Table 24 · Exit Codes (SmartFusion2, IGLOO2, and RTG4)
Error
Code
Exit
Code
Exit Message Possible Cause Possible Solution
0 Passed (no error)
0x8001 -24 Failure to read DSN
-
Device is in System
Controller Suspend
Mode
Check board connections
-
TRSTB should be driven High or disable "System Controller Suspend
Mode"
0x8002 5 Failure to configure device programming at 1.2/1.0 VCC voltage
0x8032 5 Device is busy
Unstable voltage level
Signal integrity issues on JTAG pins
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor JTAG supply pins during programming; measure JTAG signals for noise or reflection.
Unstable VDDIx voltage level
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
FlashPro User's Guide 189
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Error
Code
Exit
Code
0x8003 5
Exit Message
Failed to enter programming mode
0x8004 6
0x8005 10
0x8006 10
0x8007 11
Failed to verify IDCODE
Failed to program eNVM
Failed to program eNVM
Failed to verify FPGA Array
Possible Cause Possible Solution
Unstable voltage level
Signal integrity issues on JTAG pins
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor JTAG supply pins during programming; measure JTAG signals for noise or reflection.
Incorrect programming file
Incorrect device in chain
Signal integrity issues on JTAG pins
Choose the correct programming file and select the correct device in the chain.
Measure JTAG pins and noise for reflection. If TRST is left floating then add pull-up to pin.
Reduce the length of Ground connection.
Unstable voltage level.
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor JTAG supply pins during programming; measure JTAG signals for noise or reflection.
Unstable voltage level.
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor JTAG supply pins during programming; measure JTAG signals for noise or reflection.
Device is programmed with a different design.
Unstable voltage level.
Signal integrity issues on JTAG pins.
Verify the device is programmed with the correct data/design
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor JTAG supply pins during programming; measure JTAG signals for noise or reflection.
190 FlashPro User's Guide
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Exit Codes (SmartFusion2, IGLOO2, and RTG4)
Error
Code
Exit
Code
0x8008 11
Exit Message
Failed to verify eNVM
0x8009 11 Failed to verify eNVM
Possible Cause Possible Solution
Device is programmed with a different design.
Unstable voltage level.
Signal integrity issues on JTAG pins.
Verify the device is programmed with the correct data/design
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor JTAG supply pins during programming; measure JTAG signals for noise or reflection.
Device is programmed with a different design.
Unstable voltage level.
Signal integrity issues on JTAG pins.
Verify the device is programmed with the correct data/design
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor JTAG supply pins during programming; measure JTAG signals for noise or reflection.
0x8010 -35 Failed to unlock User Pass Key
1
Pass key in file does not match device
Provide a programming file with a pass key that matches pass key programmed into the device
0x8011 -35
0x8012 -35
Failed to unlock User Pass Key
2
Pass key in file does not match device
Failed to unlock debug pass key Pass key in file does not match device
Provide a programming file with a pass key that matches pass key programmed into the device
Provide a programming file with a pass key that matches pass key programmed into the device
0x8013 -18 Digest request from SPI/JTAG is protected by user pass key 1
Digest request from
SPI/JTAG is protected by user pass key 1.
Lock bit has been configured in the Debug
Policy within SPM
(Security Policy
Manager)
Provide a programming file with a pass key that matches pass key programmed into the device
0x8014 -19 Failed to verify digest Unstable voltage level Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Signal integrity issues Monitor JTAG supply pins during
FlashPro User's Guide 191
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Error
Code
Exit
Code
Exit Message Possible Cause Possible Solution on JTAG pins programming; measure JTAG signals for noise or reflection
0x8015 -20 FPGA Fabric digest verification:
FAIL
Programming bitstream components do not match components programmed
FPGA Fabric is either erased or the data has been corrupted or tampered with
Use the same programming file that was used to program the device.
0x8016 -20 eNVM_0 digest verification:
FAIL
0x8017 -20 eNVM_1 digest verification:
FAIL
Programming bitstream components do not match components programmed eNVM_0 data has been corrupted or tampered with
Use the same programming file that was used to program the device
Programming bitstream components do not match components programmed eNVM_1 data has been corrupted or tampered with
Use the same programming file that was used to program the device
0x8018 -20 User security policies segment digest verification: FAIL
Programming bitstream components do not match components programmed
User security policy segment data has been corrupted or tampered with
Use the same programming file that was used to program the device.
0x8019 -20 User key set 1 segment digest verification: FAIL
Programming bitstream components do not match components programmed
User key set 1 segment data has been corrupted or tampered with
Use the same programming file that was used to program the device.
0x801A -20 User key set 2 segment digest verification: FAIL
Programming bitstream components do not match components programmed
User key set 2 segment data has been
Use the same programming file that was used to program the device.
192 FlashPro User's Guide
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Exit Codes (SmartFusion2, IGLOO2, and RTG4)
Error
Code
Exit
Code
Exit Message Possible Cause Possible Solution
0x801B -20
0x801C -20
0x801D -21
0x801E -21
Factory row and factory key segment digest verification:
FAIL
Fabric configuration segment digest verification: FAIL
Device security prevented operation
Device security prevented operation corrupted or tampered with
Programming bitstream components do not match components programmed
Factory row and factory key segment data has been corrupted or tampered with
Use the same programming file that was used to program the device.
Programming bitstream components do not match components programmed.
Fabric configuration segment data has been corrupted or tampered with
Use the same programming file that was used to program the device.
The device is protected with user pass key 1 and the bitstream file does not contain user pass key 1.
User pass key 1 in the bitstream file does not match the device.
Run DEVICE_INFO to view security features that are protected.
Provide a bitstream file with a user pass key 1 that matches the user pass key 1 programmed into the device.
The device is protected with user pass key 1 and the bitstream file does not contain user pass key 1.
User pass key 1 in the bitstream file does not match the device.
Run DEVICE_INFO to view security features that are protected.
Provide a bitstream file with a user pass key 1 that matches the user pass key 1 programmed into the device.
0x801F -22 Authentication Error
Invalid/Corrupted programming file
Bitstream file has been corrupted
Bitstream was incorrected generated
Regenerate bitstream file
0x8020 -22 Authentication Error
Invalid/Corrupted programming file
Bitstream file has been corrupted
Bitstream was incorrected generated
Regenerate bitstream file
0x8021 -23 Authentication Error
Invalid/Corrupted encryption key
File contains an encrypted key that does
Provide a programming file with an encryption key that matches that on the
FlashPro User's Guide 193
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Error
Code
Exit
Code
Exit Message Possible Cause Possible Solution not match the device device
File contains user encryption key, but device has not been programmed with the user encryption key
First program security with master programming file, then program with user encryption 1/2 field update programming files
Device has user encryption key 1/2 enforced and you are attempting to reprogram security settings
You must first ERASE security with the master security file, then you can reprogram new security settings
0x8022 -23 Authentication Error
Invalid/Corrupted encryption key
File contains an encrypted key that does not match the device
Provide a programming file with an encryption key that matches that on the device
File contains user encryption key, but device has not been programmed with the user encryption key
First program security with master programming file, then program with user encryption 1/2 field update programming files
Device has user encryption key 1/2 enforced and you are attempting to reprogram security settings
You must first ERASE security with the master security file, then you can reprogram new security settings
0x8023 -24 Authentication
Error
Back level not satisfied
Design version is not higher than the backlevel programmed device
Generate a programming file with a design version higher than the back level version
0x8024 -24 Authentication
Error
Back level not satisfied
Design version is not higher than the backlevel programmed device
Generate a programming file with a design version higher than the back level version
0x8025 -25
0x8026 -25
Authentication Error
DSN binding mismatch
Authentication Error
DSN binding mismatch
0x8027 -26 Authentication Error
Insufficient device capabilities
0x8028 -26 Authentication Error
DSN specified in programming file does not match the device being programmed
Use the correct programming file with a
DSN that matches the DSN of the target device being programmed
DSN specified in programming file does not match the device being programmed
Use the correct programming file with a
DSN that matches the DSN of the target device being programmed
Device does not support the capabilities specified in programming file
Generate a programming file with the correct capabilities for the target device
Device does not Generate a programming file with the
194 FlashPro User's Guide
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Exit Codes (SmartFusion2, IGLOO2, and RTG4)
Error
Code
Exit
Code
Exit Message Possible Cause Possible Solution
Insufficient device capabilities support the capabilities specified in programming file correct capabilities for the target device
0x8029 -27 Authentication Error
Incorrect DEVICEID
Incorrect programming file
Incorrect device in chain
Signal integrity issues on JTAG pins
Choose the correct programming file and select the correct device in chain
Measure JTAG pins and noise or reflection. If TRST is left floating, then add pull-up to pin
Reduce the length of ground connection
0x802A -27 AuthenticationError
Incorrect DEVICEID
Incorrect programming file
Incorrect device in chain
Signal integrity issues on JTAG pins
Choose the correct programming file and select the correct device in chain
Measure JTAG pins and noise or reflection
If TRST is left floating, then add pull-up to pin Reduce the length of ground connection
Generate programming file with latest version of Libero SoC
0x802B -28 Authentication Error
Unsupported bitstream protocol version
Old programming file
0x802C -28 Authentication Error
Unsupported bitstream protocol version
Old programming file Generate programming file with latest version of Libero SoC
0x802F -30 JTAG interface is protected by
UPK1
0x8030 -31 Authentication Error
Invalid or inaccessible Device
Certificate
Invalid or no UPK1 is provided
User needs to provide correct UPK1 to unlock device.
M2S090 Rev. A or
M2S150 Rev. A: Either certificate is corrupted or the user hasn't provided the application code in the eNVM or provided invalid application code
FAB_RESET_N is tied to ground
User can program a valid application code. This can be done with
SoftConsole.
FAB_RESET_N should be tied to HIGH
0x8031 -31 Authentication Error
Invalid or inaccessible Device
Certificate
M2S090 Rev. A or
M2S150 Rev. A: Either certificate is corrupted or the user hasn't provided the application code in the eNVM or provided invalid application code
FAB_RESET_N is tied
User can program a valid application code. This can be done with
SoftConsole
AB_RESET_N should be tied to HIGH
FlashPro User's Guide 195
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Error
Code
Exit
Code
Exit Message Possible Cause to ground
Possible Solution
SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for
Software v8.6 and Above
The table below lists exit codes for SmartFusion, IGLOO, ProASIC3 and Fusion devices in software v8.6
and ABOVE only. See the Device Exit Codes for pre-v8.6 Software help topic for exit codes for older
versions.
Note: Exit codes with positive integers are reserved for current and future standard EXIT codes of the STAPL standard. Exit codes with negative integers are reserved for vendor-specific EXIT codes.
Table 25 · Exit Codes for SmartFusion, IGLOO, ProASIC3 and Fusion Family Devices in Software v8.6 and Above
ERROR_CODE Exit
Code
Exit
Message
Possible Cause Possible Solution
0
1
Passed
(no error)
A physical chain does not match the expected set up from the STAPL file.
Also known as
Checking
Chain
Error.
Physical chain configuration has been altered. Something has become disconnected in the chain.
The specific IR length of non-
Microsemi devices may be incorrect.
The order of the specified chain may be incorrect.
0x8052
0x801D
0x8053
5
6
Failed to enter programmin g mode.
Unstable VPUMP voltage level.
Unstable VCC
Signal integrity issues on JTAG pins.
Device is in FlashFreeze mode
(ProASICL or IGLOO devices)
Older software or programming file used.
Failed to verify
Incorrect programming file
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Disble the FlashFreeze pin (ProASICL or
IGLOO devices)
Generate STAPL file with the latest version of Designer/FlashPro.
Use latest version of FlashPro software.
Choose the correct programming file and select the correct device in chain.
196 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for Software v8.6 and Above
ERROR_CODE
0x8005
0x8009
0x800B
0x8008
0x800A
0x800C
0x800D
0x800E
Exit
Code
Exit
Message
IDCODE
6
6
Possible Cause
Incorrect device in chain
Signal integrity issues on JTAG pins
Possible Solution
Measure JTAG pins and noise or reflection. If TRST is left floating then add pull-up to pin.
Reduce the length of ground connection.
Failed to verify AES
Sec.
Programming file generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro. Use latest version of FlashPro software.
Try again at a slower TCK.
Contact Microsemi Technical Support.
Failed to verify
IDCODE.
Target is an
M7 device
File is not for M7, but target device is M7
Signal integrity issues on JTAG pins.
Check that the target device is M7 enabled.
Make sure that the programming file you generated is for an M7-enabled device.
Measure JTAG pins, noise and reflection.
6
6
6
6
Failed to verify
IDCODE
Target is an
M1 device
Files not for M1, but target device is M1.
Signal integrity issues on JTAG pins
Check that the target device is M1 enabled.
Make sure the programming file generated is for an M1-enabled device.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Failed to verify
IDCODE.
Core enabled device detected
File is not for target device.
Signal integrity issues on JTAG pins
Check the target device; make sure the programming file generated is matches the target device.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Failed to verify
IDCODE.
The target is not M7 device
File is for M7 but target device is not M7.
Signal integrity issues on JTAG pins.
Check that the target device is not M7 enabled.
Make sure that the programming file generated is for non-M7 enabled device.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Failed to verify
IDCODE.
File is for M1, but target device is not M1.
Check that the target device is not M1 enabled.
FlashPro User's Guide 197
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ERROR_CODE
0x8006
0x801E
0x8057
0x8058
0x805D
Exit
Code
Exit
Message
6
Target is not an M1 device
Possible Cause
Signal integrity issues on JTAG pins
Possible Solution
Make sure that the generated programming file is for non-M1 enabled device.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Failed to verify
IDCODE.
Target is not a P1 device
File is not for P1, but target device is a P1 device.
Signal integrity issues on JTAG pins
Check that the target device is P1 enabled.
Make sure programming file generated is for M1 enabled device.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
6 A3PE600
Engineering
Sample
Device
Detected.
This device is supported with pre-v8.3
SP1 STAPL files only
Contact Microsemi Technical Support
8 Failed Erase
Operation.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
10 Failed to program
FPGA array at row <row number>.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
10 Failed to Unstable VPUMP voltage level. Monitor related power supplies that cause
198 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for Software v8.6 and Above
ERROR_CODE
0x805E
0x807B
Exit
Code
Exit
Message
Possible Cause Possible Solution enable
FPGA Array. Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins. the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
0x80
95
0x80
96
0x80
97
10 Failed to disable
FPGA Array.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
0x8061
0x8062
0x801B
0x801C
0x806C
0x806D
0x806E
10 Failed to program
FlashROM.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
10 Error programmin g Embedded
Flash
Memory
Block
(EFMB)
Unstable VCC_NVM/VCC_OSC voltage level (Fusion only)
Unstable
VCC_ENVM/VCC_RCOSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins
NVM corruption is possible when writing from your design; check the NVM status for confirmation.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Reset signal is not properly tied off in your design.
Inspect device using Device Debug.
0x807D
0x807E
10 Error programmin g system init
Unstable VCC
Unstable VCC_OSC (Fusion only)
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi
FlashPro User's Guide 199
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ERROR_CODE
0x8069
0x806A
0x806B
0x808E
0x808F
0x8090
0x8091
0x807F
0x8080
0x8059
0x805B
0x8060
Exit
Code
Exit
Message and boot clients
Possible Cause
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins
Possible Solution specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Inspect device using Device Debug.
10 Error programmin g Embedded
Flash
Memory
Block
(EMFB)
Programming file generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software
Try again at a slower TCK
Inspect device using Device Debug.
Contact Microsemi Technical Support
10 Error programmin g Embedded
Flash
Memory
Block
(EFMB)
Try reprogramming
Contact Microsemi Technical Support
10 Error programmin g system init and boot clients
Programming file generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software
Try again at a slower TCK
Inspect device using Device Debug.
Contact Microsemi Technical Support
11 Verify 0 failed at row
<row number>
Verify 1 failed at row
<row number>.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
11
Failed to verify
FlashROM at row
Device is programmed with a different design.
Unstable VPUMP voltage level.
Run VERIFY_DEVICE_INFO to verify the device is programmed with the correct data/design.
Monitor related power supplies that cause
200 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for Software v8.6 and Above
ERROR_CODE
0x8075
0x8076
0x8077
0x8085
0x8086
Exit
Code
Exit
Message
Possible Cause Possible Solution
<FlashROM row number>.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins. the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
11 Failed to verify
Embedded
Flash
Memory
Block
(EFMB)
Device is programmed with a different design.
Unstable VCC
Unstable VCC_NVM/VCC_OSC
(Fusion only)
Unstable
VCC_ENVM/VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
The EFMB data was modified in your FPGA design after programming. This could have occurred during standalone verify.
The target EFMB is locked with
FlashLock when running ACTION
PROGRAM_NVM_ACTIVE_ARR
AY or
VERIFY_NVM_ACTIVE_ARRAY.
Verify the device is programmed with the correct data/design.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Measure JTAG pins, and noise or reflection.
Run DEVICE_INFO to confirm if the target EFMB block is locked with
FlashLock (pass key). If the target EFMB block is locked, then you must unlock it by erasing the security and then reprogramming with the desired security settings. After unlocking the target EFMB block attempt to rerun the target ACTION.
Inspect device using Device Debug.
11 Failed to verify system init and boot clients
Device is programmed with a different design.
Unstable VCC
Unstable VCC_NVM/VCC_OSC
(Fusion only)
Unstable
VCC_ENVM/VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
The EFMB data was modified in your FPGA design after programming. This could have occurred during standalone verify.
Verify the device is programmed with the correct data/design.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Measure JTAG pins, and noise or reflection.
Run DEVICE_INFO to confirm if the target EFMB block is locked with
FlashLock (pass key). If the target EFMB block is locked, then you must unlock it by erasing the security and then reprogramming with the desired security
FlashPro User's Guide 201
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ERROR_CODE
0x8072
0x8073
0x8074
0x8083
0x8084
0x8014
0x8015
0x805A
0x805C
Exit
Code
Exit
Message
Possible Cause Possible Solution
The target EFMB is locked with
FlashLock when running ACTION
PROGRAM_NVM_ACTIVE_ARR
AY or
VERIFY_NVM_ACTIVE_ARRAY. settings. After unlocking the target EFMB block attempt to rerun the target ACTION.
Inspect device using Device Debug.
11 Failed to verify
Embedded
Flash
Memory
Block
(EFMB)
Programming file generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software
Try again at a slower TCK
Inspect device using Device Debug.
Contact Microsemi Technical Support
11 Failed to verify system init and boot clients
Programming file generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software
Try again at a slower TCK
Inspect device using Device Debug.
Contact Microsemi Technical Support
11 Failed to verify calibration data
Unstable VCC
Unstable VCC_NVM/VCC_OSC
(Fusion only)
Unstable
VCC_ENVM/VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Try reprogramming.
Workaround: Disable optional procedure
CHECK_AND_BACKUP_CALIB
11 Verify 0 failed at row
<row number> .
Verify 1 failed at row
<row number>
Device is programmed with a different design
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Run VERIFY_DEVICE_INFO to verify the device is programmed with the correct data/design.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming;
202 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for Software v8.6 and Above
ERROR_CODE
0x8063
0x8068
0x805F
0x8065
0x8066
Exit
Code
Exit
Message
14 Failed to program
Silicon
Signature.
Failed to program security lock settings.
Possible Cause
Signal integrity issues on JTAG pins
Signal integrity issues on JTAG pins.
Possible Solution measure JTAG signals for noise or reflection.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
-18 Failed to authenticate the encrypted data.
Incorrect AES key.
Signal integrity issues on JTAG pins.
Generate a programming file with the correct AES key.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
-20 Failed to verify
FlashROM at row
<FlashROM row number>.
Programming file generated with an older version of software
Device is programmed with a different design.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software.
Program with the correct data/design.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Measure JTAG pins and noise or reflection.
-22 Failed to program pass key.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
-23 Failed to program
AES key.
Unstable VPUMP voltage level.
Unstable VCC
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet
FlashPro User's Guide 203
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ERROR_CODE
0x8055
0x8056
0x802A
0x8025
0x802B
0x802D
0x8024
0x8026
Exit
Code
Exit
Message
Possible Cause Possible Solution
-24 Failed to program
UROW.
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins. for more information on transient specifications.
Measure JTAG pins and noise or reflection.
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
Make sure you mounted 0.01
µF and
0.33
µF caps on Vpump (close to the pin).
-27 FlashROM
Write/Erase is protected by the passkey.
A valid passkey needs to be provided.
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Provide a programming file with a passkey that matches the passkey programmed into the device.
-28 FPGA Array
Write/Erase is protected by the passkey.
A valid pass key needs to be provided.
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Provide a programming file with a passkey that matches the passkey programmed into the device.
-29 FlashROM
Read is protected by passkey.
A valid passkey needs to be provided.
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Provide a programming file with a pass key that matches the passkey programmed into the device
-30 FPGA Array verification is protected by a passkey.
A valid
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Provide a programming file with a passkey that matches the passkey programmed into the device.
204 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for Software v8.6 and Above
ERROR_CODE
0x804B
0x8001
0x8007
0x8000
0x8020
0x8022
0x8028
0x802C
0x802F
0x801F
0x804A
0x802E
0x8030
Exit
Code
Exit
Message passkey needs to be provided.
-31 Failed to verify AES key.
Possible Cause Possible Solution
AES key in the file does not match the device.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Unstable JTAG/VPUMP voltage level.
Provide a programming file with an AES key that matches the AES key programmed into the device.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
-31 Failed to verify AES key.
Programming file generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software.
Try again at a slower TCK
Contact Microsemi Technical Support
-33 FPGA Array encryption is enforced. A programmin g file with encrypted
FPGA array data needs to be provided.
File contains unencrypted array data, but device contains AES key.
-34 FlashROM encryption is enforced. A programmin g file with encrypted
FlashROM data needs to be provided.
File contains unencrypted
FlashROM data, but the device contains an AES key.
-35 Failed to match pass key.
Pass key in file does not match pass key in device.
Provide a programming file with an encrypted FPGA Array data.
Provide a programming file with an encrypted FlashROM data.
Provide a programming file with a pass key that matches the pass key programmed into the device.
-36 FlashROM
Encryption is
File contains encrypted
FlashROM, but device encryption
Regenerate security programming file with proper AES key.
FlashPro User's Guide 205
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ERROR_CODE
0x8021
0x8023
0x8027
0x8029
0x8067
0x806F
0x8070
0x8071
0x8081
0x8082
0x8089
Exit
Code
Exit
Message
Possible Cause not enforced.
Cannot is not enforced for FlashROM guarantee valid AES key present in target device.
Unable to proceed with
Encrypted
FlashROM programmin g.
Possible Solution
Program device security.
Retry programming FlashROM with encrypted programming file.
-37 FPGA Array
Encryption is not enforced.
Cannot guarantee valid AES
File contains encrypted FPGA
Array, but the device encryption is not enforced for FPGA Array. key present in target device.
Unable to proceed with
Encrypted
FPGA Array verification.
Regenerate security programming file with proper AES key.
Program device security.
Retry programming FPGA Array with encrypted programming file.
-38 Failed to program pass key.
-39 ERROR: 2 or more errors found on this page
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins.
Bad device.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Measure JTAG pins and noise or reflection.
Unstable VCC_NVM/VCC_OSC voltage (Fusion only)
Unstable
VCC_ENVM/VCC_ROSC
(SmartFusion only)
NVM reset signal is floating in user design
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Bias NVM reset to a logic state in user design.
206 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for Software v8.6 and Above
ERROR_CODE
0x8010
0x8013
0x8078
0x8079
0x807A
0x8087
0x8088
0x8002
0x8003
0x8093
0x8004
0x8049
0x8054
0x8033
0x8038
Exit
Code
Exit
Message
Possible Cause Possible Solution
2 or more ECC errors found when reading the eNVM
Try reprogramming.
-39 ERROR: 2 or more errors found on this page.
2 or more ECC errors found when reading the master calibration data
The master calibration data has been corrupted. Try restoring master calibration from backup, if it exists, by running RECOVER_CALIB.
Workaround: Disable optional procedure
-39 ERROR: 2 or more errors found on this page.
2 or more ECC errors found when verifying the backup calibration
Rerun action to attempt to write backup calibration again.
Workaround: Disable optional procedure
-40 Embedded
Flash
Memory
Block MAC
Failure.
-42 Failed to verify security settings.
Data in the file is encrypted with a different AES key than the device.
Verify the programming file is generated from the latest version of
Designer/FlashPro.
File security settings do not match device.
Provide a programming file with security setting that match the security settings programmed into the device.
-42 Failed to verify eNVM/EFMB client JTAG protection settings
Device eNVM/EFMB client JTAG protection settings are not programmed or are programmed with different settings
Verify the device is programmed with the correct eNVM/EFMB client JTAG protection settings
-43 Failed to verify design information.
File checksum and design name do not match the device.
Verify the device is programmed with the correct data and design.
-44 Failed to verify AES key.
The AES key in the file does not match the AES key in the device.
File does not contain an AES key and the device is secured with an
AES key.
Provide a programming file with an AES key that matches the AES key programmed into the device.
-45 Device package does not match the programmin g file.
Programming file was generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software.
-46 Embedded
Flash
File contains no pass key or incorrect pass key but EFMB read
Provide a programming file with the correct pass key.
FlashPro User's Guide 207
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ERROR_CODE
0x803D
0x8042
0x8045
0x8046
0x8047
0x8048
0x8034
0x8039
0x803E
0x8043
0x8032
0x8037
0x803C
0x8041
0x8031
0x8036
0x803B
0x8040
Exit
Code
Exit
Message
Possible Cause
Memory
Block X
Read is protected by pass key. A valid pass key needs to be provided. is secured with a pass key.
Possible Solution
-46 Embedded
Flash
Memory
Block
(EFMB) block X
Read is not protected by pass key.
EFMB content is not secure after encrypted programmin g.
Unable to proceed with encrypted
NVM programmin g.
File contains encrypted EFMB for block X but the device encryption is not enforced for EFMB block X.
Regenerate security programming file with the proper AES key.
Program device security. Retry programming with EFMB block X with encrypted programming file.
-47 Embedded
Flash
Memory
Block
(EFMB) block X encryption is enforced. A programmin g file with encrypted
EFMB data needs to be provided.
The programming EFMB data is not encrypted, but the device contains an AES key with encryption enforced.
-48 Embedded
Flash
Memory
Block
(EFMB) block X
File contains no pass key or incorrect pass key, but device is secured with a pass key.
Provide a programming file with encrypted EFMB data.
Provide a programming file with a passkey that matches the passkey programmed into the device.
208 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for Software v8.6 and Above
ERROR_CODE
0x8035
0x803A
0x803F
0x8044
0x801A
8x804E
0x804F
Exit
Code
Exit
Message
Write is protected by pass key.
A valid pass key needs to be provided.
Possible Cause Possible Solution
-49 Embedded
Flash
Memory
Block
(EFMB) block X
Encryption is not enforced.
Cannot guarantee valid AES key present in target device.
Unable to proceed with
Encrypted
EFMB programmin g.
File contains encrypted EFMB for block X, but the device encryption is not enforced for EFMB block X.
Regenerate security programming file with proper AES key.
Program device security. Retry programming EFMB block X with encrypted programming file.
No backup calibration copy has been made or the backup copy has been corrupted
If master copy is still intact, rerun Action to create backup calibration copy.
Workaround: Disable optional procedure
CHECK_AND_BACKUP_CALIB
-50 No backup calibration data found or backup calibration data has been corrupted
-51 Failed to access
Embedded
Flash
Memory.
(AFS600 only)
This version of the silicon does not support programming of the
Embedded Flash Memory Block while the FPGA Array is active.
If programming the EFMB while the
FPGA is active is not required, then use actions PROGRAM_NVM or
VERIFY_NVM. Otherwise, use latest revision of silicon.
-52 Failed to access
Embedded
Flash
Memory.
(AFS1500 only)
This version of the silicon does not support programming of the
Embedded Flash Memory Block while the FPGA Array is active.
If programming the EFMB while the
FPGA is active is not required, then use actions PROGRAM_NVM or
VERIFY_NVM. Otherwise, use latest revision of silicon.
FlashPro User's Guide 209
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ERROR_CODE
0x8050
0x8051
0x808A
0x8094
0x808B
Exit
Code
Exit
Message
-53 Failed to access
Embedded
Flash
Memory.
(AFS1500 only)
-54 Failed to access
Embedded
Flash
Memory.
Possible Cause Possible Solution
This version of the silicon does not support programming block 3 of the EFMBs while the FPGA
Array is active.
If programming the EFMB while the
FPGA is active is not required, then use actions PROGRAM_NVM or
VERIFY_NVM. Otherwise, use EFMB blocks 0, 1, or 2, but do not use block 3.
FPGA Array is accessing the target EFMB block while attempting programming.
NVM reset signal is stuck in design.
Unstable VCC
MSS Clock is disabled during programming.
MSS Clock is not properly routed to the correct pin.
If programming the EFMB while the
FPGA is active is not required, then use actions PROGRAM_NVM or
VERIFY_NVM. Otherwise, check the
FPGA design or use a different EFMB block that is not being accessed. Check if target EFMB block logic is tied to reset.
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Verify that the NVM reset signal in the design is not stuck.
Verify the MSS clock is enabled during programming.
If the MSS clock is defined as an external
I/O, then verify that it is properly routed to the correct pin.
-55 Failed to read
Embedded
Flash
Memory
Block
(EFMB)
-55 Failed to read
Embedded
Flash
Memory
Block
(EFMB)
Programming file generated with an older version of software
Generate STAPL file with the latest version of Designer/FlashPro; use the latest version of FlashPro software
Try again at a slower TCK
Inspect device using Device Debug
Contact Microsemi Technical Support
Unstable VPUMP voltage level.
Unstable VCC
Unstable VCC_OSC (Fusion only)
Unstable VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins
Monitor related power supplies that cause the issue during programming; check for transients outside of Microsemi specifications. See your device datasheet for more information on transient specifications.
Monitor VJTAG during programming; measure JTAG signals for noise or reflection.
210 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for pre-v8.6 Software
ERROR_CODE
0x808C
0x8011
0x8012
0x808D
0x8092
Exit
Code
Exit
Message
-55 Failed to read
Embedded
Flash
Memory
Block
(EFMB)
-56 Failed to read calibration data
-56 Failed to read calibration data
Possible Cause
Internal errror
Unstable VCC
Unstable VCC_NVM/VCC_OSC
(Fusion only)
Unstable
VCC_ENVM/VCC_ROSC voltage level (SmartFusion only)
Signal integrity issues on JTAG pins
Possible Solution
Contact Microsemi Technical Support
Try reprogramming.
Workaround: Disable optional procedure
CHECK_AND_BACKUP_CALIB
Monitor related power supplies that cause the issue during programming; check for transients outside of
Microsemi specifications. See your device datasheet for more information on transient specifications.
Measure
JTAG voltages, noise, and reflection.
Try reprogramming.
Workaround: Disable optional backup procedure
CHECK_BACKUP_CA
LIB
-57 eNVM/EFMB is protected by a Pass
Key; you must provide a valid Pass
Key
File contains no Pass Key and device is secured with a Pass Key
Pass Key in the file does not match device
Provide a programming file with a Pass
Key that matches the Pass Key programmed into the device
SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for pre-v8.6 Software
The table below lists exit codes for SmartFusion, IGLOO, ProASIC3 and Fusion devices in pre-v8.6 software
help topic for exit codes for older versions.
Note: Exit codes with positive integers are reserved for current and future standard EXIT codes of the STAPL standard. Exit codes with negative integers are reserved for vendor-specific EXIT codes.
FlashPro User's Guide 211
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Exit Message
Table 26 · Exit Codes for SmartFusion, IGLOO, ProASIC3 and Fusion Family Devices in pre-v8.6
Software
Possible Cause Possible Solution Exit
Code
0
1
5
6
Passed (no error).
A physical chain does not match the expected set up from the STAPL file.
Also known as
Checking Chain
Error.
Physical chain configuration has been altered. Something has become disconnected in the chain.
The specific IR length of non-
Microsemi devices may be incorrect.
The order of the specified chain may be incorrect.
Failed to enter programming mode.
Unstable VPUMP voltage level.
Signal integrity issues on JTAG pins.
Older software or programming file used.
Monitor VPUMP voltage during programming
Measure JTAG voltages, noise, and reflection.
Generate STAPL file with the latest version of
Designer/FlashPro.
Use latest version of
FlashPro software.
Failed to verify
IDCODE. Signal integrity issues on JTAG pins.
Measure JTAG pins, noise and reflection.
8 Failed Erase
Operation.
Signal integrity issues on JTAG pins.
10
10
10
Failed to program
FPGA array at row
", rowNumber,"."
Failed to enable
FPGA Array.
Failed to program
FlashROM.
Signal integrity issues on JTAG pins.
Signal integrity issues on JTAG pins.
Signal integrity issues on JTAG pins.
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise, and reflection.
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise, or reflection.
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise, or reflection.
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise, and reflection.
212 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for pre-v8.6 Software
Exit
Code
11
14
Exit Message
FlashROM at row",from rowNumber-1.
Possible Cause
Verify 0 failed at row",rowNumber,"." different design.
Verify 1 failed at
Device is programmed with a row",rowNumber,"." Signal integrity issues on JTAG
Failed to verify pins.
Failed to program
Silicon Signature.
Failed to program security lock settings.
Signal integrity issues on JTAG pins.
-18 Failed to authenticate the encrypted data.
Incorrect AES key.
Signal integrity issues on JTAG pins.
Possible Solution
-20
-22
-23 Failed to program
AES key.
Unstable VPUMP voltage level.
Signal integrity issues on JTAG pins.
-24
Failed to verify
FlashROM at row
",
FRomRowNumber-
1.
Failed to program pass key.
Failed to program
UROW.
Device is programmed with a different design.
Signal integrity issues on JTAG pins.
Unstable VPUMP voltage level.
Signal integrity issues on JTAG pins.
Unstable VPUMP voltage level.
Signal integrity issues on JTAG pins.
Run
VERIFY_DEVICE_INFO to verify the device is programmed with the correct data/design.
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise and reflection .
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise, and reflection.
Generate a programming file with the correct AES key.
Measure JTAG voltages, noise and reflection
Program with the correct data/design.
Monitor VPUMP level during programming.
Measure JTAG pins and noise or reflection.
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise, and reflection.
Monitor VPUMP voltage during programming.
Measure JTAG pins and noise or reflection.
Monitor VPUMP voltage during programming.
Measure JTAG voltages, noise, and reflection.
Make sure you mounted
FlashPro User's Guide 213
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Exit
Code
Exit Message Possible Cause Possible Solution
-25 Failed to enter programming mode
Signal integrity issues on JTAG pins.
0.01ìF and 0.33ìF caps on Vpump (close to the pin).
Measure JTAG voltages, noise, and reflection.
-26 Failed to enter programming mode
-27 FlashROM
Write/Erase is protected by the passkey.
A valid passkey needs to be provided.
-28 FPGA Array
Write/Erase is protected by the passkey.
A valid pass key needs to be provided.
Signal integrity issues on JTAG pins.
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Provide a programming file with a passkey that matches the passkey programmed into the device.
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Measure JTAG voltages, noise, and reflection.
Provide a programming file with a passkey that matches the passkey programmed into the device.
-29 FlashROM Read is protected by passkey.
A valid passkey needs to be provided.
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Provide a programming file with a pass key that matches the passkey programmed into the device
-30 FPGA Array verification is protected by a passkey.
A valid passkey needs to be provided.
-31 Failed to verify
AES key.
File contains no passkey and device is secured with a passkey.
Passkey in the file does not match device.
Provide a programming file with a passkey that matches the passkey programmed into the device.
AES key in the file does not match the device.
Unstable JTAG/VPUMP voltage level.
Provide a programming file with an AES key that matches the AES key programmed into the device.
Monitor
VPUMP/VJTAG voltage during programming.
Measure JTAG voltages, noise, and
214 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for pre-v8.6 Software
Exit
Code
Exit Message Possible Cause Possible Solution
-32 Failed to verify
IDCODE.
Target is an M7 device reflection.
File is not for M7, but target device is an M7.
Signal integrity issues on JTAG pins.
Check that the target device is M7 enabled.
Make sure programming file generated is for M7 enabled device.
Measure JTAG pins , noise, and reflection.
-32 Failed to verify
IDCODE.
Target is an M1 device
File is not for M1, but target device is an M1 device.
Signal integrity issues on JTAG pins.
Check that the target device is M1 enabled.
Make sure programming file generated is for M1 enabled device.
Measure JTAG pins, noise, and reflection.
-32
-32
Failed to verify
IDCODE.
Core enabled device detected
Failed to verify
IDCODE.
The target is not an M7 device
-32 Failed to verify
IDCODE.
The target is not an
M1 device
File is not for target device.
Signal integrity issues on JTAG pins
Check the target device.
Make sure programming file generated for target device.
Measure JTAG voltages, noise, and reflection.
File is for M7, but target device is not M7.
Signal integrity issues on JTAG pins.
File is for M1, but target device is not an M1 device.
Signal integrity issues on JTAG pins.
Check that the target device is not M7 enabled.
Make sure programming file generated is for non
M7 enabled device.
Measure JTAG voltages, noise, and reflection.
Check that the target device is not M1 enabled.
Make sure programming file generated is for non M1 enabled device.
Measure JTAG voltages, noise and reflection.
-33 FPGA Array encryption is
File contains unencrypted array data, but device contains AES key.
Provide a programming file with an encrypted
FlashPro User's Guide 215
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Exit
Code
Exit Message enforced. A programming file with encrypted
FPGA array data needs to be provided.
-34 FlashROM encryption is enforced. A programming file with encrypted
FlashROM data needs to be provided.
Possible Cause
File contains unencrypted
FlashROM data, but the device contains an AES key.
Possible Solution
FPGA Array data.
Provide a programming file with an encrypted
FlashROM data.
-35 Failed to match pass key.
Pass key in file does not match pass key in device.
-37 FPGA Array
Encryption is not enforced.
Cannot guarantee valid AES key present in target device.
Unable to proceed with Encrypted
FPGA Array verification.
File contains encrypted FPGA
Array, but the device encryption is not enforced for FPGA Array.
Provide a programming file with a pass key that matches the pass key programmed into the device.
-36 FlashROM
Encryption is not enforced.
Cannot guarantee valid AES key present in target device.
Unable to proceed with Encrypted
FlashROM programming.
File contains encrypted FlashROM, but device encryption is not enforced for FlashROM
Regenerate security programming file with proper AES key.
Program device security.
Retry programming
FlashROM with encrypted programming file.
Regenerate security programming file with proper AES key.
Program device security.
Retry programming
FPGA Array with encrypted programming file.
-38 Failed to program pass key.
Unstable VPUMP voltage level.
Signal integrity issues on JTAG pins.
Bad device.
Monitor VPUMP voltage during programming.
Measure JTAG pins and noise or reflection.
216 FlashPro User's Guide
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SmartFusion, IGLOO, ProASIC3 and Fusion Device Exit Codes for pre-v8.6 Software
Exit
Code
Exit Message Possible Cause Possible Solution
-39 Failed to verify
-40
Embedded Flash
Memory Block
(EFMB).
Embedded Flash
Memory Block
MAC Failure.
-41 Error programming
Embedded Flash
Memory Block.
(EFMB)
Device is programmed with a different design.
Signal integrity issues on JTAG pins.
The EFMB data was modified through user FPGA design after programming; this could occur during standalone verify.
Verify the device is programmed with the correct data/design.
Monitor VPUMP voltage during programming.
Measure JTAG pins and noise or reflection.
The target EFMB block is locked with FlashLock when running
Run DEVICE_INFO to confirm if the target
ACTION
PROGRAM_NVM_ACTIVE_ARRAY or VERIFY_NVM_ACTIVE_ARRAY.
EFMB block is locked with FlashLock (pass key). If the target EFMB block is locked, then you must unlock it by erasing the security and then reprogramming with the desired security settings. After unlocking the target EFMB block attempt to rerun the target ACTION.
Data in the file is encrypted with a different AES key than the device.
Signal integrity issues on JTAG pins.
Verify the programming file is generated from the latest version of
Designer/FlashPro.
Measure JTAG pins and noise or reflection.
-42 Failed to verify security settings.
File security settings do not match device.
Provide a programming file with security setting that match the security settings programmed into the device.
-43 Failed to verify design information.
File checksum and design name do not match the device.
Verify the device is programmed with the correct data and design.
-44 Failed to verify
AES key.
-45 Device package does not match the programming file.
The AES key in the file does not match the AES key in the device.
File does not contain an AES key and the device is secured with an
AES key.
Provide a programming file with an AES key that matches the AES key programmed into the device.
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Exit
Code
Exit Message Possible Cause Possible Solution
-46 Embedded Flash
Memory Block X
Read is protected by pass key. A valid pass key needs to be provided.
File contains no pass key or incorrect pass key but EFMB read is secured with a pass key.
Provide a programming file with the correct pass key.
-47 Embedded Flash
Memory Block, block X encryption is enforced. A programming file with encrypted
EFMB data needs to be provided.
The programming EFMB data is not encrypted, but the device contains an AES key with encryption enforced.
Provide a programming file with encrypted
EFMB data.
-48 Embedded Flash
Memory Block
(EFMB) block X
Write is protected by pass key.
A valid pass key needs to be provided.
File contains no pass key or incorrect pass key, but device is secured with a pass key.
Provide a programming file with a passkey that matches the passkey programmed into the device.
-49 Embedded Flash
Memory Block
(EFMB) block X
Encryption is not enforced.
Cannot guarantee valid AES key present in target device.
Unable to proceed with Encrypted
EFMB programming.
File contains encrypted EFMB for block X, but the device encryption is not enforced for EFMB block X.
Regenerate security programming file with proper AES key.
Program device security. Retry programming EFMB block X with encrypted programming file.
-51 Failed to access
Embedded Flash
Memory.
(AFS600 only)
-52 Failed to access
Embedded Flash
This version of the silicon does not support programming of the
Embedded Flash Memory Block while the FPGA Array is active.
If programming the
EFMB while the FPGA is active is not required, then use actions
PROGRAM_NVM or
VERIFY_NVM.
Otherwise, use latest revision of silicon.
This version of the silicon does not support programming of the
If programming the
EFMB while the FPGA
218 FlashPro User's Guide
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ProASICPLUS and ProASIC Exit Codes
Exit
Code
Exit Message Possible Cause Possible Solution
Memory.
(AFS1500 only)
-53 Failed to access
Embedded Flash
Memory.
(AFS1500 only)
-54 Failed to access
Embedded Flash
Memory.
Embedded Flash Memory Block while the FPGA Array is active. is active is not required, then use actions
PROGRAM_NVM or
VERIFY_NVM.
Otherwise, use latest revision of silicon.
This version of the silicon does not support programming block 3 of the
EFMBs while the FPGA Array is active.
If programming the
EFMB while the FPGA is active is not required, then use actions
PROGRAM_NVM or
VERIFY_NVM.
Otherwise, use EFMB blocks 0, 1, or 2, but do not use block 3.
FPGA Array is accessing the target
EFMB block while attempting programming.
NVM reset signal is stuck in design.
If programming the
EFMB while the FPGA is active is not required, then use actions
PROGRAM_NVM or
VERIFY_NVM.
Otherwise, check the
FPGA design or use a different EFMB block that is not being accessed. Check if target EFMB block logic is tied to reset.
Verify that the NVM reset signal in the design is not stuck.
ProASIC
PLUS
and ProASIC Exit Codes
The table below lists the exit codes for ProASIC
PLUS
and ProASIC family devices.
Table 27 · ProASIC PLUS and ProASIC Family Devices Exit Codes
Exit Code Exit Message Possible Cause Possible Solution
0
1
This message means passed.
This does not indicate an error.
A physical chain does not match the expected set up from the STAPL file.
Physical chain configuration has been altered. Something has become disconnected in the chain.
FlashPro User's Guide 219
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2
3
5
6
7
Exit Code Exit Message
Also known as
Checking Chain
Error.
Possible Cause
The specific IR length of non-Microsemi devices may be incorrect.
The order of the specified chain may be incorrect.
Possible Solution
There is a reading device ID failure.
The device either does not have a valid device
ID or the data cannot be read correctly.
Check the device ID.
This occurs when using ProASIC
PLUS devices.
Connect was set up for a
ProASIC device and the device is actually
ProASIC
PLUS
.
Set up for a
ProASIC
PLUS
device.
Programming set up problem. Also known as Entering
ISP Failure.
The A500K device senses the VDDL power supply as being on.
Power the VDDL down during programming. Check the device has the correct voltages on
VDDP, VDDL, VPP, and VPN.
The IDCODE of the target device does not match the expected value in the STAPL file.
This is a JEDEC standard message.
The device targeted in the STAPL file does not match the device being programmed.
User selected wrong device.
Device TRST pin is grounded.
Noise or reflections on one or more of the JTAG pins caused by the IR
Bits reading it back incorrectly.
Choose the correct
STAPL file and select the correct device.
Measure JTAG pins and noise or reflection. TRST should be floating or tied high.
Cut down the extra length of ground connection.
Unknown algorithm: alg=x, prev=x Invalid data read from device
This occurs with current
STAPL files when the revision written into the factory row is not rev 1 for ProASICPLUS or rev
2 for ProASIC devices.
The STAPL files from last year may "exit 7" with newer devices or the older revision may cause this failure if the STAPL file used is from latest version.
It can occur if you are using Engineering
Sample parts that are no longer supported, such
Re-generate STAPL file from Designer 6.1
SP1.
Replace A500K ES parts with commercial parts.
Double check VPP and VPN connections.
Make sure VPP and
VPN have correct bypass caps.
Make sure that your power supply can deliver the correct current during programming.
220 FlashPro User's Guide
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ProASICPLUS and ProASIC Exit Codes
8
11
12
Exit Code Exit Message Possible Cause as ProASIC Engineering
Sample parts.
This error can also occur if the programmer has trouble reading the factory row due to signal noise, crosstalk, or reflections on the JTAG signal and clock lines.
It can occur if you program an -F
ProASICPLUS device with an old STAPL file.
This error occurs if you connected VPP and VPN the wrong way.
It occurs if there are no bypass Caps on VPP
VPN, which damaged the device.
This error may occur if your power supply cannot source the correct current for programming.
Possible Solution
FPGA failed during the erase operation.
The device is secured, and the corresponding
STAPL file is not loaded.
The device has been permanently secured and cannot be unlocked.
Load the correct
STAPL file.
FPGA failed verify The device is secured and the corresponding
STAPL file is not loaded.
You used the Libero IDE software v2.3 or earlier or the Designer R1-2003 software or earlier to generate the STAPL file.
VPN caps were soldered in the wrong polarity.
Load the correct
STAPL file.
Use later software versions —at least
Libero v2.3 SP1 and
Designer R1-2003
SP1.
Double-check the
VPN bypass caps polarity.
Security is enabled.
The device is secured and the wrong key/STAPL file was entered.
The device is damaged.
The verification was interrupted and therefore fails, causing the software to think the device is secure.
FlashPro User's Guide 221
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14
15
17
-54
-80
-90
-91
Exit Code Exit Message Possible Cause Possible Solution
Program security failure.
This is a factory
Calibration Data
CRC error.
During program, erase, or verify, you must read back Calibration Data from the FPGA. The data contains a CRC. You use the CRC to ensure the data is not corrupted/wrong.
Device is damaged.
Noise on the FTAL signals causes the programmer to read back wrong data.
The device is secured and the wrong key or
STAPL file was entered.
The device is damaged.
Load the correct
STAPL file.
The device has been secured.
Write-security is enabled.
Failed to access
Embedded Flash
Memory
Analog power supplies
(Vcc15A, Vcc33A,
GNDAQ and GNDA) are not connected.
Connect the analog power supplies
(Vcc15A, Vcc33A,
GNDAQ and GNDA)
Error code results from STAPL files for A500K devices.
An internal calibration
(based on DDP and
VPP) failed.
Check voltages on the device pins.
Check voltages on the VDDP and VPP pins.
Unexpected RCK detected.
Noise on the RCK signal. Disconnect the RCK
You connected a CLK source to the RCK signal. and make sure TCK has a clean signal.
The polarized bypass capacitors on VPP or
VPN are reversed-biased and are affecting the programmer’s VPP or
VPN output voltage. This causes programming to fail. Several FlashPros are programming at the same time and are too close to each other.
Programmer not properly installed by Admin.
Separate FlashPros away from each other while they are programming Internal
ISP.
Connect programmer as an Admin in
FlashPro.
Device is damaged. Replace the device. Calibration data parity error.
Null Several FlashPros are programming at the
222 FlashPro User's Guide
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ProASICPLUS and ProASIC Exit Codes
Exit Code Exit Message
Cable to target is not connected properly.
Possible Cause same time and are too close to each other.
FlashPro connects to PC parallel port through a dongle key.
Data length mismatch when performing
DRSCAN on STAPL file.
Possible Solution
When the Analyze command is executed, the FlashPro looks for target devices. If the cable connection is wrong, FlashPro assumes that nothing is connected at all.
Confirm the connection between the header to the device. If the board supplies the power to the device, make sure the voltage level is correct.
Chain integrity test failed: xx
The connection between the FlashPro programmer and the device is broken.
The programmer cable might not be securely inserted into the header.
The header is not connected to the JTAG pins of the FPGA correctly.
The configuration setting
(ProASIC/ProASICPLUS) does not match the target device.
Noise or reflections on the JTAG pins has caused communication between the programmer and the device to fail.
A dongle is plugged in between the PC parallel port and the FlashPro parallel port cable.
Secure the connections.
Check the JTAG pins for signal activity.
Check for broken
TDO, TMS, and TCK pins.
After checking all type of connections if the failure exists, you may need to replace the first device (the devices closest to the
TDO of the programming header) in the chain.
Remove the dongle.
Could not connect to programmer on port lp1 or parallel port device does not support IEEE-
1284 negotiation protocol
The remote device does not respond to the negotiation protocol, for a variety of reasons.
Make sure the port is connected.
Make sure the connected device is a
FlashPro/Lite programmer.
Turn the programmer on.
Check parallel port setting in BIOS.
FlashPro User's Guide 223
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Exit Code Exit Message
External voltage detected on
<Supply>
Possible Cause Possible Solution
Make sure that there are no dongles in between the parallel port and the FlashPro connection.
Try another parallel cable, the parallel cable might be defective.
Check to see if the programmer is damaged.
Make sure the
FlashPro Lite has power. The FlashPro
Lite is powered from the target board through the Vdd pin of the programming header.
Make sure the Vdd pin is connected and the target board is powered up.
Secure the connection between the cable connector and the programming header.
Before you program any devices, you should run the selfdiagnostic test. The diagnostic software can be found on the
Microsemi web site. If the test fails, please contact Microsemi
Customer Technical
Support at [email protected] for credit and replacement.
Note: The Self-test is only available for
FlashPro, not
FlashPro Lite.
The voltage supply for the FPGA is driven by another source (board, external power-supply), but the user forgot to turn off the supply in the
Connect menu.
Set appropriate options in the
Connect menu.
224 FlashPro User's Guide
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ProASICPLUS and ProASIC Exit Codes
Exit Code Exit Message Possible Cause Possible Solution
VDPP
Disconnected.
There is no Vddp voltage supply to the FPGA.
You accidentally turned off the Vddp supply in the
Connect menu.
The Vddp supply on the board is not functioning.
Check the Vddp supply on the board for appropriate voltages and correct the Connect menu.
More than one unidentified device.
If you want to perform an operation on the
ProASIC device, the rest of the devices in the chain must be in bypass mode.
To put devices in bypass mode, select
Configuration >
Chain Parameter
(or click the Chain
Parameter button in the Single
STAPL
Configuration window), then set the Pre IR, Pre DR,
Post IR or Post
DR.
STAPL settings of Pre
IR, Pre DR, Post IR, and
Post DR do not match the chain configuration.
One or more of the devices in the chain is damaged and the ID
CODE cannot be read back.
Make sure you have set Pre IR, Pre DR,
Post IR, and Post DR to match the chain configuration. If you are still experiencing the failure, it is likely that the device's ID
CODE cannot be read and you need to replace the device.
Cannot find the programmer with
ID xxx
The programmer is removed from the PC.
Delete programmer
(or reconnect programmer) and select the Refresh
Programmer button.
See Connecting
Programmers for more information.
Fatal Error: Please check programmer set up.
Software cannot resolve the error encountered in the programmer.
Save the project file, restart the software, and power cycle the programmer.
External voltage xxx mV is detected on xxx.
You have specified the programmer to drive the xxx but external xxx is detected.
Deselect the xxx in the programmer
setting.
Executing action xxx failed.
The STAPL runtime failed.
FlashPro User's Guide 225
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Exit Code Exit Message
Executing action xxx with serial index/action xx failed.
Possible Cause
The STAPL runtime failed.
Possible Solution
No Vpump voltage source is detected.
Vpump short detected.
Select the Vpump in the Programmer setting. Make sure the external Vpump is properly turned on.
Use a different programmer. If the problem persists, check the board layout.
xxx Mhz TCK frequency in this
STAPL file is not supported by the
FlashPro Lite detected. It supports only 4
MHz TCK frequency.
xxx Mhz TCK frequency in this
STAPL file is not supported by the
FlashPro Lite
RevC detected. It supports only 1, 2 or 4 Mhz TCK frequency.
Check FlashPro Lite version being used.
Use FlashPro Lite
Rev C or modify the
STAPL file to 4 MHz.
Modify STAPL file to
1, 2, or 4 MHz.
Cannot find the serial Index/Action xxx in STAPL file.
Duplicated serial
Index/Action xxx was removed.
Mismatch between
STAPL file and the
Index/Action selection.
Mismatch between
STAPL file and the
Index/Action selection.
Make sure the
STAPL file was not overwritten. Save the project with updated serial/action selection.
Make sure the
STAPL file was not overwritten. Save the project with updated serial/action selection.
Using local backup copy xxx
Cannot find original copy. Check for available space on the disk.
Check that write permissions are
226 FlashPro User's Guide
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ProASICPLUS and ProASIC Exit Codes
Exit Code Exit Message Possible Cause Possible Solution enabled.
FlashPro cannot rename the programmer/device with an existing name.
Name is already in use. Create a new name.
FlashPro cannot rename the programmer/device with an invalid character.
Invalid character used in programmer/device name.
Do not use invalid characters.
Automatic check for updates.
FlashPro can check the Microsemi website to find if an updated version of the software is available. If you would like to have
FlashPro automatically check for software updates, choose Preferences from the File menu.
From the Updates tab, you can choose your automatic software update settings. You can also select Software
Updates from the
Help menu for updates to the
FlashPro software.
FlashPro parse error.
FlashPro software failed to parse the file.
FlashPro does not support STAPL files for xxx.
STAPL file not allowed. Use a STAPL file for your device that is supported by
FlashPro.
FlashPro User's Guide 227
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